[VE] Support SJLJ exception related instructions

Support EH_SJLJ_LONGJMP, EH_SJLJ_SETJMP, and EH_SJLJ_SETUP_DISPATCH for SjLj exception handling. NC++ uses SjLj exception handling, so implement it first. Add regression tests also. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D94071
llvm · Jan 5, 2021 · f784be0 · f784be0
1 parent 313d982
commit f784be0
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diff --git a/llvm/lib/Target/VE/VEISelLowering.cpp b/llvm/lib/Target/VE/VEISelLowering.cpp
diff --git a/llvm/lib/Target/VE/VEISelLowering.h b/llvm/lib/Target/VE/VEISelLowering.h
@@ -24,19 +24,22 @@ namespace VEISD {
 enum NodeType : unsigned {
   FIRST_NUMBER = ISD::BUILTIN_OP_END,
 
-  CALL,            // A call instruction.
-  GETFUNPLT,       // Load function address through %plt insturction.
-  GETTLSADDR,      // Load address for TLS access.
-  GETSTACKTOP,     // Retrieve address of stack top (first address of
-                   // locals and temporaries).
-  GLOBAL_BASE_REG, // Global base reg for PIC.
-  Hi,              // Hi/Lo operations, typically on a global address.
-  Lo,              // Hi/Lo operations, typically on a global address.
-  MEMBARRIER,      // Compiler barrier only; generate a no-op.
-  RET_FLAG,        // Return with a flag operand.
-  TS1AM,           // A TS1AM instruction used for 1/2 bytes swap.
-  VEC_BROADCAST,   // A vector broadcast instruction.
-                   //   0: scalar value, 1: VL
+  CALL,                   // A call instruction.
+  EH_SJLJ_LONGJMP,        // SjLj exception handling longjmp.
+  EH_SJLJ_SETJMP,         // SjLj exception handling setjmp.
+  EH_SJLJ_SETUP_DISPATCH, // SjLj exception handling setup_dispatch.
+  GETFUNPLT,              // Load function address through %plt insturction.
+  GETTLSADDR,             // Load address for TLS access.
+  GETSTACKTOP,            // Retrieve address of stack top (first address of
+                          // locals and temporaries).
+  GLOBAL_BASE_REG,        // Global base reg for PIC.
+  Hi,                     // Hi/Lo operations, typically on a global address.
+  Lo,                     // Hi/Lo operations, typically on a global address.
+  MEMBARRIER,             // Compiler barrier only; generate a no-op.
+  RET_FLAG,               // Return with a flag operand.
+  TS1AM,                  // A TS1AM instruction used for 1/2 bytes swap.
+  VEC_BROADCAST,          // A vector broadcast instruction.
+                          //   0: scalar value, 1: VL
 
 // VVP_* nodes.
 #define ADD_VVP_OP(VVP_NAME, ...) VVP_NAME,
@@ -113,6 +116,9 @@ class VETargetLowering : public TargetLowering {
   SDValue lowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
+  SDValue lowerEH_SJLJ_LONGJMP(SDValue Op, SelectionDAG &DAG) const;
+  SDValue lowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG) const;
+  SDValue lowerEH_SJLJ_SETUP_DISPATCH(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
@@ -132,6 +138,29 @@ class VETargetLowering : public TargetLowering {
   void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
                           SelectionDAG &DAG) const override;
 
+  /// Custom Inserter {
+  MachineBasicBlock *
+  EmitInstrWithCustomInserter(MachineInstr &MI,
+                              MachineBasicBlock *MBB) const override;
+  MachineBasicBlock *emitEHSjLjLongJmp(MachineInstr &MI,
+                                       MachineBasicBlock *MBB) const;
+  MachineBasicBlock *emitEHSjLjSetJmp(MachineInstr &MI,
+                                      MachineBasicBlock *MBB) const;
+  MachineBasicBlock *emitSjLjDispatchBlock(MachineInstr &MI,
+                                           MachineBasicBlock *BB) const;
+
+  void setupEntryBlockForSjLj(MachineInstr &MI, MachineBasicBlock *MBB,
+                              MachineBasicBlock *DispatchBB, int FI,
+                              int Offset) const;
+  // Setup basic block address.
+  Register prepareMBB(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
+                      MachineBasicBlock *TargetBB, const DebugLoc &DL) const;
+  // Prepare function/variable address.
+  Register prepareSymbol(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
+                         StringRef Symbol, const DebugLoc &DL, bool IsLocal,
+                         bool IsCall) const;
+  /// } Custom Inserter
+
   /// VVP Lowering {
   SDValue lowerToVVP(SDValue Op, SelectionDAG &DAG) const;
   /// } VVPLowering

diff --git a/llvm/lib/Target/VE/VEInstrBuilder.h b/llvm/lib/Target/VE/VEInstrBuilder.h
@@ -0,0 +1,41 @@
+//===-- VEInstrBuilder.h - Aides for building VE insts ----------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file exposes functions that may be used with BuildMI from the
+// MachineInstrBuilder.h file to simplify generating frame and constant pool
+// references.
+//
+// For reference, the order of operands for memory references is:
+// (Operand), Dest Reg, Base Reg, and either Reg Index or Immediate
+// Displacement.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_VE_VEINSTRBUILDER_H
+#define LLVM_LIB_TARGET_VE_VEINSTRBUILDER_H
+
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+
+namespace llvm {
+
+/// addFrameReference - This function is used to add a reference to the base of
+/// an abstract object on the stack frame of the current function.  This
+/// reference has base register as the FrameIndex offset until it is resolved.
+/// This allows a constant offset to be specified as well...
+///
+static inline const MachineInstrBuilder &
+addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0,
+                  bool ThreeOp = true) {
+  if (ThreeOp)
+    return MIB.addFrameIndex(FI).addImm(0).addImm(Offset);
+  return MIB.addFrameIndex(FI).addImm(Offset);
+}
+
+} // namespace llvm
+
+#endif
diff --git a/llvm/lib/Target/VE/VEInstrInfo.td b/llvm/lib/Target/VE/VEInstrInfo.td
@@ -446,6 +446,17 @@ def retflag       : SDNode<"VEISD::RET_FLAG", SDTNone,
 
 def getGOT        : Operand<iPTR>;
 
+def VEeh_sjlj_setjmp: SDNode<"VEISD::EH_SJLJ_SETJMP",
+                             SDTypeProfile<1, 1, [SDTCisInt<0>,
+                                                  SDTCisPtrTy<1>]>,
+                             [SDNPHasChain, SDNPSideEffect]>;
+def VEeh_sjlj_longjmp: SDNode<"VEISD::EH_SJLJ_LONGJMP",
+                              SDTypeProfile<0, 1, [SDTCisPtrTy<0>]>,
+                              [SDNPHasChain, SDNPSideEffect]>;
+def VEeh_sjlj_setup_dispatch: SDNode<"VEISD::EH_SJLJ_SETUP_DISPATCH",
+                                     SDTypeProfile<0, 0, []>,
+                                     [SDNPHasChain, SDNPSideEffect]>;
+
 // GETFUNPLT for PIC
 def GetFunPLT : SDNode<"VEISD::GETFUNPLT", SDTIntUnaryOp>;
 
@@ -1878,6 +1889,33 @@ def : Pat<(i32 (atomic_swap_32 ADDRri:$src, i32:$new)),
 def : Pat<(i64 (atomic_swap_64 ADDRri:$src, i64:$new)),
           (TS1AMLrir MEMriRRM:$src, (LEAzii 0, 0, 255), i64:$new)>;
 
+//===----------------------------------------------------------------------===//
+// SJLJ Exception handling patterns
+//===----------------------------------------------------------------------===//
+
+let hasSideEffects = 1, isBarrier = 1, isCodeGenOnly = 1,
+    usesCustomInserter = 1 in {
+  let isTerminator = 1 in
+  def EH_SjLj_LongJmp : Pseudo<(outs), (ins I64:$buf),
+                               "# EH_SJLJ_LONGJMP",
+                               [(VEeh_sjlj_longjmp I64:$buf)]>;
+
+  def EH_SjLj_SetJmp  : Pseudo<(outs I32:$dst), (ins I64:$buf),
+                               "# EH_SJLJ_SETJMP",
+                               [(set I32:$dst, (VEeh_sjlj_setjmp I64:$buf))]>;
+
+  def EH_SjLj_Setup_Dispatch : Pseudo<(outs), (ins), "# EH_SJLJ_SETUP_DISPATCH",
+                                      [(VEeh_sjlj_setup_dispatch)]>;
+}
+
+let isTerminator = 1, isBranch = 1, isCodeGenOnly = 1 in
+  def EH_SjLj_Setup : Pseudo<(outs), (ins brtarget32:$dst),
+                             "# EH_SJlJ_SETUP $dst">;
+
+//===----------------------------------------------------------------------===//
+// Branch related patterns
+//===----------------------------------------------------------------------===//
+
 // Branches
 def : Pat<(br bb:$addr), (BRCFLa bb:$addr)>;
 

diff --git a/llvm/test/CodeGen/VE/Scalar/builtin_sjlj.ll b/llvm/test/CodeGen/VE/Scalar/builtin_sjlj.ll
@@ -0,0 +1,213 @@
+; RUN: llc < %s -mtriple=ve | FileCheck %s
+; RUN: llc < %s -mtriple=ve -relocation-model=pic | \
+; RUN:     FileCheck %s -check-prefix=PIC
+
+%struct.__jmp_buf_tag = type { [25 x i64], i64, [16 x i64] }
+
+@buf = common global [1 x %struct.__jmp_buf_tag] zeroinitializer, align 8
+
+; Function Attrs: noinline nounwind optnone
+define signext i32 @t_setjmp() {
+; CHECK-LABEL: t_setjmp:
+; CHECK:       .LBB{{[0-9]+}}_5:
+; CHECK-NEXT:    st %s18, 48(, %s9) # 8-byte Folded Spill
+; CHECK-NEXT:    st %s19, 56(, %s9) # 8-byte Folded Spill
+; CHECK-NEXT:    st %s20, 64(, %s9) # 8-byte Folded Spill
+; CHECK-NEXT:    st %s21, 72(, %s9) # 8-byte Folded Spill
+; CHECK-NEXT:    st %s22, 80(, %s9) # 8-byte Folded Spill
+; CHECK-NEXT:    st %s23, 88(, %s9) # 8-byte Folded Spill
+; CHECK-NEXT:    st %s24, 96(, %s9) # 8-byte Folded Spill
+; CHECK-NEXT:    st %s25, 104(, %s9) # 8-byte Folded Spill
+; CHECK-NEXT:    st %s26, 112(, %s9) # 8-byte Folded Spill
+; CHECK-NEXT:    st %s27, 120(, %s9) # 8-byte Folded Spill
+; CHECK-NEXT:    st %s28, 128(, %s9) # 8-byte Folded Spill
+; CHECK-NEXT:    st %s29, 136(, %s9) # 8-byte Folded Spill
+; CHECK-NEXT:    st %s30, 144(, %s9) # 8-byte Folded Spill
+; CHECK-NEXT:    st %s31, 152(, %s9) # 8-byte Folded Spill
+; CHECK-NEXT:    st %s32, 160(, %s9) # 8-byte Folded Spill
+; CHECK-NEXT:    st %s33, 168(, %s9) # 8-byte Folded Spill
+; CHECK-NEXT:    lea %s0, buf@lo
+; CHECK-NEXT:    and %s0, %s0, (32)0
+; CHECK-NEXT:    lea.sl %s0, buf@hi(, %s0)
+; CHECK-NEXT:    st %s9, (, %s0)
+; CHECK-NEXT:    st %s11, 16(, %s0)
+; CHECK-NEXT:    lea %s1, .LBB{{[0-9]+}}_3@lo
+; CHECK-NEXT:    and %s1, %s1, (32)0
+; CHECK-NEXT:    lea.sl %s1, .LBB{{[0-9]+}}_3@hi(, %s1)
+; CHECK-NEXT:    st %s1, 8(, %s0)
+; CHECK-NEXT:    # EH_SJlJ_SETUP .LBB{{[0-9]+}}_3
+; CHECK-NEXT:  # %bb.1:
+; CHECK-NEXT:    lea %s0, 0
+; CHECK-NEXT:    br.l.t .LBB{{[0-9]+}}_2
+; CHECK-NEXT:  .LBB{{[0-9]+}}_3: # Block address taken
+; CHECK-NEXT:    lea %s0, 1
+; CHECK-NEXT:  .LBB{{[0-9]+}}_2:
+; CHECK-NEXT:    adds.w.sx %s0, %s0, (0)1
+; CHECK-NEXT:    ld %s33, 168(, %s9) # 8-byte Folded Reload
+; CHECK-NEXT:    ld %s32, 160(, %s9) # 8-byte Folded Reload
+; CHECK-NEXT:    ld %s31, 152(, %s9) # 8-byte Folded Reload
+; CHECK-NEXT:    ld %s30, 144(, %s9) # 8-byte Folded Reload
+; CHECK-NEXT:    ld %s29, 136(, %s9) # 8-byte Folded Reload
+; CHECK-NEXT:    ld %s28, 128(, %s9) # 8-byte Folded Reload
+; CHECK-NEXT:    ld %s27, 120(, %s9) # 8-byte Folded Reload
+; CHECK-NEXT:    ld %s26, 112(, %s9) # 8-byte Folded Reload
+; CHECK-NEXT:    ld %s25, 104(, %s9) # 8-byte Folded Reload
+; CHECK-NEXT:    ld %s24, 96(, %s9) # 8-byte Folded Reload
+; CHECK-NEXT:    ld %s23, 88(, %s9) # 8-byte Folded Reload
+; CHECK-NEXT:    ld %s22, 80(, %s9) # 8-byte Folded Reload
+; CHECK-NEXT:    ld %s21, 72(, %s9) # 8-byte Folded Reload
+; CHECK-NEXT:    ld %s20, 64(, %s9) # 8-byte Folded Reload
+; CHECK-NEXT:    ld %s19, 56(, %s9) # 8-byte Folded Reload
+; CHECK-NEXT:    ld %s18, 48(, %s9) # 8-byte Folded Reload
+; CHECK-NEXT:    or %s11, 0, %s9
+;
+; PIC-LABEL: t_setjmp:
+; PIC:       # %bb.0:
+; PIC-NEXT:    st %s9, (, %s11)
+; PIC-NEXT:    st %s10, 8(, %s11)
+; PIC-NEXT:    st %s15, 24(, %s11)
+; PIC-NEXT:    st %s16, 32(, %s11)
+; PIC-NEXT:    or %s9, 0, %s11
+; PIC-NEXT:    lea %s11, -176(, %s11)
+; PIC-NEXT:    brge.l %s11, %s8, .LBB0_5
+; PIC-NEXT:  # %bb.4:
+; PIC-NEXT:    ld %s61, 24(, %s14)
+; PIC-NEXT:    or %s62, 0, %s0
+; PIC-NEXT:    lea %s63, 315
+; PIC-NEXT:    shm.l %s63, (%s61)
+; PIC-NEXT:    shm.l %s8, 8(%s61)
+; PIC-NEXT:    shm.l %s11, 16(%s61)
+; PIC-NEXT:    monc
+; PIC-NEXT:    or %s0, 0, %s62
+; PIC-NEXT:  .LBB0_5:
+; PIC-NEXT:    st %s18, 48(, %s9) # 8-byte Folded Spill
+; PIC-NEXT:    st %s19, 56(, %s9) # 8-byte Folded Spill
+; PIC-NEXT:    st %s20, 64(, %s9) # 8-byte Folded Spill
+; PIC-NEXT:    st %s21, 72(, %s9) # 8-byte Folded Spill
+; PIC-NEXT:    st %s22, 80(, %s9) # 8-byte Folded Spill
+; PIC-NEXT:    st %s23, 88(, %s9) # 8-byte Folded Spill
+; PIC-NEXT:    st %s24, 96(, %s9) # 8-byte Folded Spill
+; PIC-NEXT:    st %s25, 104(, %s9) # 8-byte Folded Spill
+; PIC-NEXT:    st %s26, 112(, %s9) # 8-byte Folded Spill
+; PIC-NEXT:    st %s27, 120(, %s9) # 8-byte Folded Spill
+; PIC-NEXT:    st %s28, 128(, %s9) # 8-byte Folded Spill
+; PIC-NEXT:    st %s29, 136(, %s9) # 8-byte Folded Spill
+; PIC-NEXT:    st %s30, 144(, %s9) # 8-byte Folded Spill
+; PIC-NEXT:    st %s31, 152(, %s9) # 8-byte Folded Spill
+; PIC-NEXT:    st %s32, 160(, %s9) # 8-byte Folded Spill
+; PIC-NEXT:    st %s33, 168(, %s9) # 8-byte Folded Spill
+; PIC-NEXT:    lea %s15, _GLOBAL_OFFSET_TABLE_@pc_lo(-24)
+; PIC-NEXT:    and %s15, %s15, (32)0
+; PIC-NEXT:    sic %s16
+; PIC-NEXT:    lea.sl %s15, _GLOBAL_OFFSET_TABLE_@pc_hi(%s16, %s15)
+; PIC-NEXT:    lea %s0, buf@got_lo
+; PIC-NEXT:    and %s0, %s0, (32)0
+; PIC-NEXT:    lea.sl %s0, buf@got_hi(, %s0)
+; PIC-NEXT:    ld %s0, (%s0, %s15)
+; PIC-NEXT:    st %s9, (, %s0)
+; PIC-NEXT:    st %s11, 16(, %s0)
+; PIC-NEXT:    lea %s1, .LBB0_3@gotoff_lo
+; PIC-NEXT:    and %s1, %s1, (32)0
+; PIC-NEXT:    lea.sl %s1, .LBB0_3@gotoff_hi(%s1, %s15)
+; PIC-NEXT:    st %s1, 8(, %s0)
+; PIC-NEXT:    # EH_SJlJ_SETUP .LBB0_3
+; PIC-NEXT:  # %bb.1:
+; PIC-NEXT:    lea %s0, 0
+; PIC-NEXT:    br.l.t .LBB0_2
+; PIC-NEXT:  .LBB0_3: # Block address taken
+; PIC-NEXT:    lea %s0, 1
+; PIC-NEXT:  .LBB0_2:
+; PIC-NEXT:    adds.w.sx %s0, %s0, (0)1
+; PIC-NEXT:    ld %s33, 168(, %s9) # 8-byte Folded Reload
+; PIC-NEXT:    ld %s32, 160(, %s9) # 8-byte Folded Reload
+; PIC-NEXT:    ld %s31, 152(, %s9) # 8-byte Folded Reload
+; PIC-NEXT:    ld %s30, 144(, %s9) # 8-byte Folded Reload
+; PIC-NEXT:    ld %s29, 136(, %s9) # 8-byte Folded Reload
+; PIC-NEXT:    ld %s28, 128(, %s9) # 8-byte Folded Reload
+; PIC-NEXT:    ld %s27, 120(, %s9) # 8-byte Folded Reload
+; PIC-NEXT:    ld %s26, 112(, %s9) # 8-byte Folded Reload
+; PIC-NEXT:    ld %s25, 104(, %s9) # 8-byte Folded Reload
+; PIC-NEXT:    ld %s24, 96(, %s9) # 8-byte Folded Reload
+; PIC-NEXT:    ld %s23, 88(, %s9) # 8-byte Folded Reload
+; PIC-NEXT:    ld %s22, 80(, %s9) # 8-byte Folded Reload
+; PIC-NEXT:    ld %s21, 72(, %s9) # 8-byte Folded Reload
+; PIC-NEXT:    ld %s20, 64(, %s9) # 8-byte Folded Reload
+; PIC-NEXT:    ld %s19, 56(, %s9) # 8-byte Folded Reload
+; PIC-NEXT:    ld %s18, 48(, %s9) # 8-byte Folded Reload
+; PIC-NEXT:    or %s11, 0, %s9
+; PIC-NEXT:    ld %s16, 32(, %s11)
+; PIC-NEXT:    ld %s15, 24(, %s11)
+; PIC-NEXT:    ld %s10, 8(, %s11)
+; PIC-NEXT:    ld %s9, (, %s11)
+; PIC-NEXT:    b.l.t (, %s10)
+  %1 = call i8* @llvm.frameaddress(i32 0)
+  store i8* %1, i8** bitcast ([1 x %struct.__jmp_buf_tag]* @buf to i8**), align 8
+  %2 = call i8* @llvm.stacksave()
+  store i8* %2, i8** getelementptr inbounds (i8*, i8** bitcast ([1 x %struct.__jmp_buf_tag]* @buf to i8**), i64 2), align 8
+  %3 = call i32 @llvm.eh.sjlj.setjmp(i8* bitcast ([1 x %struct.__jmp_buf_tag]* @buf to i8*))
+  ret i32 %3
+}
+
+; Function Attrs: nounwind readnone
+declare i8* @llvm.frameaddress(i32)
+
+; Function Attrs: nounwind
+declare i8* @llvm.stacksave()
+
+; Function Attrs: nounwind
+declare i32 @llvm.eh.sjlj.setjmp(i8*)
+
+; Function Attrs: noinline nounwind optnone
+define void @t_longjmp() {
+; CHECK-LABEL: t_longjmp:
+; CHECK:       .LBB{{[0-9]+}}_2:
+; CHECK-NEXT:    lea %s0, buf@lo
+; CHECK-NEXT:    and %s0, %s0, (32)0
+; CHECK-NEXT:    lea.sl %s0, buf@hi(, %s0)
+; CHECK-NEXT:    ld %s9, (, %s0)
+; CHECK-NEXT:    ld %s1, 8(, %s0)
+; CHECK-NEXT:    or %s10, 0, %s0
+; CHECK-NEXT:    ld %s11, 16(, %s0)
+; CHECK-NEXT:    b.l.t (, %s1)
+;
+; PIC-LABEL: t_longjmp:
+; PIC:       # %bb.0:
+; PIC-NEXT:    st %s9, (, %s11)
+; PIC-NEXT:    st %s10, 8(, %s11)
+; PIC-NEXT:    st %s15, 24(, %s11)
+; PIC-NEXT:    st %s16, 32(, %s11)
+; PIC-NEXT:    or %s9, 0, %s11
+; PIC-NEXT:    lea %s11, -176(, %s11)
+; PIC-NEXT:    brge.l.t %s11, %s8, .LBB1_2
+; PIC-NEXT:  # %bb.1:
+; PIC-NEXT:    ld %s61, 24(, %s14)
+; PIC-NEXT:    or %s62, 0, %s0
+; PIC-NEXT:    lea %s63, 315
+; PIC-NEXT:    shm.l %s63, (%s61)
+; PIC-NEXT:    shm.l %s8, 8(%s61)
+; PIC-NEXT:    shm.l %s11, 16(%s61)
+; PIC-NEXT:    monc
+; PIC-NEXT:    or %s0, 0, %s62
+; PIC-NEXT:  .LBB1_2:
+; PIC-NEXT:    lea %s15, _GLOBAL_OFFSET_TABLE_@pc_lo(-24)
+; PIC-NEXT:    and %s15, %s15, (32)0
+; PIC-NEXT:    sic %s16
+; PIC-NEXT:    lea.sl %s15, _GLOBAL_OFFSET_TABLE_@pc_hi(%s16, %s15)
+; PIC-NEXT:    lea %s0, buf@got_lo
+; PIC-NEXT:    and %s0, %s0, (32)0
+; PIC-NEXT:    lea.sl %s0, buf@got_hi(, %s0)
+; PIC-NEXT:    ld %s0, (%s0, %s15)
+; PIC-NEXT:    ld %s9, (, %s0)
+; PIC-NEXT:    ld %s1, 8(, %s0)
+; PIC-NEXT:    or %s10, 0, %s0
+; PIC-NEXT:    ld %s11, 16(, %s0)
+; PIC-NEXT:    b.l.t (, %s1)
+  call void @llvm.eh.sjlj.longjmp(i8* bitcast ([1 x %struct.__jmp_buf_tag]* @buf to i8*))
+  unreachable
+                                                  ; No predecessors!
+  ret void
+}
+
+; Function Attrs: noreturn nounwind
+declare void @llvm.eh.sjlj.longjmp(i8*)
+