[mips] Correct the patterns for bswap

Guard the MIPS64 variant correctly for i64, mark the MIPS32 version as not in microMIPS and provide the microMIPS version. Additionally, remove a related stale XFAIL'd test as bswap has its own test case providing coverage. Reviewers: smaksimovic, abeserminji, atanasyan Differential Revision: https://reviews.llvm.org/D45816 llvm-svn: 330705
llvm · Apr 24, 2018 · fce722e · fce722e
1 parent 04fbffc
commit fce722e
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Showing 5 changed files with 28 additions and 19 deletions.
diff --git a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td
@@ -1124,6 +1124,9 @@ let Predicates = [InMicroMips] in {
                 (SUBu_MM GPR32:$lhs, GPR32:$rhs)>;
 }
 
+def : MipsPat<(bswap GPR32:$rt), (ROTR_MM (WSBH_MM GPR32:$rt), 16)>,
+      ISA_MICROMIPS;
+
 def : MipsPat<(MipsTailCall (iPTR tglobaladdr:$dst)),
               (TAILCALL_MM tglobaladdr:$dst)>, ISA_MICROMIPS32_NOT_MIPS32R6;
 def : MipsPat<(MipsTailCall (iPTR texternalsym:$dst)),

diff --git a/llvm/lib/Target/Mips/Mips64InstrInfo.td b/llvm/lib/Target/Mips/Mips64InstrInfo.td
@@ -728,7 +728,7 @@ def : MipsPat<(i64 (sext_inreg GPR64:$src, i32)),
               (SLL64_64 GPR64:$src)>;
 
 // bswap MipsPattern
-def : MipsPat<(bswap GPR64:$rt), (DSHD (DSBH GPR64:$rt))>;
+def : MipsPat<(bswap GPR64:$rt), (DSHD (DSBH GPR64:$rt))>, ISA_MIPS64R2;
 
 // Carry pattern
 let AdditionalPredicates = [NotInMicroMips] in {

diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td
@@ -3030,10 +3030,10 @@ let AdditionalPredicates = [NotInMicroMips] in {
   defm : SetgtPats<GPR32, SLT, SLTu>;
   defm : SetgePats<GPR32, XORi, SLT, SLTu>;
   defm : SetgeImmPats<GPR32, XORi, SLTi, SLTiu>;
-}
 
-// bswap pattern
-def : MipsPat<(bswap GPR32:$rt), (ROTR (WSBH GPR32:$rt), 16)>;
+  // bswap pattern
+  def : MipsPat<(bswap GPR32:$rt), (ROTR (WSBH GPR32:$rt), 16)>, ISA_MIPS32R2;
+}
 
 // Load halfword/word patterns.
 let AddedComplexity = 40 in {

diff --git a/llvm/test/CodeGen/Mips/2008-08-08-bswap.ll b/llvm/test/CodeGen/Mips/2008-08-08-bswap.ll
diff --git a/llvm/test/CodeGen/Mips/bswap.ll b/llvm/test/CodeGen/Mips/bswap.ll
@@ -1,4 +1,5 @@
 ; RUN: llc  < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=MIPS32
+; RUN: llc  < %s -mtriple=mipsel-mti-linux-gnu -mcpu=mips32r2 -mattr=+micromips | FileCheck %s -check-prefix=MM
 ; RUN: llc  < %s -march=mips64el -mcpu=mips64r2 | FileCheck %s -check-prefix=MIPS64
 ; RUN: llc  < %s -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips32r2 -mattr=+mips16 | FileCheck %s -check-prefix=MIPS16
 
@@ -8,6 +9,10 @@ entry:
 ; MIPS32: wsbh $[[R0:[0-9]+]]
 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
 
+; MM-LABEL: bswap32:
+; MM: wsbh $[[R0:[0-9]+]]
+; MM: rotr ${{[0-9]+}}, $[[R0]], 16
+
 ; MIPS64-LABEL: bswap32:
 ; MIPS64: wsbh $[[R0:[0-9]+]]
 ; MIPS64: rotr ${{[0-9]+}}, $[[R0]], 16
@@ -37,6 +42,12 @@ entry:
 ; MIPS32: wsbh $[[R0:[0-9]+]]
 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
 
+; MM-LABEL: bswap64:
+; MM: wsbh $[[R0:[0-9]+]]
+; MM: rotr ${{[0-9]+}}, $[[R0]], 16
+; MM: wsbh $[[R0:[0-9]+]]
+; MM: rotr ${{[0-9]+}}, $[[R0]], 16
+
 ; MIPS64-LABEL: bswap64:
 ; MIPS64: dsbh $[[R0:[0-9]+]]
 ; MIPS64: dshd ${{[0-9]+}}, $[[R0]]
@@ -81,6 +92,16 @@ entry:
 ; MIPS32-DAG: wsbh $[[R0:[0-9]+]]
 ; MIPS32-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
 
+; MM-LABEL: bswapv4i32:
+; MM-DAG: wsbh $[[R0:[0-9]+]]
+; MM-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
+; MM-DAG: wsbh $[[R0:[0-9]+]]
+; MM-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
+; MM-DAG: wsbh $[[R0:[0-9]+]]
+; MM-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
+; MM-DAG: wsbh $[[R0:[0-9]+]]
+; MM-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
+
 ; MIPS64-LABEL: bswapv4i32:
 ; MIPS64-DAG: wsbh $[[R0:[0-9]+]]
 ; MIPS64-DAG: rotr ${{[0-9]+}}, $[[R0]], 16