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[PowerPC] [NFC] Create a helper function to copy register to particul…
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…ar register class at PPCFastISel

Make copy register code as common function as following.

unsigned copyRegToRegClass(const TargetRegisterClass *ToRC, unsigned SrcReg, unsigned Flag = 0, unsigned SubReg = 0);

Differential Revision: https://reviews.llvm.org/D57368

llvm-svn: 352596
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wuzish committed Jan 30, 2019
1 parent 3933add commit fec749f
Showing 1 changed file with 18 additions and 35 deletions.
53 changes: 18 additions & 35 deletions llvm/lib/Target/PowerPC/PPCFastISel.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -151,6 +151,14 @@ class PPCFastISel final : public FastISel {
bool isVSSRCRegClass(const TargetRegisterClass *RC) const {
return RC->getID() == PPC::VSSRCRegClassID;
}
unsigned copyRegToRegClass(const TargetRegisterClass *ToRC,
unsigned SrcReg, unsigned Flag = 0,
unsigned SubReg = 0) {
unsigned TmpReg = createResultReg(ToRC);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
TII.get(TargetOpcode::COPY), TmpReg).addReg(SrcReg, Flag, SubReg);
return TmpReg;
}
bool PPCEmitCmp(const Value *Src1Value, const Value *Src2Value,
bool isZExt, unsigned DestReg,
const PPC::Predicate Pred);
Expand Down Expand Up @@ -877,18 +885,10 @@ bool PPCFastISel::PPCEmitCmp(const Value *SrcValue1, const Value *SrcValue2,
}
} else {
CmpOpc = PPC::FCMPUS;
if (isVSSRCRegClass(RC1)) {
unsigned TmpReg = createResultReg(&PPC::F4RCRegClass);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
TII.get(TargetOpcode::COPY), TmpReg).addReg(SrcReg1);
SrcReg1 = TmpReg;
}
if (RC2 && isVSSRCRegClass(RC2)) {
unsigned TmpReg = createResultReg(&PPC::F4RCRegClass);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
TII.get(TargetOpcode::COPY), TmpReg).addReg(SrcReg2);
SrcReg2 = TmpReg;
}
if (isVSSRCRegClass(RC1))
SrcReg1 = copyRegToRegClass(&PPC::F4RCRegClass, SrcReg1);
if (RC2 && isVSSRCRegClass(RC2))
SrcReg2 = copyRegToRegClass(&PPC::F4RCRegClass, SrcReg2);
}
break;
case MVT::f64:
Expand Down Expand Up @@ -1210,13 +1210,8 @@ bool PPCFastISel::SelectFPToI(const Instruction *I, bool IsSigned) {
// Convert f32 to f64 if necessary. This is just a meaningless copy
// to get the register class right.
const TargetRegisterClass *InRC = MRI.getRegClass(SrcReg);
if (InRC == &PPC::F4RCRegClass) {
unsigned TmpReg = createResultReg(&PPC::F8RCRegClass);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
TII.get(TargetOpcode::COPY), TmpReg)
.addReg(SrcReg);
SrcReg = TmpReg;
}
if (InRC == &PPC::F4RCRegClass)
SrcReg = copyRegToRegClass(&PPC::F8RCRegClass, SrcReg);

// Determine the opcode for the conversion, which takes place
// entirely within FPRs.
Expand Down Expand Up @@ -1510,11 +1505,7 @@ bool PPCFastISel::finishCall(MVT RetVT, CallLoweringInfo &CLI, unsigned &NumByte

if (RetVT == CopyVT) {
const TargetRegisterClass *CpyRC = TLI.getRegClassFor(CopyVT);
ResultReg = createResultReg(CpyRC);

BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
TII.get(TargetOpcode::COPY), ResultReg)
.addReg(SourcePhysReg);
ResultReg = copyRegToRegClass(CpyRC, SourcePhysReg);

// If necessary, round the floating result to single precision.
} else if (CopyVT == MVT::f64) {
Expand All @@ -1527,12 +1518,9 @@ bool PPCFastISel::finishCall(MVT RetVT, CallLoweringInfo &CLI, unsigned &NumByte
// used along the fast-isel path (not lowered), and downstream logic
// also doesn't like a direct subreg copy on a physical reg.)
} else if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetVT == MVT::i32) {
ResultReg = createResultReg(&PPC::GPRCRegClass);
// Convert physical register from G8RC to GPRC.
SourcePhysReg -= PPC::X0 - PPC::R0;
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
TII.get(TargetOpcode::COPY), ResultReg)
.addReg(SourcePhysReg);
ResultReg = copyRegToRegClass(&PPC::GPRCRegClass, SourcePhysReg);
}

assert(ResultReg && "ResultReg unset!");
Expand Down Expand Up @@ -1884,13 +1872,8 @@ bool PPCFastISel::SelectTrunc(const Instruction *I) {
return false;

// The only interesting case is when we need to switch register classes.
if (SrcVT == MVT::i64) {
unsigned ResultReg = createResultReg(&PPC::GPRCRegClass);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
TII.get(TargetOpcode::COPY),
ResultReg).addReg(SrcReg, 0, PPC::sub_32);
SrcReg = ResultReg;
}
if (SrcVT == MVT::i64)
SrcReg = copyRegToRegClass(&PPC::GPRCRegClass, SrcReg, 0, PPC::sub_32);

updateValueMap(I, SrcReg);
return true;
Expand Down

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