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[X86] combineConcatVectorOps - don't concat(vselect,vselect) if the c…
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…oncatenated selection mask isn't legal

One of the crash regression tests now exposes an existing issue with SelectionDAG::simplifySelect not folding vselect with constant masks

Fixes #59003
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RKSimon committed Nov 16, 2022
1 parent a95a818 commit ff252e6
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Showing 2 changed files with 45 additions and 7 deletions.
9 changes: 5 additions & 4 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
Expand Up @@ -54809,10 +54809,11 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
IsConcatFree(VT, Ops, 1) && IsConcatFree(VT, Ops, 2)) {
EVT SelVT = Ops[0].getOperand(0).getValueType();
SelVT = SelVT.getDoubleNumVectorElementsVT(*DAG.getContext());
return DAG.getNode(Op0.getOpcode(), DL, VT,
ConcatSubOperand(SelVT.getSimpleVT(), Ops, 0),
ConcatSubOperand(VT, Ops, 1),
ConcatSubOperand(VT, Ops, 2));
if (DAG.getTargetLoweringInfo().isTypeLegal(SelVT))
return DAG.getNode(Op0.getOpcode(), DL, VT,
ConcatSubOperand(SelVT.getSimpleVT(), Ops, 0),
ConcatSubOperand(VT, Ops, 1),
ConcatSubOperand(VT, Ops, 2));
}
break;
}
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43 changes: 40 additions & 3 deletions llvm/test/CodeGen/X86/vselect-avx.ll
Expand Up @@ -189,6 +189,28 @@ define <32 x i8> @PR22706(<32 x i1> %x) {
ret <32 x i8> %tmp
}

; Don't concat select/blendv ops if the concatenated mask isn't legal.
define void @PR59003(<2 x float> %0, <2 x float> %1, <8 x i1> %shuffle108) {
; AVX-LABEL: PR59003:
; AVX: ## %bb.0: ## %entry
; AVX-NEXT: .p2align 4, 0x90
; AVX-NEXT: LBB4_1: ## %for.body.i
; AVX-NEXT: ## =>This Inner Loop Header: Depth=1
; AVX-NEXT: jmp LBB4_1
entry:
br label %for.body.i

for.body.i: ; preds = %for.body.i, %entry
%2 = phi <8 x float> [ zeroinitializer, %entry ], [ %3, %for.body.i ]
%shuffle111 = shufflevector <2 x float> %0, <2 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
%shuffle112 = shufflevector <2 x float> %1, <2 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
%3 = select <8 x i1> %shuffle108, <8 x float> %shuffle111, <8 x float> %shuffle112
%4 = shufflevector <8 x float> zeroinitializer, <8 x float> %2, <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
%5 = select <8 x i1> zeroinitializer, <8 x float> zeroinitializer, <8 x float> %2
br label %for.body.i
}


; Split a 256-bit select into two 128-bit selects when the operands are concatenated.

define void @blendv_split(ptr %p, <8 x i32> %cond, <8 x i32> %a, <8 x i32> %x, <8 x i32> %y, <8 x i32> %z, <8 x i32> %w) {
Expand Down Expand Up @@ -244,10 +266,25 @@ define void @blendv_split(ptr %p, <8 x i32> %cond, <8 x i32> %a, <8 x i32> %x, <
}

; Regression test for rGea8fb3b60196
; FIXME: Missing fold vselect(zero, T, F) -> F
define void @vselect_concat() {
; AVX-LABEL: vselect_concat:
; AVX: ## %bb.0: ## %entry
; AVX-NEXT: retq
; AVX1-LABEL: vselect_concat:
; AVX1: ## %bb.0: ## %entry
; AVX1-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
; AVX1-NEXT: vmovaps %ymm0, (%rax)
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
; AVX2-LABEL: vselect_concat:
; AVX2: ## %bb.0: ## %entry
; AVX2-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
; AVX2-NEXT: vmovaps %ymm0, (%rax)
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; AVX512-LABEL: vselect_concat:
; AVX512: ## %bb.0: ## %entry
; AVX512-NEXT: retq
entry:
%0 = load <8 x i32>, ptr undef
%1 = shufflevector <8 x i32> zeroinitializer, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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