[AArch64][SME] Fix LDR and STR asm parser

The LDR and STR instructions must have the same value for imm4(second operand)
and offset(fourth operand).
The disassembly guarantees that happens, but the Asm parser was not checking that.
This patch fixes that by checking if the second operand and fourth operand are
immediate and have the same value.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D147617

llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

@@ -5304,6 +5304,14 @@ bool AArch64AsmParser::validateInstruction(MCInst &Inst, SMLoc &IDLoc,
                            "is also a destination");
     [[fallthrough]];
   }
+  case AArch64::LDR_ZA:
+  case AArch64::STR_ZA: {
+    if (Inst.getOperand(2).isImm() && Inst.getOperand(4).isImm() &&
+        Inst.getOperand(2).getImm() != Inst.getOperand(4).getImm())
+      return Error(Loc[1],
+                   "unpredictable instruction, immediate and offset mismatch.");
+    break;
+  }
   case AArch64::LDPDi:
   case AArch64::LDPQi:
   case AArch64::LDPSi:

llvm/test/MC/AArch64/SME/ldr-diagnostics.s

@@ -51,3 +51,10 @@ ldr za[w12, #0], [x0, #0]
 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 // CHECK-NEXT: ldr za[w12, #0], [x0, #0]
 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// ------------------------------------------------------------------------- //
+// Mismatch between offset and immediate
+ldr     za[w14, 6], [x10, #5, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable instruction, immediate and offset mismatch.
+// CHECK-NEXT: ldr     za[w14, 6], [x10, #5, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/test/MC/AArch64/SME/str-diagnostics.s

@@ -51,3 +51,10 @@ str za[w12, #0], [x0, #0]
 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 // CHECK-NEXT: str za[w12, #0], [x0, #0]
 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// ------------------------------------------------------------------------- //
+// Mismatch between offset and immediate
+str     za[w14, 6], [x10, #5, mul vl]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable instruction, immediate and offset mismatch.
+// CHECK-NEXT: str     za[w14, 6], [x10, #5, mul vl]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: