Link failure with LLVM gold plugin when embedded bitcode is involved for e.g. probe-stack symbol #47216
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Proposed patch: https://reviews.llvm.org/D116995 |
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I can confirm it works. |
tstellar
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-fembed-bitcode will put bitcode into special sections within object files, but this is not meant to be used by LTO, so the gold plugin should ignore it. #47216 Reviewed By: tejohnson, MaskRay Differential Revision: https://reviews.llvm.org/D116995
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-fembed-bitcode will put bitcode into special sections within object files, but this is not meant to be used by LTO, so the gold plugin should ignore it. llvm/llvm-project#47216 Reviewed By: tejohnson, MaskRay Differential Revision: https://reviews.llvm.org/D116995
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LLVM 15.0.4 Changes to the LLVM IR LLVM now uses opaque pointers. This means that different pointer types like i8*, i32* or void()** are now represented as a single ptr type. See the linked document for migration instructions. Renamed llvm.experimental.vector.extract intrinsic to llvm.vector.extract. Renamed llvm.experimental.vector.insert intrinsic to llvm.vector.insert. The constant expression variants of the following instructions have been removed: extractvalue insertvalue udiv sdiv urem srem fadd fsub fmul fdiv frem Added the support for fmax and fmin in atomicrmw instruction. The comparison is expected to match the behavior of llvm.maxnum.* and llvm.minnum.* respectively. callbr instructions no longer use blockaddress arguments for labels. Instead, label constraints starting with ! refer directly to entries in the callbr indirect destination list. Changes to building LLVM Omitting CMAKE_BUILD_TYPE when using a single configuration generator is now an error. You now have to pass -DCMAKE_BUILD_TYPE=<type> in order to configure LLVM. This is done to help new users of LLVM select the correct type: since building LLVM in Debug mode is very resource intensive, we want to make sure that new users make the choice that lines up with their usage. We have also improved documentation around this setting that should help new users. You can find this documentation here. Changes to Loop Optimizations Loop interchange legality and cost model improvements Changes to the AMDGPU Backend 8 and 16-bit atomic loads and stores are now supported Changes to the ARM Backend Added support for the Armv9-A, Armv9.1-A and Armv9.2-A architectures. Added support for the Armv8.1-M PACBTI-M extension. Added support for the Armv9-A, Armv9.1-A and Armv9.2-A architectures. Added support for the Armv8.1-M PACBTI-M extension. Removed the deprecation of ARMv8-A T32 Complex IT blocks. No deprecation warnings will be generated and -mrestrict-it is now always off by default. Previously it was on by default for Armv8 and off for all other architecture versions. Added a pass to workaround Cortex-A57 Erratum 1742098 and Cortex-A72 Erratum 1655431. This is enabled by default when targeting either CPU. Implemented generation of Windows SEH unwind information. Switched the MinGW target to use SEH instead of DWARF for unwind information. Added support for the Cortex-M85 CPU. Added support for a new -mframe-chain=(none|aapcs|aapcs+leaf) command-line option, which controls the generation of AAPCS-compliant Frame Records. Changes to the DirectX Backend DirectX has been added as an experimental target. Specify -DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD=DirectX in your CMake configuration to enable it. The target is not packaged in pre-built binaries. The DirectX backend supports the dxil architecture which is based on LLVM 3.6 IR encoded as bitcode and is the format used for DirectX GPU Shader programs. Changes to the PowerPC Backend Common PowerPC improvements: * Add a new post instruction selection pass to generate CTR loops. * Add SSE4 and BMI compatible intrinsics implementation. * Supported 16-byte lock free atomics on PowerPC8 and up. * Supported atomic load/store for pointer types. * Supported stack size larger than 2G * Add __builtin_min/__builtin_max/__abs builtins. * Code generation improvements for splat load/vector shuffle/mulli, etc. * Emit VSX instructions for vector loads and stores regardless of alignment. * The mcpu=future has its own ISA now (FutureISA). * Added the ppc-set-dscr option to set the Data Stream Control Register (DSCR). * Bug fixes. AIX improvements: * Supported 64 bit XCOFF for integrated-as path. * Supported X86-compatible vector intrinsics. * Program code csect default alignment now is 32-byte. * Supported auxiliary header in integrated-as path. * Improved alias symbol handling. Changes to the RISC-V Backend A RISCVRedundantCopyElimination pass was added to remove unnecessary zero copies. A RISC-V specific CodeGenPrepare pass was added. The machine outliner was enabled by default for RISC-V at -Oz. Additionally, the newly introduced RISCVMakeCompressible pass will make modify instructions prior to emission at -Oz in order to increase opportunities for the compression with the RISC-V C extension. Various bug fixes and improvements to code generation for the RISC-V vector extensions. Various improvements were made to RISC-V specific optimisation passes such as RISCVSExtWRemoval and RISCVMergeBaseOffset. llc now computes the target ABI based on the target architecture using the same logic as Clang if not explicit ABI is given. generic is now recognized as a valid CPU name and is mapped to generic-rv32 or generic-rv64 depending on the target triple. Support for the experimental Zvfh extension was added, enabling half-precision floating point in vectors. Support for the Zihintpause (Pause Hint) extension. Assembler and disassembler support for the Zfinx and Zdinx (float / double in integer register) extensions. Assembler and disassembler support for the Zicbom, Zicboz, and Zicbop cache management operation extensions. Support for the Zmmul extension (a subextension of the M extension, adding multiplication instructions only). Assembler and disassembler support for the hypervisor extension and for the Sinval supervisor memory-management extension. Changes to the X86 Backend Support half type on SSE2 and above targets following X86 psABI. Support rdpru instruction on Zen2 and above targets. During this release, half type has an ABI breaking change to provide the support for the ABI of _Float16 type on SSE2 and above following X86 psABI. (D107082) The change may affect the current use of half includes (but is not limited to): Frontends generating half type in function passing and/or returning arguments. Downstream runtimes providing any half conversion builtins assuming the old ABI. Projects built with LLVM 15.0 but using early versions of compiler-rt. When you find failures with half type, check the calling conversion of the code and switch it to the new ABI. Changes to the LLVM tools (Experimental) llvm-symbolizer now has --filter-markup to filter Symbolizer Markup into human-readable form. llvm-objcopy has removed support for the legacy zlib-gnu format. llvm-objcopy now allows --set-section-flags src=... --rename-section src=tst. --add-section=.foo1=... --rename-section=.foo1=.foo2 now adds .foo1 instead of .foo2. New features supported on AIX for llvm-ar: AIX big-format archive write operation (D123949) A new object mode option, -X , to specify the type of object file llvm-ar should operate upon (D127864) Read global symbols of AIX big archive (D124865) New options supported for llvm-nm: -X, to specify the type of object file that llvm-nm should examine (D118193) --export-symbols, to create a list of symbols to export (D112735) The LLVM gold plugin now ignores bitcode from the .llvmbc section of ELF files when doing LTO. llvm/llvm-project#47216 llvm-objcopy now supports 32 bit XCOFF. llvm-objdump: improved assembly printing for XCOFF. llc now parses code-model attribute from input file. Changes to LLDB The “memory region” command now has a “–all” option to list all memory regions (including unmapped ranges). This is the equivalent of using address 0 then repeating the command until all regions have been listed. Added “–show-tags” option to the “memory find” command. This is off by default. When enabled, if the target value is found in tagged memory, the tags for that memory will be shown inline with the memory contents. Various memory related parts of LLDB have been updated to handle non-address bits (such as AArch64 pointer signatures): “memory read”, “memory write” and “memory find” can now be used with addresses with non-address bits. All the read and write memory methods on SBProccess and SBTarget can be used with addreses with non-address bits. When printing a pointer expression, LLDB can now dereference the result even if it has non-address bits. The memory cache now ignores non-address bits when looking up memory locations. This prevents us reading locations multiple times, or not writing out new values if the addresses have different non-address bits. LLDB now supports reading memory tags from AArch64 Linux core files. LLDB now supports the gnu debuglink section for reading debug information from a separate file on Windows LLDB now allows selecting the C++ ABI to use on Windows (between Itanium, used for MingW, and MSVC) via the plugin.object-file.pe-coff.abi setting. In Windows builds of LLDB, this defaults to the style used for LLVM’s default target. Other Changes The code for the LLVM Visual Studio integration has been removed. This had been obsolete and abandoned since Visual Studio started including an integration by default in 2019. Added the unwinder, personality, and helper functions for exception handling on AIX. (D100132) (D100504) PGO on AIX: A new implementation that requires linker support (__start_SECTION/__stop_SECTION symbols) available on AIX 7.2 TL5 SP4 and AIX 7.3 TL0 SP2.
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This was fixed by 4b1e3d1 |
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Extended Description
Unzip the testcase (all files will extract in the current directory), and run
make all -kThis is reduced from rust-lang/rust#74657 (comment), with added variants.
You'll see that main*.bfd, as well as main2.gold and main4.gold with
undefined reference to 'probestack'.A little explainer of what's going on:
mainfunction.The probestack2_bc variants are used as confirmation, on success, whether the linker used the bitcode or the machine code. It turns out lld never uses the machine code (per main3.lld and main4.lld containing
mov $0x2a,%eax), and gold doesn't use the machine code when it succeeds (per main3.gold containingmov $0x2a,%eax).What happens with BFD is that the bitcode for probestack is never compiled during runLTO because an add_symbols call for the probestack object doesn't happen until after runLTO has finished, during the inputs rescan (
open_input_bfds (statement_list.head, OPEN_BFD_RESCAN);)This in turn seems to be due to the plugin not marking the probestack symbol as being a requirement of main.o in the first place. If you add an explicit call to
probestack()inmain(), it is marked as such, and all the link commands succeed. It is worth noting that in that case, probestack is then compiled from the bitcode for both bfd and gold (but not lld).Note this problem also affects other symbols than the one used for the probe-stack attribute. Symbols that are affected include e.g. __muloti4, __mulodi4, __udivti3, etc. on x86, or __aeabi_uldivmod, etc. on armv7.
I am not 100% sure the problem lies on the plugin end, but from investigating the issue and from the various results above, it seemed more likely, if not the plugin itself, at least to be on LLVM's end.
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