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If I apply just the MachineVerifier part of this patch then I see a couple of Hexagon CodeGen tests failing with Bad machine code: Multiple connected components in live interval:
Each dead def of the same virtual register is required to be split into multiple
virtual registers with separate live intervals to avoid MachineVerifier error.
Partially fixes#56050 and
#56051
Reviewed By: qcolombet
Differential Revision: https://reviews.llvm.org/D130477
See https://reviews.llvm.org/D127731 WIP: [MachineVerifier] Try harder to verify analyses
If I apply just the MachineVerifier part of this patch then I see a couple of Hexagon CodeGen tests failing with
Bad machine code: Multiple connected components in live interval
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