[sve] clang failed to tail folding optimization compare to gcc

[vfdff]

• test: https://gcc.godbolt.org/z/4Ks98cP1W

real_t s311(struct args_t * func_args)
{
    real_t sum = (real_t)0.;
    for (int i = 0; i < LEN_1D; i++) {
        sum += a[i];
    }

    return sum;
}

• gcc: use whilelo to fold the tail loop

.L2:
        ld1w    z31.s, p7/z, [x2, x0, lsl 2]
        add     x0, x0, x3
        fadda   s0, p7, s0, z31.s
        whilelo p7.s, w0, w1
        b.any   .L2

• clang: normal branch for the kernel loop body .LBB0_1

.LBB0_1:                                // =>This Inner Loop Header: Depth=1
        ld1w    { z1.s }, p0/z, [x12, x10, lsl #2]
        add     x10, x10, x9
        cmp     x13, x10
        fadda   s0, p0, s0, z1.s
        b.ne    .LBB0_1

[v01dXYZ]

Minimal C code:

#define ARRAY_ALIGNMENT 64
#define LEN_1D 8000

// array definitions
__attribute__((aligned(ARRAY_ALIGNMENT))) float a[LEN_1D];

float s311(struct args_t * func_args)
{
    float sum = 0.;
    for (int i = 0; i < LEN_1D; i++) {
        sum += a[i];
    }

    return sum;
}

common options: -march=armv8-a+sve -O3
clang/llvm options: -mllvm -prefer-predicate-over-epilogue=predicate-else-scalar-epilogue

[llvmbot]

@llvm/issue-subscribers-backend-aarch64

[v01dXYZ]

Summary

The LoopVectorize optimisation pass is the point where the two cases produce different intermediate results.

Analyse of the generated code

The generated code by clang is the following one for LEN_1D := 4*16*125

s311:                                   // @s311
        cntw    x9
        mov     w12, #8000                      // =0x1f40
        sub     w8, w9, #1
        rdvl    x11, #1
        and     x8, x8, x12
        movi    d0, #0000000000000000
        mov     x10, xzr
        lsr     x11, x11, #4
        eor     x13, x8, x12
        adrp    x12, a
        add     x12, x12, :lo12:a
        ptrue   p0.s
.LBB0_1:                                // =>This Inner Loop Header: Depth=1
        ld1w    { z1.s }, p0/z, [x12, x10, lsl #2]
        add     x10, x10, x9
        cmp     x13, x10
        fadda   s0, p0, s0, z1.s
        b.ne    .LBB0_1
        cbz     x8, .LBB0_5
        mov     w10, #8000                      // =0x1f40
        udiv    x9, x10, x9
        umull   x9, w9, w11
        add     x9, x12, x9, lsl #4
.LBB0_4:                                // =>This Inner Loop Header: Depth=1
        ldr     s1, [x9], #4
        subs    x8, x8, #1
        fadd    s0, s0, s1
        b.ne    .LBB0_4
.LBB0_5:
        ret

Using cntw + ptrue for loop init and b.ne for loop branch occurs strictly when LEN_1D is a multiple of 64, which is 4 float (= v4f32) * 16. Let's remind both cntw and ptrue default pattern is ALL.

To compare with the generate code with LEN_1D := 4*16*125 + 1:

s311:                                   // @s311
        mov     w9, #8001                       // =0x1f41
        movi    d0, #0000000000000000
        mov     x8, xzr
        adrp    x11, a
        add     x11, x11, :lo12:a
        cntw    x10
        whilelo p0.s, xzr, x9
.LBB0_1:                                // =>This Inner Loop Header: Depth=1
        ld1w    { z1.s }, p0/z, [x11, x8, lsl #2]
        add     x8, x8, x10
        fadda   s0, p0, s0, z1.s
        whilelo p0.s, x8, x9
        b.mi    .LBB0_1
        ret

Finally, the code generated by gcc:

s311:
        movi    v0.2s, #0
        adrp    x2, a
        add     x2, x2, :lo12:a
        mov     x0, 0
        cntw    x3
        mov     w1, 8000
        whilelo p7.s, wzr, w1
.L2:
        ld1w    z31.s, p7/z, [x2, x0, lsl 2]
        add     x0, x0, x3
        fadda   s0, p7, s0, z31.s
        whilelo p7.s, w0, w1
        b.any   .L2
        ret

Differences between the emitted IR

LEN_1D := 4*16*125

define dso_local float @s311(ptr nocapture noundef readnone %0) local_unnamed_addr #0 !dbg !57 {
  call void @llvm.dbg.value(metadata ptr %0, metadata !63, metadata !DIExpression()), !dbg !67
  call void @llvm.dbg.value(metadata float 0.000000e+00, metadata !64, metadata !DIExpression()), !dbg !67
  call void @llvm.dbg.value(metadata i32 0, metadata !65, metadata !DIExpression()), !dbg !68
  %2 = tail call i64 @llvm.vscale.i64(), !dbg !69
  %3 = shl nuw nsw i64 %2, 2, !dbg !69
  %4 = urem i64 8000, %3, !dbg !69
  %5 = sub nuw nsw i64 8000, %4, !dbg !69
  %6 = tail call i64 @llvm.vscale.i64()
  %7 = shl nuw nsw i64 %6, 2
  br label %8, !dbg !69

8:                                                ; preds = %8, %1
  %9 = phi i64 [ 0, %1 ], [ %14, %8 ], !dbg !70
  %10 = phi float [ 0.000000e+00, %1 ], [ %13, %8 ]
  %11 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %9, !dbg !72
  %12 = load <vscale x 4 x float>, ptr %11, align 16, !dbg !72
  %13 = tail call float @llvm.vector.reduce.fadd.nxv4f32(float %10, <vscale x 4 x float> %12), !dbg !72
  %14 = add nuw i64 %9, %7, !dbg !70
  %15 = icmp eq i64 %14, %5, !dbg !70
  br i1 %15, label %16, label %8, !dbg !70

16:                                               ; preds = %8
  %17 = icmp eq i64 %4, 0, !dbg !69
  br i1 %17, label %18, label %20, !dbg !69

18:                                               ; preds = %20, %16
  %19 = phi float [ %13, %16 ], [ %25, %20 ], !dbg !83
  ret float %19, !dbg !84

20:                                               ; preds = %16, %20
  %21 = phi i64 [ %26, %20 ], [ %5, %16 ]
  %22 = phi float [ %25, %20 ], [ %13, %16 ]
  call void @llvm.dbg.value(metadata i64 %21, metadata !65, metadata !DIExpression()), !dbg !68
  call void @llvm.dbg.value(metadata float %22, metadata !64, metadata !DIExpression()), !dbg !67
  %23 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %21, !dbg !72
  %24 = load float, ptr %23, align 4, !dbg !72
  %25 = fadd float %22, %24, !dbg !83
  call void @llvm.dbg.value(metadata float %25, metadata !64, metadata !DIExpression()), !dbg !67
  %26 = add nuw nsw i64 %21, 1, !dbg !70
  call void @llvm.dbg.value(metadata i64 %26, metadata !65, metadata !DIExpression()), !dbg !68
  %27 = icmp eq i64 %26, 8000, !dbg !85
  br i1 %27, label %18, label %20, !dbg !69
}

LEN_1D := 4*16*125+1

define dso_local float @s311(ptr nocapture noundef readnone %0) local_unnamed_addr #0 !dbg !57 {
  call void @llvm.dbg.value(metadata ptr %0, metadata !63, metadata !DIExpression()), !dbg !67
  call void @llvm.dbg.value(metadata float 0.000000e+00, metadata !64, metadata !DIExpression()), !dbg !67
  call void @llvm.dbg.value(metadata i32 0, metadata !65, metadata !DIExpression()), !dbg !68
  %2 = tail call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i64(i64 0, i64 8001), !dbg !69
  %3 = tail call i64 @llvm.vscale.i64()
  %4 = shl nuw nsw i64 %3, 2
  br label %5, !dbg !71

5:                                                ; preds = %5, %1
  %6 = phi i64 [ 0, %1 ], [ %13, %5 ], !dbg !69
  %7 = phi <vscale x 4 x i1> [ %2, %1 ], [ %14, %5 ]
  %8 = phi float [ 0.000000e+00, %1 ], [ %12, %5 ]
  %9 = getelementptr inbounds [8001 x float], ptr @a, i64 0, i64 %6, !dbg !72
  %10 = tail call <vscale x 4 x float> @llvm.masked.load.nxv4f32.p0(ptr nonnull %9, i32 4, <vscale x 4 x i1> %7, <vscale x 4 x float> poison), !dbg !72
  %11 = select <vscale x 4 x i1> %7, <vscale x 4 x float> %10, <vscale x 4 x float> shufflevector (<vscale x 4 x float> insertelement (<vscale x 4 x float> poison, float -0.000000e+00, i64 0), <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer), !dbg !72
  %12 = tail call float @llvm.vector.reduce.fadd.nxv4f32(float %8, <vscale x 4 x float> %11), !dbg !72
  %13 = add i64 %6, %4, !dbg !69
  %14 = tail call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i64(i64 %13, i64 8001), !dbg !69
  %15 = extractelement <vscale x 4 x i1> %14, i64 0, !dbg !69
  br i1 %15, label %5, label %16, !dbg !69

16:                                               ; preds = %5
  ret float %12, !dbg !83
}

Understanding which opt pass is responsible

It seems it is LoopVectorizePass.

Emitted non optimised IR by clang

target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-gnu"

@a = dso_local global [8001 x float] zeroinitializer, align 64

; Function Attrs: nounwind uwtable vscale_range(1,16)
define dso_local float @s_8000(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca float, align 4
  %4 = alloca i32, align 4
  store ptr %0, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store float 0.000000e+00, ptr %3, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4
  br label %5

5:                                                ; preds = %16, %1
  %6 = load i32, ptr %4, align 4
  %7 = icmp slt i32 %6, 8000
  br i1 %7, label %9, label %8

8:                                                ; preds = %5
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  br label %19

9:                                                ; preds = %5
  %10 = load i32, ptr %4, align 4
  %11 = sext i32 %10 to i64
  %12 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %11
  %13 = load float, ptr %12, align 4
  %14 = load float, ptr %3, align 4
  %15 = fadd float %14, %13
  store float %15, ptr %3, align 4
  br label %16

16:                                               ; preds = %9
  %17 = load i32, ptr %4, align 4
  %18 = add nsw i32 %17, 1
  store i32 %18, ptr %4, align 4
  br label %5

19:                                               ; preds = %8
  %20 = load float, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret float %20
}

define dso_local float @s_8001(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca float, align 4
  %4 = alloca i32, align 4
  store ptr %0, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store float 0.000000e+00, ptr %3, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4
  br label %5

5:                                                ; preds = %16, %1
  %6 = load i32, ptr %4, align 4
  %7 = icmp slt i32 %6, 8001
  br i1 %7, label %9, label %8

8:                                                ; preds = %5
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  br label %19

9:                                                ; preds = %5
  %10 = load i32, ptr %4, align 4
  %11 = sext i32 %10 to i64
  %12 = getelementptr inbounds [8001 x float], ptr @a, i64 0, i64 %11
  %13 = load float, ptr %12, align 4
  %14 = load float, ptr %3, align 4
  %15 = fadd float %14, %13
  store float %15, ptr %3, align 4
  br label %16

16:                                               ; preds = %9
  %17 = load i32, ptr %4, align 4
  %18 = add nsw i32 %17, 1
  store i32 %18, ptr %4, align 4
  br label %5

19:                                               ; preds = %8
  %20 = load float, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret float %20
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare void @llvm.dbg.declare(metadata, metadata, metadata) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { nounwind uwtable vscale_range(1,16) "frame-pointer"="non-leaf" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+v8a,-fmv" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

Result:

define dso_local float @s_8000(ptr nocapture noundef readnone %0) local_unnamed_addr #0 {
vector.ph:
  %1 = tail call i64 @llvm.vscale.i64()
  %2 = shl nuw nsw i64 %1, 2
  %n.mod.vf = urem i64 8000, %2
  %n.vec = sub nuw nsw i64 8000, %n.mod.vf
  %3 = tail call i64 @llvm.vscale.i64()
  %4 = shl nuw nsw i64 %3, 2
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.phi = phi float [ 0.000000e+00, %vector.ph ], [ %6, %vector.body ]
  %5 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %index
  %wide.load = load <vscale x 4 x float>, ptr %5, align 16
  %6 = tail call float @llvm.vector.reduce.fadd.nxv4f32(float %vec.phi, <vscale x 4 x float> %wide.load)
  %index.next = add nuw i64 %index, %4
  %7 = icmp eq i64 %index.next, %n.vec
  br i1 %7, label %middle.block, label %vector.body, !llvm.loop !0

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %n.mod.vf, 0
  br i1 %cmp.n, label %.loopexit, label %scalar.ph

.loopexit:                                        ; preds = %scalar.ph, %middle.block
  %.lcssa = phi float [ %6, %middle.block ], [ %10, %scalar.ph ]
  ret float %.lcssa

scalar.ph:                                        ; preds = %middle.block, %scalar.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %scalar.ph ], [ %n.vec, %middle.block ]
  %.045 = phi float [ %10, %scalar.ph ], [ %6, %middle.block ]
  %8 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %indvars.iv
  %9 = load float, ptr %8, align 4
  %10 = fadd float %.045, %9
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, 8000
  br i1 %exitcond.not, label %.loopexit, label %scalar.ph, !llvm.loop !3
}

; -------------------------------------------------------------------------

define dso_local float @s_8001(ptr nocapture noundef readnone %0) local_unnamed_addr #0 {
vector.ph:
  %active.lane.mask.entry = tail call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i64(i64 0, i64 8001)
  %1 = tail call i64 @llvm.vscale.i64()
  %2 = shl nuw nsw i64 %1, 2
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %active.lane.mask = phi <vscale x 4 x i1> [ %active.lane.mask.entry, %vector.ph ], [ %active.lane.mask.next, %vector.body ]
  %vec.phi = phi float [ 0.000000e+00, %vector.ph ], [ %5, %vector.body ]
  %3 = getelementptr inbounds [8001 x float], ptr @a, i64 0, i64 %index
  %wide.masked.load = tail call <vscale x 4 x float> @llvm.masked.load.nxv4f32.p0(ptr nonnull %3, i32 4, <vscale x 4 x i1> %active.lane.mask, <vscale x 4 x float> poison)
  %4 = select <vscale x 4 x i1> %active.lane.mask, <vscale x 4 x float> %wide.masked.load, <vscale x 4 x float> shufflevector (<vscale x 4 x float> insertelement (<vscale x 4 x float> poison, float -0.000000e+00, i64 0), <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer)
  %5 = tail call float @llvm.vector.reduce.fadd.nxv4f32(float %vec.phi, <vscale x 4 x float> %4)
  %index.next = add i64 %index, %2
  %active.lane.mask.next = tail call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i64(i64 %index.next, i64 8001)
  %6 = extractelement <vscale x 4 x i1> %active.lane.mask.next, i64 0
  br i1 %6, label %vector.body, label %middle.block, !llvm.loop !0

middle.block:                                     ; preds = %vector.body
  ret float %5
}

Understanding LoopVectorize

debug opt: --debug-only loop-vectorize
cmd opt: -O3 -prefer-predicate-over-epilogue=predicate-else-scalar-epilogue

Common input for both cases (except 8000 <-> 8001)

define dso_local float @s_8001(ptr nocapture noundef readnone %0) local_unnamed_addr #0 {
  br label %3

2:                                                ; preds = %3
  %.lcssa = phi float [ %6, %3 ]
  ret float %.lcssa

3:                                                ; preds = %1, %3
  %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
  %.045 = phi float [ 0.000000e+00, %1 ], [ %6, %3 ]
  %4 = getelementptr inbounds [8001 x float], ptr @a, i64 0, i64 %indvars.iv
  %5 = load float, ptr %4, align 4
  %6 = fadd float %.045, %5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, 8001
  br i1 %exitcond.not, label %2, label %3
}

Result:

8000

LV: Checking a loop in 's_8000' from <source>
LV: Loop hints: force=? width=vscale x 0 interleave=0
LV: Found a loop: 
LV: Found an induction variable.
LV: Found FP op with unsafe algebra.
LV: We can vectorize this loop!
LV: Found trip count: 8000
LV: vector predicate hint/switch found.
LV: Not allowing scalar epilogue, creating predicated vector loop.
LV: Scalable vectorization is available
LV: The max safe fixed VF is: 67108864.
LV: The max safe scalable VF is: vscale x 4294967295.
LV: The Smallest and Widest types: 32 / 32 bits.
LV: The Widest register safe to use is: 128 bits.
LV(REG): Calculating max register usage:
LV(REG): At #0 Interval # 0
LV(REG): At #1 Interval # 1
LV(REG): At #2 Interval # 2
LV(REG): At #3 Interval # 3
LV(REG): At #4 Interval # 3
LV(REG): At #5 Interval # 2
LV(REG): At #6 Interval # 2
LV: The Widest register safe to use is: vscale x 128 bits.
LV: Found feasible scalable VF = vscale x 4
LV: No tail will remain for any chosen VF.
LV: Found uniform instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8000
LV: Found uniform instruction:   %4 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found uniform instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found uniform instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found scalar instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found scalar instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found uniform instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8000
LV: Found uniform instruction:   %4 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found uniform instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found uniform instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found scalar instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found scalar instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found uniform instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8000
LV: Found uniform instruction:   %4 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found uniform instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found uniform instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found uniform instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8000
LV: Found uniform instruction:   %4 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found uniform instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found uniform instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found uniform instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8000
LV: Found uniform instruction:   %4 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found uniform instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found uniform instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Using inloop reduction for phi:   %.045 = phi float [ 0.000000e+00, %1 ], [ %6, %3 ]
LV: Scalarizing:  %4 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Scalarizing:  %5 = load float, ptr %4, align 4
LV: Scalarizing:  %6 = fadd float %.045, %5
LV: Scalarizing:  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Scalarizing:  %exitcond.not = icmp eq i64 %indvars.iv.next, 8000
LV: Scalarizing:  %4 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Scalarizing:  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Scalarizing:  %exitcond.not = icmp eq i64 %indvars.iv.next, 8000
LV: Scalarizing:  %4 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Scalarizing:  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Scalarizing:  %exitcond.not = icmp eq i64 %indvars.iv.next, 8000
VPlan 'Initial VPlan for VF={1},UF>=1' {
Live-in vp<%0> = vector-trip-count
Live-in ir<8000> = original trip-count

vector.ph:
Successor(s): vector loop

<x1> vector loop: {
  vector.body:
    EMIT vp<%1> = CANONICAL-INDUCTION
    WIDEN-REDUCTION-PHI ir<%.045> = phi ir<0.000000e+00>, ir<%6>
    vp<%3>    = SCALAR-STEPS vp<%1>, ir<1>
    CLONE ir<%4> = getelementptr inbounds ir<@a>, ir<0>, vp<%3>
    CLONE ir<%5> = load ir<%4>
    REDUCE ir<%6> = ir<%.045> + reduce.fadd (ir<%5>)
    EMIT vp<%7> = VF * UF +(nuw)  vp<%1>
    EMIT branch-on-count  vp<%7> vp<%0>
  No successors
}
Successor(s): middle.block

middle.block:
No successors

Live-out float %.lcssa = ir<%6>
}
VPlan 'Initial VPlan for VF={2,4},UF>=1' {
Live-in vp<%0> = vector-trip-count
Live-in ir<8000> = original trip-count

vector.ph:
Successor(s): vector loop

<x1> vector loop: {
  vector.body:
    EMIT vp<%1> = CANONICAL-INDUCTION
    WIDEN-REDUCTION-PHI ir<%.045> = phi ir<0.000000e+00>, ir<%6>
    vp<%3>    = SCALAR-STEPS vp<%1>, ir<1>
    CLONE ir<%4> = getelementptr inbounds ir<@a>, ir<0>, vp<%3>
    WIDEN ir<%5> = load ir<%4>
    REDUCE ir<%6> = ir<%.045> + reduce.fadd (ir<%5>)
    EMIT vp<%7> = VF * UF +(nuw)  vp<%1>
    EMIT branch-on-count  vp<%7> vp<%0>
  No successors
}
Successor(s): middle.block

middle.block:
No successors

Live-out float %.lcssa = ir<%6>
}
VPlan 'Initial VPlan for VF={vscale x 1,vscale x 2,vscale x 4},UF>=1' {
Live-in vp<%0> = vector-trip-count
Live-in ir<8000> = original trip-count

vector.ph:
Successor(s): vector loop

<x1> vector loop: {
  vector.body:
    EMIT vp<%1> = CANONICAL-INDUCTION
    WIDEN-REDUCTION-PHI ir<%.045> = phi ir<0.000000e+00>, ir<%6>
    vp<%3>    = SCALAR-STEPS vp<%1>, ir<1>
    CLONE ir<%4> = getelementptr inbounds ir<@a>, ir<0>, vp<%3>
    WIDEN ir<%5> = load ir<%4>
    REDUCE ir<%6> = ir<%.045> + reduce.fadd (ir<%5>)
    EMIT vp<%7> = VF * UF +(nuw)  vp<%1>
    EMIT branch-on-count  vp<%7> vp<%0>
  No successors
}
Successor(s): middle.block

middle.block:
No successors

Live-out float %.lcssa = ir<%6>
}
LV: Found an estimated cost of 0 for VF 1 For instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found an estimated cost of 0 for VF 1 For instruction:   %.045 = phi float [ 0.000000e+00, %1 ], [ %6, %3 ]
LV: Found an estimated cost of 0 for VF 1 For instruction:   %4 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found an estimated cost of 2 for VF 1 For instruction:   %5 = load float, ptr %4, align 4
LV: Found an estimated cost of 1 for VF 1 For instruction:   %6 = fadd float %.045, %5
LV: Found an estimated cost of 1 for VF 1 For instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found an estimated cost of 1 for VF 1 For instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8000
LV: Found an estimated cost of 0 for VF 1 For instruction:   br i1 %exitcond.not, label %2, label %3
LV: Scalar loop costs: 5.
LV: Found an estimated cost of 0 for VF 2 For instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found an estimated cost of 0 for VF 2 For instruction:   %.045 = phi float [ 0.000000e+00, %1 ], [ %6, %3 ]
LV: Found an estimated cost of 0 for VF 2 For instruction:   %4 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found an estimated cost of 1 for VF 2 For instruction:   %5 = load float, ptr %4, align 4
LV: Found an estimated cost of 7 for VF 2 For instruction:   %6 = fadd float %.045, %5
LV: Found an estimated cost of 1 for VF 2 For instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found an estimated cost of 1 for VF 2 For instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8000
LV: Found an estimated cost of 0 for VF 2 For instruction:   br i1 %exitcond.not, label %2, label %3
LV: Vector loop of width 2 costs: 5.
LV: Found an estimated cost of 0 for VF 4 For instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found an estimated cost of 0 for VF 4 For instruction:   %.045 = phi float [ 0.000000e+00, %1 ], [ %6, %3 ]
LV: Found an estimated cost of 0 for VF 4 For instruction:   %4 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found an estimated cost of 1 for VF 4 For instruction:   %5 = load float, ptr %4, align 4
LV: Found an estimated cost of 17 for VF 4 For instruction:   %6 = fadd float %.045, %5
LV: Found an estimated cost of 1 for VF 4 For instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found an estimated cost of 1 for VF 4 For instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8000
LV: Found an estimated cost of 0 for VF 4 For instruction:   br i1 %exitcond.not, label %2, label %3
LV: Vector loop of width 4 costs: 5.
LV: Found an estimated cost of 0 for VF vscale x 1 For instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found an estimated cost of 0 for VF vscale x 1 For instruction:   %.045 = phi float [ 0.000000e+00, %1 ], [ %6, %3 ]
LV: Found an estimated cost of 0 for VF vscale x 1 For instruction:   %4 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found an estimated cost of Invalid for VF vscale x 1 For instruction:   %5 = load float, ptr %4, align 4
LV: Found an estimated cost of 2 for VF vscale x 1 For instruction:   %6 = fadd float %.045, %5
LV: Found an estimated cost of 1 for VF vscale x 1 For instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found an estimated cost of 1 for VF vscale x 1 For instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8000
LV: Found an estimated cost of 0 for VF vscale x 1 For instruction:   br i1 %exitcond.not, label %2, label %3
LV: Vector loop of width vscale x 1 costs: Invalid (assuming a minimum vscale of 2).
LV: Found an estimated cost of 0 for VF vscale x 2 For instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found an estimated cost of 0 for VF vscale x 2 For instruction:   %.045 = phi float [ 0.000000e+00, %1 ], [ %6, %3 ]
LV: Found an estimated cost of 0 for VF vscale x 2 For instruction:   %4 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found an estimated cost of 1 for VF vscale x 2 For instruction:   %5 = load float, ptr %4, align 4
LV: Found an estimated cost of 4 for VF vscale x 2 For instruction:   %6 = fadd float %.045, %5
LV: Found an estimated cost of 1 for VF vscale x 2 For instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found an estimated cost of 1 for VF vscale x 2 For instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8000
LV: Found an estimated cost of 0 for VF vscale x 2 For instruction:   br i1 %exitcond.not, label %2, label %3
LV: Vector loop of width vscale x 2 costs: 1 (assuming a minimum vscale of 2).
LV: Found an estimated cost of 0 for VF vscale x 4 For instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found an estimated cost of 0 for VF vscale x 4 For instruction:   %.045 = phi float [ 0.000000e+00, %1 ], [ %6, %3 ]
LV: Found an estimated cost of 0 for VF vscale x 4 For instruction:   %4 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found an estimated cost of 1 for VF vscale x 4 For instruction:   %5 = load float, ptr %4, align 4
LV: Found an estimated cost of 8 for VF vscale x 4 For instruction:   %6 = fadd float %.045, %5
LV: Found an estimated cost of 1 for VF vscale x 4 For instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found an estimated cost of 1 for VF vscale x 4 For instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8000
LV: Found an estimated cost of 0 for VF vscale x 4 For instruction:   br i1 %exitcond.not, label %2, label %3
LV: Vector loop of width vscale x 4 costs: 1 (assuming a minimum vscale of 2).
LV: Instruction with invalid costs prevented vectorization at VF=(vscale x 1): load   %5 = load float, ptr %4, align 4
LV: Interleaving disabled by the pass manager
LV: Selecting VF: vscale x 4.
LV: Minimum required TC for runtime checks to be profitable:0
LV: Interleaving is not beneficial.
LV: Found a vectorizable loop (vscale x 4) in <source>
LEV: Unable to vectorize epilogue because no epilogue is allowed.
Executing best plan with VF=vscale x 4, UF=1
LV: Interleaving disabled by the pass manager
Compiler returned: 0

8001

LV: Checking a loop in 's_8001' from <source>
LV: Loop hints: force=? width=vscale x 0 interleave=0
LV: Found a loop: 
LV: Found an induction variable.
LV: Found FP op with unsafe algebra.
LV: We can vectorize this loop!
LV: Found trip count: 8001
LV: vector predicate hint/switch found.
LV: Not allowing scalar epilogue, creating predicated vector loop.
LV: Scalable vectorization is available
LV: The max safe fixed VF is: 67108864.
LV: The max safe scalable VF is: vscale x 4294967295.
LV: The Smallest and Widest types: 32 / 32 bits.
LV: The Widest register safe to use is: 128 bits.
LV(REG): Calculating max register usage:
LV(REG): At #0 Interval # 0
LV(REG): At #1 Interval # 1
LV(REG): At #2 Interval # 2
LV(REG): At #3 Interval # 3
LV(REG): At #4 Interval # 3
LV(REG): At #5 Interval # 2
LV(REG): At #6 Interval # 2
LV: The Widest register safe to use is: vscale x 128 bits.
LV: Found feasible scalable VF = vscale x 4
LV: checking if tail can be folded by masking.
LV: can fold tail by masking.
LV: Found uniform instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8001
LV: Found uniform instruction:   %4 = getelementptr inbounds [8001 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found uniform instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found uniform instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found uniform instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8001
LV: Found uniform instruction:   %4 = getelementptr inbounds [8001 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found uniform instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found uniform instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found uniform instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8001
LV: Found uniform instruction:   %4 = getelementptr inbounds [8001 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found uniform instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found uniform instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found uniform instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8001
LV: Found uniform instruction:   %4 = getelementptr inbounds [8001 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found uniform instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found uniform instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found uniform instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8001
LV: Found uniform instruction:   %4 = getelementptr inbounds [8001 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found uniform instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found uniform instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Using inloop reduction for phi:   %.045 = phi float [ 0.000000e+00, %1 ], [ %6, %3 ]
LV: Scalarizing:  %4 = getelementptr inbounds [8001 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Scalarizing and predicating:  %5 = load float, ptr %4, align 4
LV: Scalarizing:  %6 = fadd float %.045, %5
LV: Scalarizing:  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Scalarizing:  %exitcond.not = icmp eq i64 %indvars.iv.next, 8001
LV: Scalarizing:  %4 = getelementptr inbounds [8001 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Scalarizing:  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Scalarizing:  %exitcond.not = icmp eq i64 %indvars.iv.next, 8001
LV: Scalarizing:  %4 = getelementptr inbounds [8001 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Scalarizing:  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Scalarizing:  %exitcond.not = icmp eq i64 %indvars.iv.next, 8001
VPlan 'Initial VPlan for VF={1},UF>=1' {
Live-in ir<8001> = original trip-count

vector.ph:
  EMIT vp<%1> = VF * Part +  ir<0>
  EMIT vp<%2> = active lane mask vp<%1> ir<8001>
Successor(s): vector loop

<x1> vector loop: {
  vector.body:
    EMIT vp<%3> = CANONICAL-INDUCTION
    ACTIVE-LANE-MASK-PHI vp<%4> = phi vp<%2>, vp<%13>
    WIDEN-REDUCTION-PHI ir<%.045> = phi ir<0.000000e+00>, ir<%6>
  Successor(s): pred.load

  <xVFxUF> pred.load: {
    pred.load.entry:
      BRANCH-ON-MASK vp<%4>
    Successor(s): pred.load.if, pred.load.continue

    pred.load.if:
      vp<%6>      = SCALAR-STEPS vp<%3>, ir<1>
      CLONE ir<%4> = getelementptr inbounds ir<@a>, ir<0>, vp<%6>
      CLONE ir<%5> = load ir<%4> (S->V)
    Successor(s): pred.load.continue

    pred.load.continue:
      PHI-PREDICATED-INSTRUCTION vp<%9> = ir<%5>
    No successors
  }
  Successor(s): 

  :
    REDUCE ir<%6> = ir<%.045> + reduce.fadd (vp<%9>, vp<%4>)
    EMIT vp<%11> = VF * UF +  vp<%3>
    EMIT vp<%12> = VF * Part +  vp<%11>
    EMIT vp<%13> = active lane mask vp<%12> ir<8001>
    EMIT vp<%14> = not vp<%13>
    EMIT branch-on-cond vp<%14>
  No successors
}
Successor(s): middle.block

middle.block:
No successors

Live-out float %.lcssa = ir<%6>
}
VPlan 'Initial VPlan for VF={2,4},UF>=1' {
Live-in ir<8001> = original trip-count

vector.ph:
  EMIT vp<%1> = VF * Part +  ir<0>
  EMIT vp<%2> = active lane mask vp<%1> ir<8001>
Successor(s): vector loop

<x1> vector loop: {
  vector.body:
    EMIT vp<%3> = CANONICAL-INDUCTION
    ACTIVE-LANE-MASK-PHI vp<%4> = phi vp<%2>, vp<%12>
    WIDEN-REDUCTION-PHI ir<%.045> = phi ir<0.000000e+00>, ir<%6>
    vp<%6>    = SCALAR-STEPS vp<%3>, ir<1>
    CLONE ir<%4> = getelementptr inbounds ir<@a>, ir<0>, vp<%6>
    WIDEN ir<%5> = load ir<%4>, vp<%4>
    REDUCE ir<%6> = ir<%.045> + reduce.fadd (ir<%5>, vp<%4>)
    EMIT vp<%10> = VF * UF +  vp<%3>
    EMIT vp<%11> = VF * Part +  vp<%10>
    EMIT vp<%12> = active lane mask vp<%11> ir<8001>
    EMIT vp<%13> = not vp<%12>
    EMIT branch-on-cond vp<%13>
  No successors
}
Successor(s): middle.block

middle.block:
No successors

Live-out float %.lcssa = ir<%6>
}
VPlan 'Initial VPlan for VF={vscale x 1,vscale x 2,vscale x 4},UF>=1' {
Live-in ir<8001> = original trip-count

vector.ph:
  EMIT vp<%1> = VF * Part +  ir<0>
  EMIT vp<%2> = active lane mask vp<%1> ir<8001>
Successor(s): vector loop

<x1> vector loop: {
  vector.body:
    EMIT vp<%3> = CANONICAL-INDUCTION
    ACTIVE-LANE-MASK-PHI vp<%4> = phi vp<%2>, vp<%12>
    WIDEN-REDUCTION-PHI ir<%.045> = phi ir<0.000000e+00>, ir<%6>
    vp<%6>    = SCALAR-STEPS vp<%3>, ir<1>
    CLONE ir<%4> = getelementptr inbounds ir<@a>, ir<0>, vp<%6>
    WIDEN ir<%5> = load ir<%4>, vp<%4>
    REDUCE ir<%6> = ir<%.045> + reduce.fadd (ir<%5>, vp<%4>)
    EMIT vp<%10> = VF * UF +  vp<%3>
    EMIT vp<%11> = VF * Part +  vp<%10>
    EMIT vp<%12> = active lane mask vp<%11> ir<8001>
    EMIT vp<%13> = not vp<%12>
    EMIT branch-on-cond vp<%13>
  No successors
}
Successor(s): middle.block

middle.block:
No successors

Live-out float %.lcssa = ir<%6>
}
LV: Found an estimated cost of 0 for VF 1 For instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found an estimated cost of 0 for VF 1 For instruction:   %.045 = phi float [ 0.000000e+00, %1 ], [ %6, %3 ]
LV: Found an estimated cost of 0 for VF 1 For instruction:   %4 = getelementptr inbounds [8001 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found an estimated cost of 2 for VF 1 For instruction:   %5 = load float, ptr %4, align 4
LV: Found an estimated cost of 1 for VF 1 For instruction:   %6 = fadd float %.045, %5
LV: Found an estimated cost of 1 for VF 1 For instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found an estimated cost of 1 for VF 1 For instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8001
LV: Found an estimated cost of 0 for VF 1 For instruction:   br i1 %exitcond.not, label %2, label %3
LV: Scalar loop costs: 5.
LV: Found an estimated cost of 0 for VF 2 For instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found an estimated cost of 0 for VF 2 For instruction:   %.045 = phi float [ 0.000000e+00, %1 ], [ %6, %3 ]
LV: Found an estimated cost of 0 for VF 2 For instruction:   %4 = getelementptr inbounds [8001 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found an estimated cost of 11 for VF 2 For instruction:   %5 = load float, ptr %4, align 4
LV: Found an estimated cost of 7 for VF 2 For instruction:   %6 = fadd float %.045, %5
LV: Found an estimated cost of 1 for VF 2 For instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found an estimated cost of 1 for VF 2 For instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8001
LV: Found an estimated cost of 0 for VF 2 For instruction:   br i1 %exitcond.not, label %2, label %3
LV: Vector loop of width 2 costs: 10.
LV: Found an estimated cost of 0 for VF 4 For instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found an estimated cost of 0 for VF 4 For instruction:   %.045 = phi float [ 0.000000e+00, %1 ], [ %6, %3 ]
LV: Found an estimated cost of 0 for VF 4 For instruction:   %4 = getelementptr inbounds [8001 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found an estimated cost of 25 for VF 4 For instruction:   %5 = load float, ptr %4, align 4
LV: Found an estimated cost of 17 for VF 4 For instruction:   %6 = fadd float %.045, %5
LV: Found an estimated cost of 1 for VF 4 For instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found an estimated cost of 1 for VF 4 For instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8001
LV: Found an estimated cost of 0 for VF 4 For instruction:   br i1 %exitcond.not, label %2, label %3
LV: Vector loop of width 4 costs: 11.
LV: Found an estimated cost of 0 for VF vscale x 1 For instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found an estimated cost of 0 for VF vscale x 1 For instruction:   %.045 = phi float [ 0.000000e+00, %1 ], [ %6, %3 ]
LV: Found an estimated cost of 0 for VF vscale x 1 For instruction:   %4 = getelementptr inbounds [8001 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found an estimated cost of Invalid for VF vscale x 1 For instruction:   %5 = load float, ptr %4, align 4
LV: Found an estimated cost of 2 for VF vscale x 1 For instruction:   %6 = fadd float %.045, %5
LV: Found an estimated cost of 1 for VF vscale x 1 For instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found an estimated cost of 1 for VF vscale x 1 For instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8001
LV: Found an estimated cost of 0 for VF vscale x 1 For instruction:   br i1 %exitcond.not, label %2, label %3
LV: Vector loop of width vscale x 1 costs: Invalid (assuming a minimum vscale of 2).
LV: Found an estimated cost of 0 for VF vscale x 2 For instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found an estimated cost of 0 for VF vscale x 2 For instruction:   %.045 = phi float [ 0.000000e+00, %1 ], [ %6, %3 ]
LV: Found an estimated cost of 0 for VF vscale x 2 For instruction:   %4 = getelementptr inbounds [8001 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found an estimated cost of 1 for VF vscale x 2 For instruction:   %5 = load float, ptr %4, align 4
LV: Found an estimated cost of 4 for VF vscale x 2 For instruction:   %6 = fadd float %.045, %5
LV: Found an estimated cost of 1 for VF vscale x 2 For instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found an estimated cost of 1 for VF vscale x 2 For instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8001
LV: Found an estimated cost of 0 for VF vscale x 2 For instruction:   br i1 %exitcond.not, label %2, label %3
LV: Vector loop of width vscale x 2 costs: 1 (assuming a minimum vscale of 2).
LV: Found an estimated cost of 0 for VF vscale x 4 For instruction:   %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next, %3 ]
LV: Found an estimated cost of 0 for VF vscale x 4 For instruction:   %.045 = phi float [ 0.000000e+00, %1 ], [ %6, %3 ]
LV: Found an estimated cost of 0 for VF vscale x 4 For instruction:   %4 = getelementptr inbounds [8001 x float], ptr @a, i64 0, i64 %indvars.iv
LV: Found an estimated cost of 1 for VF vscale x 4 For instruction:   %5 = load float, ptr %4, align 4
LV: Found an estimated cost of 8 for VF vscale x 4 For instruction:   %6 = fadd float %.045, %5
LV: Found an estimated cost of 1 for VF vscale x 4 For instruction:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
LV: Found an estimated cost of 1 for VF vscale x 4 For instruction:   %exitcond.not = icmp eq i64 %indvars.iv.next, 8001
LV: Found an estimated cost of 0 for VF vscale x 4 For instruction:   br i1 %exitcond.not, label %2, label %3
LV: Vector loop of width vscale x 4 costs: 1 (assuming a minimum vscale of 2).
LV: Instruction with invalid costs prevented vectorization at VF=(vscale x 1): load   %5 = load float, ptr %4, align 4
LV: Interleaving disabled by the pass manager
LV: Selecting VF: vscale x 4.
LV: Minimum required TC for runtime checks to be profitable:0
LV: Interleaving is not beneficial.
LV: Found a vectorizable loop (vscale x 4) in <source>
LEV: Unable to vectorize epilogue because no epilogue is allowed.
Executing best plan with VF=vscale x 4, UF=1
LV: Interleaving disabled by the pass manager
Compiler returned: 0

[david-arm]

I don't think this is a bug - it's expected behaviour. I believe clang is doing the right thing here because we can prove the loop predicate p0 is always all-true. I think clang is choosing the more optimal form of the loop by avoiding using the while instruction (instead using the cheaper add instruction) to maintain a predicate.

[davemgreen]

I think part of the problem is that we don't clean up the code after vectorization. The vectorizer knows that vscale is a power of 2, so doesn't need to fold the tail. The rest of the pass pipeline doesn't know that though, so doesn't know that the checks for the scalar remainder will always be false.

[v01dXYZ]

@davemgreen Are you sure the vscale is a power of two ? Isn't it possible to have it simply an integer ?

Here an except from "Introduction to SVE"

* An implementation must allow the vector length to be constrained to any power of two.
* An implementation allows the vector length to be constrained to multiples of 128 that are not a power of two.

Does LLVM constraint vscale to be a power of two ? or is it Linux ?

[davemgreen]

See the summary of https://reviews.llvm.org/D141486

[v01dXYZ]

Thanks for the pointer.

So actually there are two problems for the issue:

0. add + b.ne is used instead of whilelo: it's not a problem as the instruction selector recognises the predicate is always ALL as said david-arm and selects lower cost instructions.
1. dead branch: there are not tail so it should be cleaned

Intermediate IR after loop-vectorize

define dso_local float @s_8000(ptr nocapture noundef readnone %0) local_unnamed_addr #0 {
vector.ph:
  %1 = tail call i64 @llvm.vscale.i64()
  %2 = shl nuw nsw i64 %1, 2
  %n.mod.vf = urem i64 8000, %2
  %n.vec = sub nuw nsw i64 8000, %n.mod.vf
  %3 = tail call i64 @llvm.vscale.i64()
  %4 = shl nuw nsw i64 %3, 2
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.phi = phi float [ 0.000000e+00, %vector.ph ], [ %6, %vector.body ]
  %5 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %index
  %wide.load = load <vscale x 4 x float>, ptr %5, align 16
  %6 = tail call float @llvm.vector.reduce.fadd.nxv4f32(float %vec.phi, <vscale x 4 x float> %wide.load)
  %index.next = add nuw i64 %index, %4
  %7 = icmp eq i64 %index.next, %n.vec
  br i1 %7, label %middle.block, label %vector.body, !llvm.loop !0

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %n.mod.vf, 0
  br i1 %cmp.n, label %.loopexit, label %scalar.ph

.loopexit:                                        ; preds = %scalar.ph, %middle.block
  %.lcssa = phi float [ %6, %middle.block ], [ %10, %scalar.ph ]
  ret float %.lcssa

scalar.ph:                                        ; preds = %middle.block, %scalar.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %scalar.ph ], [ %n.vec, %middle.block ]
  %.045 = phi float [ %10, %scalar.ph ], [ %6, %middle.block ]
  %8 = getelementptr inbounds [8000 x float], ptr @a, i64 0, i64 %indvars.iv
  %9 = load float, ptr %8, align 4
  %10 = fadd float %.045, %9
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, 8000
  br i1 %exitcond.not, label %.loopexit, label %scalar.ph, !llvm.loop !3
}

%2 is in the form power(2, n+2) with n an integer in [[0, 4]] which is equal to %1 and thus always divides 64. %n.mod.vf is always 0. The branching to the remainder loop will never occur.

Do you think it is an easy task to add this information to the loop vectoriser cleaner and remove the dead branch ?

Code Analysis

This part is responsible of introducing the conditional branching.

llvm-project/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

Lines 3230 to 3264 in 6c72cee

	BasicBlock *InnerLoopVectorizer::completeLoopSkeleton() {
	// The trip counts should be cached by now.
	Value *Count = getTripCount();
	Value *VectorTripCount = getOrCreateVectorTripCount(LoopVectorPreHeader);
	auto *ScalarLatchTerm = OrigLoop->getLoopLatch()->getTerminator();
	// Add a check in the middle block to see if we have completed
	// all of the iterations in the first vector loop. Three cases:
	// 1) If we require a scalar epilogue, there is no conditional branch as
	// we unconditionally branch to the scalar preheader. Do nothing.
	// 2) If (N - N%VF) == N, then we *don't* need to run the remainder.
	// Thus if tail is to be folded, we know we don't need to run the
	// remainder and we can use the previous value for the condition (true).
	// 3) Otherwise, construct a runtime check.
	if (!Cost->requiresScalarEpilogue(VF.isVector()) &&
	!Cost->foldTailByMasking()) {
	Instruction *CmpN = CmpInst::Create(Instruction::ICmp, CmpInst::ICMP_EQ,
	Count, VectorTripCount, "cmp.n",
	LoopMiddleBlock->getTerminator());
	// Here we use the same DebugLoc as the scalar loop latch terminator instead
	// of the corresponding compare because they may have ended up with
	// different line numbers and we want to avoid awkward line stepping while
	// debugging. Eg. if the compare has got a line number inside the loop.
	CmpN->setDebugLoc(ScalarLatchTerm->getDebugLoc());
	cast<BranchInst>(LoopMiddleBlock->getTerminator())->setCondition(CmpN);
	}
	#ifdef EXPENSIVE_CHECKS
	assert(DT->verify(DominatorTree::VerificationLevel::Fast));
	#endif
	return LoopVectorPreHeader;
	}

We can modify this part or we can add information to Count and VectorTripCount to allow analyses to detect the divisibility.

I suspect the following code does this kind of divisibility analysis (but for something else):

llvm-project/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

Lines 5180 to 5211 in b89b3cd

	// Avoid tail folding if the trip count is known to be a multiple of any VF
	// we choose.
	std::optional<unsigned> MaxPowerOf2RuntimeVF =
	MaxFactors.FixedVF.getFixedValue();
	if (MaxFactors.ScalableVF) {
	std::optional<unsigned> MaxVScale = getMaxVScale(*TheFunction, TTI);
	if (MaxVScale && TTI.isVScaleKnownToBeAPowerOfTwo()) {
	MaxPowerOf2RuntimeVF = std::max<unsigned>(
	*MaxPowerOf2RuntimeVF,
	*MaxVScale * MaxFactors.ScalableVF.getKnownMinValue());
	} else
	MaxPowerOf2RuntimeVF = std::nullopt; // Stick with tail-folding for now.
	}
	if (MaxPowerOf2RuntimeVF && *MaxPowerOf2RuntimeVF > 0) {
	assert((UserVF.isNonZero() || isPowerOf2_32(*MaxPowerOf2RuntimeVF)) &&
	"MaxFixedVF must be a power of 2");
	unsigned MaxVFtimesIC =
	UserIC ? *MaxPowerOf2RuntimeVF * UserIC : *MaxPowerOf2RuntimeVF;
	ScalarEvolution *SE = PSE.getSE();
	const SCEV *BackedgeTakenCount = PSE.getBackedgeTakenCount();
	const SCEV *ExitCount = SE->getAddExpr(
	BackedgeTakenCount, SE->getOne(BackedgeTakenCount->getType()));
	const SCEV *Rem = SE->getURemExpr(
	SE->applyLoopGuards(ExitCount, TheLoop),
	SE->getConstant(BackedgeTakenCount->getType(), MaxVFtimesIC));
	if (Rem->isZero()) {
	// Accept MaxFixedVF if we do not have a tail.
	LLVM_DEBUG(dbgs() << "LV: No tail will remain for any chosen VF.\n");
	return MaxFactors;
	}
	}

[vfdff]

Tried the above improvement with https://reviews.llvm.org/D154314

[v01dXYZ]

david-arm rightfully wants to be sure this removal of the loop remainder is not something that occurs elsewhere, especially at the InstCombine. But when looking at the usage of ScalarEvolution with InstCombine, it seems it's not used at all, so I don't think it is likely a divisibility analysis is done by InstCombine unless it reimplements a partial scalar evolution analysis. Thus, the change proposed could manage cases when the array size is assured to be a multiple of 64, especially when not constant, which could not be possible at all by InstCombine. But I think it could occur in simplify-cfg (after verification, I don't think this is the case too).

[vfdff]

New candidate's MR: https://reviews.llvm.org/D154953