assertion failing in multiple backends "We are expecting that A is always less than all-ones for SVT" #84830
Labels
Comments
|
@llvm/issue-subscribers-backend-aarch64 Author: John Regehr (regehr)
both the AArch64 and x86-64 backends assert out on this input:
```
define i32 @f(i1 %0) {
%new0 = srem i1 %0, true
%last = zext i1 %new0 to i32
%2 = icmp ne i32 %last, 0
%3 = select i1 %2, i32 0, i32 1
ret i32 %3
}
```
|
|
@llvm/issue-subscribers-backend-x86 Author: John Regehr (regehr)
both the AArch64 and x86-64 backends assert out on this input:
```
define i32 @f(i1 %0) {
%new0 = srem i1 %0, true
%last = zext i1 %new0 to i32
%2 = icmp ne i32 %last, 0
%3 = select i1 %2, i32 0, i32 1
ret i32 %3
}
```
|
|
They appear to be failing in llvm::TargetLowering::prepareSREMEqFold https://clang.godbolt.org/z/Pjf8bnrnE |
|
Almost certainly the assertion just needs to be moved above the special case. |
qihangkong
pushed a commit
to rvgpu/llvm
that referenced
this issue
Apr 18, 2024
of non-splat vector SREM expansion when we aren't hitting the special case. Fixes llvm/llvm-project#84830 Introduced in llvm/llvm-project#82706
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
both the AArch64 and x86-64 backends assert out on this input:
The text was updated successfully, but these errors were encountered: