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[CodeGen][RISC-V] Assertion `(!MMO->getSize().hasValue() || !getSize().hasValue() || MMO->getSize() == getSize()) && "Size mismatch!"' failed. #88799

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patrick-rivos opened this issue Apr 15, 2024 · 2 comments · Fixed by #88811
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[CodeGen][RISC-V] Assertion `(!MMO->getSize().hasValue() || !getSize().hasValue() || MMO->getSize() == getSize()) && "Size mismatch!"' failed. #88799

patrick-rivos opened this issue Apr 15, 2024 · 2 comments · Fixed by #88811
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backend:RISC-V

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patrick-rivos commented Apr 15, 2024 •
edited

Reduced LLVM IR:

; ModuleID = 'reduced.bc'
target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
target triple = "riscv64-unknown-linux-gnu"

; Function Attrs: vscale_range(2,2)
define i32 @main() #0 {
vector.body:
  %0 = load <16 x i16>, ptr getelementptr ([3 x [23 x [23 x i16]]], ptr null, i64 -10593, i64 1, i64 22, i64 0), align 16
  store <16 x i16> %0, ptr null, align 2
  %wide.load = load <vscale x 8 x i16>, ptr getelementptr ([3 x [23 x [23 x i16]]], ptr null, i64 -10593, i64 1, i64 22, i64 0), align 16
  store <vscale x 8 x i16> %wide.load, ptr null, align 2
  ret i32 0
}

attributes #0 = { vscale_range(2,2) "target-features"="+64bit,+a,+c,+d,+f,+m,+relax,+v,+zicsr,+zifencei,+zve32f,+zve32x,+zve64d,+zve64f,+zve64x,+zvl128b,+zvl32b,+zvl64b,-e,-experimental-smmpm,-experimental-smnpm,-experimental-ssnpm,-experimental-sspm,-experimental-ssqosid,-experimental-supm,-experimental-zaamo,-experimental-zabha,-experimental-zalasr,-experimental-zalrsc,-experimental-zfbfmin,-experimental-zicfilp,-experimental-zicfiss,-experimental-ztso,-experimental-zvfbfmin,-experimental-zvfbfwma,-h,-shcounterenw,-shgatpa,-shtvala,-shvsatpa,-shvstvala,-shvstvecd,-smaia,-smepmp,-ssaia,-ssccptr,-sscofpmf,-sscounterenw,-ssstateen,-ssstrict,-sstc,-sstvala,-sstvecd,-ssu64xl,-svade,-svadu,-svbare,-svinval,-svnapot,-svpbmt,-xcvalu,-xcvbi,-xcvbitmanip,-xcvelw,-xcvmac,-xcvmem,-xcvsimd,-xsfcease,-xsfvcp,-xsfvfnrclipxfqf,-xsfvfwmaccqqq,-xsfvqmaccdod,-xsfvqmaccqoq,-xsifivecdiscarddlone,-xsifivecflushdlone,-xtheadba,-xtheadbb,-xtheadbs,-xtheadcmo,-xtheadcondmov,-xtheadfmemidx,-xtheadmac,-xtheadmemidx,-xtheadmempair,-xtheadsync,-xtheadvdot,-xventanacondops,-za128rs,-za64rs,-zacas,-zawrs,-zba,-zbb,-zbc,-zbkb,-zbkc,-zbkx,-zbs,-zca,-zcb,-zcd,-zce,-zcf,-zcmop,-zcmp,-zcmt,-zdinx,-zfa,-zfh,-zfhmin,-zfinx,-zhinx,-zhinxmin,-zic64b,-zicbom,-zicbop,-zicboz,-ziccamoa,-ziccif,-zicclsm,-ziccrse,-zicntr,-zicond,-zihintntl,-zihintpause,-zihpm,-zimop,-zk,-zkn,-zknd,-zkne,-zknh,-zkr,-zks,-zksed,-zksh,-zkt,-zmmul,-zvbb,-zvbc,-zvfh,-zvfhmin,-zvkb,-zvkg,-zvkn,-zvknc,-zvkned,-zvkng,-zvknha,-zvknhb,-zvks,-zvksc,-zvksed,-zvksg,-zvksh,-zvkt,-zvl1024b,-zvl16384b,-zvl2048b,-zvl256b,-zvl32768b,-zvl4096b,-zvl512b,-zvl65536b,-zvl8192b" }

Godbolt: https://godbolt.org/z/vPv3d4Tcr

Backtrace:

> /scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc reduced.ll
llc: /scratch/tc-testing/tc-apr-15/llvm/llvm/lib/CodeGen/MachineOperand.cpp:1122: void llvm::MachineMemOperand::refineAlignment(const llvm::MachineMemOperand*): Assertion `(!MMO->getSize().hasValue() || !getSize().hasValue() || MMO->getSize() == getSize()) && "Size mismatch!"' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: /scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc reduced.ll
1.      Running pass 'Function Pass Manager' on module 'reduced.ll'.
2.      Running pass 'RISC-V DAG->DAG Pattern Instruction Selection' on function '@main'
 #0 0x00005d8fadf03d30 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x1cf5d30)
 #1 0x00005d8fadf0113f llvm::sys::RunSignalHandlers() (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x1cf313f)
 #2 0x00005d8fadf01295 SignalHandler(int) Signals.cpp:0:0
 #3 0x00007ebc5d242520 (/lib/x86_64-linux-gnu/libc.so.6+0x42520)
 #4 0x00007ebc5d2969fc __pthread_kill_implementation ./nptl/pthread_kill.c:44:76
 #5 0x00007ebc5d2969fc __pthread_kill_internal ./nptl/pthread_kill.c:78:10
 #6 0x00007ebc5d2969fc pthread_kill ./nptl/pthread_kill.c:89:10
 #7 0x00007ebc5d242476 gsignal ./signal/../sysdeps/posix/raise.c:27:6
 #8 0x00007ebc5d2287f3 abort ./stdlib/abort.c:81:7
 #9 0x00007ebc5d22871b _nl_load_domain ./intl/loadmsgcat.c:1177:9
#10 0x00007ebc5d239e96 (/lib/x86_64-linux-gnu/libc.so.6+0x39e96)
#11 0x00005d8facea9f54 llvm::MachineMemOperand::refineAlignment(llvm::MachineMemOperand const*) (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0xc9bf54)
#12 0x00005d8fadc28e59 llvm::SelectionDAG::getLoad(llvm::ISD::MemIndexedMode, llvm::ISD::LoadExtType, llvm::EVT, llvm::SDLoc const&, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::EVT, llvm::MachineMemOperand*) (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x1a1ae59)
#13 0x00005d8fadc363b3 llvm::SelectionDAG::getLoad(llvm::EVT, llvm::SDLoc const&, llvm::SDValue, llvm::SDValue, llvm::MachineMemOperand*) (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x1a283b3)
#14 0x00005d8fac8ef339 llvm::RISCVTargetLowering::lowerFixedLengthVectorLoadToRVV(llvm::SDValue, llvm::SelectionDAG&) const (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x6e1339)
#15 0x00005d8fac93ad66 llvm::RISCVTargetLowering::LowerOperation(llvm::SDValue, llvm::SelectionDAG&) const (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x72cd66)
#16 0x00005d8fadb659c8 (anonymous namespace)::SelectionDAGLegalize::LegalizeLoadOps(llvm::SDNode*) LegalizeDAG.cpp:0:0
#17 0x00005d8fadb83c20 llvm::SelectionDAG::Legalize() (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x1975c20)
#18 0x00005d8fadc9c998 llvm::SelectionDAGISel::CodeGenAndEmitDAG() (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x1a8e998)
#19 0x00005d8fadca076f llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x1a9276f)
#20 0x00005d8fadca22e5 llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) (.part.0) SelectionDAGISel.cpp:0:0
#21 0x00005d8face68ac7 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (.part.0) MachineFunctionPass.cpp:0:0
#22 0x00005d8fad4630d6 llvm::FPPassManager::runOnFunction(llvm::Function&) (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x12550d6)
#23 0x00005d8fad463329 llvm::FPPassManager::runOnModule(llvm::Module&) (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x1255329)
#24 0x00005d8fad463c95 llvm::legacy::PassManagerImpl::run(llvm::Module&) (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x1255c95)
#25 0x00005d8fac78c99a compileModule(char**, llvm::LLVMContext&) llc.cpp:0:0
#26 0x00005d8fac6d77d6 main (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x4c97d6)
#27 0x00007ebc5d229d90 __libc_start_call_main ./csu/../sysdeps/nptl/libc_start_call_main.h:58:16
#28 0x00007ebc5d229e40 call_init ./csu/../csu/libc-start.c:128:20
#29 0x00007ebc5d229e40 __libc_start_main ./csu/../csu/libc-start.c:379:5
#30 0x00005d8fac783225 _start (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x575225)
zsh: IOT instruction (core dumped)  /scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc

Found via fuzzer.
@llvmbot
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llvmbot commented Apr 15, 2024

@llvm/issue-subscribers-backend-risc-v

Author: Patrick O'Neill (patrick-rivos)

Reduced LLVM IR: ```llvm ir ; ModuleID = 'reduced.bc' target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128" target triple = "riscv64-unknown-linux-gnu"

; Function Attrs: vscale_range(2,2)
define i32 @main() #0 {
vector.body:
%0 = load <16 x i16>, ptr getelementptr ([3 x [23 x [23 x i16]]], ptr null, i64 -10593, i64 1, i64 22, i64 0), align 16
store <16 x i16> %0, ptr null, align 2
%wide.load = load <vscale x 8 x i16>, ptr getelementptr ([3 x [23 x [23 x i16]]], ptr null, i64 -10593, i64 1, i64 22, i64 0), align 16
store <vscale x 8 x i16> %wide.load, ptr null, align 2
ret i32 0
}

attributes #0 = { vscale_range(2,2) "target-features"="+64bit,+a,+c,+d,+f,+m,+relax,+v,+zicsr,+zifencei,+zve32f,+zve32x,+zve64d,+zve64f,+zve64x,+zvl128b,+zvl32b,+zvl64b,-e,-experimental-smmpm,-experimental-smnpm,-experimental-ssnpm,-experimental-sspm,-experimental-ssqosid,-experimental-supm,-experimental-zaamo,-experimental-zabha,-experimental-zalasr,-experimental-zalrsc,-experimental-zfbfmin,-experimental-zicfilp,-experimental-zicfiss,-experimental-ztso,-experimental-zvfbfmin,-experimental-zvfbfwma,-h,-shcounterenw,-shgatpa,-shtvala,-shvsatpa,-shvstvala,-shvstvecd,-smaia,-smepmp,-ssaia,-ssccptr,-sscofpmf,-sscounterenw,-ssstateen,-ssstrict,-sstc,-sstvala,-sstvecd,-ssu64xl,-svade,-svadu,-svbare,-svinval,-svnapot,-svpbmt,-xcvalu,-xcvbi,-xcvbitmanip,-xcvelw,-xcvmac,-xcvmem,-xcvsimd,-xsfcease,-xsfvcp,-xsfvfnrclipxfqf,-xsfvfwmaccqqq,-xsfvqmaccdod,-xsfvqmaccqoq,-xsifivecdiscarddlone,-xsifivecflushdlone,-xtheadba,-xtheadbb,-xtheadbs,-xtheadcmo,-xtheadcondmov,-xtheadfmemidx,-xtheadmac,-xtheadmemidx,-xtheadmempair,-xtheadsync,-xtheadvdot,-xventanacondops,-za128rs,-za64rs,-zacas,-zawrs,-zba,-zbb,-zbc,-zbkb,-zbkc,-zbkx,-zbs,-zca,-zcb,-zcd,-zce,-zcf,-zcmop,-zcmp,-zcmt,-zdinx,-zfa,-zfh,-zfhmin,-zfinx,-zhinx,-zhinxmin,-zic64b,-zicbom,-zicbop,-zicboz,-ziccamoa,-ziccif,-zicclsm,-ziccrse,-zicntr,-zicond,-zihintntl,-zihintpause,-zihpm,-zimop,-zk,-zkn,-zknd,-zkne,-zknh,-zkr,-zks,-zksed,-zksh,-zkt,-zmmul,-zvbb,-zvbc,-zvfh,-zvfhmin,-zvkb,-zvkg,-zvkn,-zvknc,-zvkned,-zvkng,-zvknha,-zvknhb,-zvks,-zvksc,-zvksed,-zvksg,-zvksh,-zvkt,-zvl1024b,-zvl16384b,-zvl2048b,-zvl256b,-zvl32768b,-zvl4096b,-zvl512b,-zvl65536b,-zvl8192b" }

Godbolt: https://godbolt.org/z/vPv3d4Tcr

Backtrace:

> /scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc reduced.ll
llc: /scratch/tc-testing/tc-apr-15/llvm/llvm/lib/CodeGen/MachineOperand.cpp:1122: void llvm::MachineMemOperand::refineAlignment(const llvm::MachineMemOperand*): Assertion `(!MMO->getSize().hasValue() || !getSize().hasValue() || MMO->getSize() == getSize()) && "Size mismatch!"' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0. Program arguments: /scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc reduced.ll

  1.  Running pass 'Function Pass Manager' on module 'reduced.ll'.

  2.  Running pass 'RISC-V DAG-&gt;DAG Pattern Instruction Selection' on function '@<!-- -->main'

#0 0x00005d8fadf03d30 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x1cf5d30)
#1 0x00005d8fadf0113f llvm::sys::RunSignalHandlers() (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x1cf313f)
#2 0x00005d8fadf01295 SignalHandler(int) Signals.cpp:0:0
#3 0x00007ebc5d242520 (/lib/x86_64-linux-gnu/libc.so.6+0x42520)
#4 0x00007ebc5d2969fc __pthread_kill_implementation ./nptl/pthread_kill.c:44:76
#5 0x00007ebc5d2969fc __pthread_kill_internal ./nptl/pthread_kill.c:78:10
#6 0x00007ebc5d2969fc pthread_kill ./nptl/pthread_kill.c:89:10
#7 0x00007ebc5d242476 gsignal ./signal/../sysdeps/posix/raise.c:27:6
#8 0x00007ebc5d2287f3 abort ./stdlib/abort.c:81:7
#9 0x00007ebc5d22871b _nl_load_domain ./intl/loadmsgcat.c:1177:9
#10 0x00007ebc5d239e96 (/lib/x86_64-linux-gnu/libc.so.6+0x39e96)
#11 0x00005d8facea9f54 llvm::MachineMemOperand::refineAlignment(llvm::MachineMemOperand const*) (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0xc9bf54)
#12 0x00005d8fadc28e59 llvm::SelectionDAG::getLoad(llvm::ISD::MemIndexedMode, llvm::ISD::LoadExtType, llvm::EVT, llvm::SDLoc const&, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::EVT, llvm::MachineMemOperand*) (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x1a1ae59)
#13 0x00005d8fadc363b3 llvm::SelectionDAG::getLoad(llvm::EVT, llvm::SDLoc const&, llvm::SDValue, llvm::SDValue, llvm::MachineMemOperand*) (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x1a283b3)
#14 0x00005d8fac8ef339 llvm::RISCVTargetLowering::lowerFixedLengthVectorLoadToRVV(llvm::SDValue, llvm::SelectionDAG&) const (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x6e1339)
#15 0x00005d8fac93ad66 llvm::RISCVTargetLowering::LowerOperation(llvm::SDValue, llvm::SelectionDAG&) const (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x72cd66)
#16 0x00005d8fadb659c8 (anonymous namespace)::SelectionDAGLegalize::LegalizeLoadOps(llvm::SDNode*) LegalizeDAG.cpp:0:0
#17 0x00005d8fadb83c20 llvm::SelectionDAG::Legalize() (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x1975c20)
#18 0x00005d8fadc9c998 llvm::SelectionDAGISel::CodeGenAndEmitDAG() (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x1a8e998)
#19 0x00005d8fadca076f llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x1a9276f)
#20 0x00005d8fadca22e5 llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) (.part.0) SelectionDAGISel.cpp:0:0
#21 0x00005d8face68ac7 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (.part.0) MachineFunctionPass.cpp:0:0
#22 0x00005d8fad4630d6 llvm::FPPassManager::runOnFunction(llvm::Function&) (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x12550d6)
#23 0x00005d8fad463329 llvm::FPPassManager::runOnModule(llvm::Module&) (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x1255329)
#24 0x00005d8fad463c95 llvm::legacy::PassManagerImpl::run(llvm::Module&) (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x1255c95)
#25 0x00005d8fac78c99a compileModule(char**, llvm::LLVMContext&) llc.cpp:0:0
#26 0x00005d8fac6d77d6 main (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x4c97d6)
#27 0x00007ebc5d229d90 __libc_start_call_main ./csu/../sysdeps/nptl/libc_start_call_main.h:58:16
#28 0x00007ebc5d229e40 call_init ./csu/../csu/libc-start.c:128:20
#29 0x00007ebc5d229e40 __libc_start_main ./csu/../csu/libc-start.c:379:5
#30 0x00005d8fac783225 _start (/scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc+0x575225)
zsh: IOT instruction (core dumped) /scratch/tc-testing/tc-apr-15/build-rv64gcv/build-llvm-linux/bin/llc

</details>

This was referenced Apr 15, 2024
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@topperc topperc assigned topperc and unassigned harviniriawan Apr 15, 2024
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topperc commented Apr 15, 2024

This is a bug in the way the RISC-V code was modified for #70452. I have a patch.

topperc added a commit to topperc/llvm-project that referenced this issue Apr 15, 2024
@topperc
[RISCV] Change how MMO is rebuilt in lowerFixedLengthVectorLoadToRVV/…
e14e448 
…lowerFixedLengthVectorStoreToRVV

Copy the pointer info, flags, alignment, AAInfo, and ranges, but
let getLoad rebuild the MMO using the scalable type used for the
the new load/store. This makes sure the LLT minimum size matches
the ContainerVT minimum size. This is important since vscale_range
may have been used to determine that the fixed vector was the exact
size of a scalable vector.

Fixes llvm#88799
@topperc topperc mentioned this issue Apr 15, 2024
Merged
topperc added a commit that referenced this issue Apr 16, 2024
@topperc
[RISCV] Change how MMO is rebuilt in lowerFixedLengthVectorLoadToRVV/…
17d6bf0 
…lowerFixedLengthVectorStoreToRVV (#88811)

Copy the pointer info, flags, alignment, AAInfo, and ranges, but let
getLoad rebuild the MMO using the scalable type used for the the new
load/store. This makes sure the LLT minimum size matches the ContainerVT
minimum size. This is important since vscale_range may have been used to
determine that the fixed vector was the exact size of a scalable vector.

Fixes #88799
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