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[X86][EVEX512] Restrict attaching EVEX512 for default CPU only, NFCI #65920

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merged 1 commit into from
Sep 11, 2023

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phoebewang
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@phoebewang phoebewang commented Sep 11, 2023

Attaching EVEX512 is used to provide backward compatibility for legacy
LLVM IR files, which didn't set EVEX512 feature explicitly.

AVX512 and AVX10 targets have set or unset EVEX512 properly through
X86.td.

However, it's not feasible to list all AVX512 and AVX10 targets or their
complementary set here to skip/restrict such code.

Instead, we can restrict it for default CPU only. "generic" is used when
"target-cpu" is not specified in IR, while "pentium4" and "x86-64" is
the default CPU if "-march" is not specified in Clang for 32-bit and
64-bit targets respectively.

This patch is no functional change intended, though it might affect
scenarios like "-march=broadwell -mavx512bw", which looks like a misuse
of "-march" and can be solved by changing to "-mtune=broadwell -mavx512bw".

Attaching EVEX512 is used to provide backward compatibility for legacy
LLVM IR files, which didn't set EVEX512 feature explicitly.

AVX512 and AVX10 targets have set or unset EVEX512 properly through
X86.td.

However, it's not feasible to list all AVX512 and AVX10 targets or their
complementary set here to skip/restrict such code.

Instead, we can restrict it for default CPU only. "generic" is used when
"target-cpu" is not specified in IR, while "pentium4" and "x86-64" is
the default CPU if "-march" is not specified in Clang for 32-bit and
64-bit targets respectively.

This patch is no functional change intended, though it might affect
scenarios like "-march=broadwell -mavx512dw", which looks like a misuse
of "-march" and can be solved by changing to "-mtune=broadwell -mavx512dw".
@KanRobert
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-mavx512dw -> -mavx512bw


if (posAVX512F != StringRef::npos &&
(posNoAVX512F == StringRef::npos || posNoAVX512F < posAVX512F))
if (posEVEX512 == StringRef::npos && posNoEVEX512 == StringRef::npos)
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Combine two if to one?

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I think keeping it separate is friendly to understand. This outer logic is for AVX512 and inner is for EVEX512.

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LGTM with two comments

@phoebewang
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LGTM with two comments

Where's the second comment?

@phoebewang
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-mavx512dw -> -mavx512bw

Oh, just saw it. Modified!

@phoebewang phoebewang merged commit 8a58407 into llvm:main Sep 11, 2023
3 checks passed
ZijunZhaoCCK pushed a commit to ZijunZhaoCCK/llvm-project that referenced this pull request Sep 19, 2023
…lvm#65920)

Attaching EVEX512 is used to provide backward compatibility for legacy
LLVM IR files, which didn't set EVEX512 feature explicitly.

AVX512 and AVX10 targets have set or unset EVEX512 properly through
X86.td.

However, it's not feasible to list all AVX512 and AVX10 targets or their
complementary set here to skip/restrict such code.

Instead, we can restrict it for default CPU only. "generic" is used when
"target-cpu" is not specified in IR, while "pentium4" and "x86-64" is
the default CPU if "-march" is not specified in Clang for 32-bit and
64-bit targets respectively.

This patch is no functional change intended, though it might affect
scenarios like "-march=broadwell -mavx512bw", which looks like a misuse
of "-march" and can be solved by changing to "-mtune=broadwell
-mavx512bw".
@ronlieb ronlieb requested review from carlobertolli and removed request for a team October 27, 2023 02:35
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ronlieb commented Oct 27, 2023

sorry for the late problem, seems our qmcpack app may have made a recent change that exposed this issue:
llc < bug.ll

llc: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:7536: llvm::SDValue getMemcpyLoadsAndStores(llvm::SelectionDAG&, const llvm::SDLoc&, llvm::SDValue, llvm::SDValue, llvm::SDValue, uint64_t, llvm::Align, bool, bool, llvm::MachinePointerInfo, llvm::MachinePointerInfo, const llvm::AAMDNodes&, llvm::AAResults*): Assertion `NVT.bitsGE(VT)' failed.

repro.txt

searlmc1 pushed a commit to ROCm/llvm-project that referenced this pull request Oct 27, 2023
…y, NFCI (llvm#65920)"

  breaks qmcpack

This reverts commit 8a58407.

Change-Id: Ife1e7e0c5e9ab5a2349b57dde856cae023579b7a
phoebewang added a commit to phoebewang/llvm-project that referenced this pull request Oct 27, 2023
@phoebewang
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@ronlieb Thanks for reporting this issue! This exposed a bug not for this patch but a related one 2419409, which should be solved by #70420.
Did you get the IR from a non Clang front end? With that change, FEs need to push a +evex512 feature when they enable AVX512 features on a non AVX512 target (zen3 in this example) to keep the backward compatibility. Otherwise, there will be crash in the backend.

phoebewang added a commit that referenced this pull request Oct 27, 2023
searlmc1 pushed a commit to ROCm/llvm-project that referenced this pull request Nov 4, 2023
…lvm#65920)

Attaching EVEX512 is used to provide backward compatibility for legacy
LLVM IR files, which didn't set EVEX512 feature explicitly.

AVX512 and AVX10 targets have set or unset EVEX512 properly through
X86.td.

However, it's not feasible to list all AVX512 and AVX10 targets or their
complementary set here to skip/restrict such code.

Instead, we can restrict it for default CPU only. "generic" is used when
"target-cpu" is not specified in IR, while "pentium4" and "x86-64" is
the default CPU if "-march" is not specified in Clang for 32-bit and
64-bit targets respectively.

This patch is no functional change intended, though it might affect
scenarios like "-march=broadwell -mavx512bw", which looks like a misuse
of "-march" and can be solved by changing to "-mtune=broadwell
-mavx512bw".

Change-Id: Ia9ffa97056923b45f01e663a0df6c0c01fa69fe5
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4 participants