Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[TableGen] Fix ordering of register classes. #67245

Merged
merged 1 commit into from Sep 24, 2023
Merged

[TableGen] Fix ordering of register classes. #67245

merged 1 commit into from Sep 24, 2023

Conversation

kosarev
Copy link
Collaborator

@kosarev kosarev commented Sep 23, 2023

This commit:

TableGen: Try to fix expensive checks failures
d2a9b87

fixed one of the sort() calls, but there's another.

Caught on expensive-checks buildbots that started to fail sporadically after submitting

[AMDGPU] Add True16 register classes.
469b3bf

This commit:

TableGen: Try to fix expensive checks failures
d2a9b87

fixed one of the sort() calls, but there's another.

Caught on expensive-checks buildbots that started to fail sporadically
after submitting

[AMDGPU] Add True16 register classes.
469b3bf
kosarev added a commit that referenced this pull request Sep 23, 2023
Reverts 6cb3866.

Analysis of failures on buildbots with expensive checks enabled showed
that the problem was triggered by changes in another commit,
469b3bf, and was caused by the bug
addressed in #67245.
@kosarev kosarev merged commit 6fbbcb4 into llvm:main Sep 24, 2023
3 of 4 checks passed
Guzhu-AMD pushed a commit to GPUOpen-Drivers/llvm-project that referenced this pull request Sep 28, 2023
Local branch amd-gfx f801801 Merged main:534c096ec9a6 into amd-gfx:c21ceacdbde5
Remote branch main 6fbbcb4 [TableGen] Fix ordering of register classes. (llvm#67245)
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
Projects
None yet
Development

Successfully merging this pull request may close these issues.

None yet

2 participants