Add option -enable-machine-licm

[yxsamliu]

to facilitate debugging machine LICM related issues. By default it is on.

[github-actions]

⚠️ C/C++ code formatter, clang-format found issues in your code. ⚠️

You can test this locally with the following command:

git-clang-format --diff 5ffbdd9ed5fb719b354e4a46acc8737c5b624f94 2bff6f6e8ffba8745e8b86beb495d21cf693b923 -- llvm/lib/CodeGen/MachineLICM.cpp

View the diff from clang-format here.

diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp
index ec2d010d4..9097bcf9d 100644
--- a/llvm/lib/CodeGen/MachineLICM.cpp
+++ b/llvm/lib/CodeGen/MachineLICM.cpp
@@ -334,35 +334,35 @@ INITIALIZE_PASS_END(EarlyMachineLICM, "early-machinelicm",
                     "Early Machine Loop Invariant Code Motion", false, false)
 
 bool MachineLICMBase::runOnMachineFunction(MachineFunction &MF) {
-  if (!EnableMachineLICM || skipFunction(MF.getFunction()))
-    return false;
+    if (!EnableMachineLICM || skipFunction(MF.getFunction()))
+      return false;
+
+    Changed = FirstInLoop = false;
+    const TargetSubtargetInfo &ST = MF.getSubtarget();
+    TII = ST.getInstrInfo();
+    TLI = ST.getTargetLowering();
+    TRI = ST.getRegisterInfo();
+    MFI = &MF.getFrameInfo();
+    MRI = &MF.getRegInfo();
+    SchedModel.init(&ST);
 
-  Changed = FirstInLoop = false;
-  const TargetSubtargetInfo &ST = MF.getSubtarget();
-  TII = ST.getInstrInfo();
-  TLI = ST.getTargetLowering();
-  TRI = ST.getRegisterInfo();
-  MFI = &MF.getFrameInfo();
-  MRI = &MF.getRegInfo();
-  SchedModel.init(&ST);
-
-  PreRegAlloc = MRI->isSSA();
-  HasProfileData = MF.getFunction().hasProfileData();
-
-  if (PreRegAlloc)
-    LLVM_DEBUG(dbgs() << "******** Pre-regalloc Machine LICM: ");
-  else
-    LLVM_DEBUG(dbgs() << "******** Post-regalloc Machine LICM: ");
-  LLVM_DEBUG(dbgs() << MF.getName() << " ********\n");
-
-  if (PreRegAlloc) {
-    // Estimate register pressure during pre-regalloc pass.
-    unsigned NumRPS = TRI->getNumRegPressureSets();
-    RegPressure.resize(NumRPS);
-    std::fill(RegPressure.begin(), RegPressure.end(), 0);
-    RegLimit.resize(NumRPS);
-    for (unsigned i = 0, e = NumRPS; i != e; ++i)
-      RegLimit[i] = TRI->getRegPressureSetLimit(MF, i);
+    PreRegAlloc = MRI->isSSA();
+    HasProfileData = MF.getFunction().hasProfileData();
+
+    if (PreRegAlloc)
+      LLVM_DEBUG(dbgs() << "******** Pre-regalloc Machine LICM: ");
+    else
+      LLVM_DEBUG(dbgs() << "******** Post-regalloc Machine LICM: ");
+    LLVM_DEBUG(dbgs() << MF.getName() << " ********\n");
+
+    if (PreRegAlloc) {
+      // Estimate register pressure during pre-regalloc pass.
+      unsigned NumRPS = TRI->getNumRegPressureSets();
+      RegPressure.resize(NumRPS);
+      std::fill(RegPressure.begin(), RegPressure.end(), 0);
+      RegLimit.resize(NumRPS);
+      for (unsigned i = 0, e = NumRPS; i != e; ++i)
+        RegLimit[i] = TRI->getRegPressureSetLimit(MF, i);
   }
 
   // Get our Loop information...

[davemgreen]

Adding an option for debugging sounds useful. LGTM

[topperc]

Isn't there a disable in TargetPassConfig.cpp?

[davemgreen]

Oh I hadn't realized this already existed, both for pre and post-ra machine licm. @yxsamliu would those existing options already handle your needs?

[yxsamliu]

I think they should (there are two options, disable-machine-licm and disable-postra-machine-licm). Thanks for the information.