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[AArch64][Win] Work around an MSVC arm64 compiler bug #67865
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@llvm/pr-subscribers-backend-aarch64 ChangesThe MSVC compiler 19.37 for ARM64 from Visual Studio 17.7.4 has an optimization bug that causes an incorrect behavior with isAdvSIMDModImmType10() and causes the test Full diff: https://github.com/llvm/llvm-project/pull/67865.diff 1 Files Affected:
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
index 11c314dc88def7e..e6c52c9ce60d367 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
@@ -591,6 +591,29 @@ static inline uint64_t decodeAdvSIMDModImmType9(uint8_t Imm) {
// aaaaaaaa bbbbbbbb cccccccc dddddddd eeeeeeee ffffffff gggggggg hhhhhhhh
// cmode: 1110, op: 1
static inline bool isAdvSIMDModImmType10(uint64_t Imm) {
+#if defined(_MSC_VER) && _MSC_VER == 1937 && !defined(__clang__) && defined(_M_ARM64)
+// The MSVC compiler 19.37 for ARM64 has an optimization bug that
+// causes an incorrect behavior with the orignal version. Work around
+// by using a slightly different variation.
+ constexpr uint64_t Mask = 0xFFULL;
+ uint64_t ByteA = (Imm >> 56) & Mask;
+ uint64_t ByteB = (Imm >> 48) & Mask;
+ uint64_t ByteC = (Imm >> 40) & Mask;
+ uint64_t ByteD = (Imm >> 32) & Mask;
+ uint64_t ByteE = (Imm >> 24) & Mask;
+ uint64_t ByteF = (Imm >> 16) & Mask;
+ uint64_t ByteG = (Imm >> 8) & Mask;
+ uint64_t ByteH = Imm & Mask;
+
+ return (ByteA == 0ULL || ByteA == Mask) &&
+ (ByteB == 0ULL || ByteB == Mask) &&
+ (ByteC == 0ULL || ByteC == Mask) &&
+ (ByteD == 0ULL || ByteD == Mask) &&
+ (ByteE == 0ULL || ByteE == Mask) &&
+ (ByteF == 0ULL || ByteF == Mask) &&
+ (ByteG == 0ULL || ByteG == Mask) &&
+ (ByteH == 0ULL || ByteH == Mask);
+#else
uint64_t ByteA = Imm & 0xff00000000000000ULL;
uint64_t ByteB = Imm & 0x00ff000000000000ULL;
uint64_t ByteC = Imm & 0x0000ff0000000000ULL;
@@ -608,6 +631,7 @@ static inline bool isAdvSIMDModImmType10(uint64_t Imm) {
(ByteF == 0ULL || ByteF == 0x0000000000ff0000ULL) &&
(ByteG == 0ULL || ByteG == 0x000000000000ff00ULL) &&
(ByteH == 0ULL || ByteH == 0x00000000000000ffULL);
+#endif
}
static inline uint8_t encodeAdvSIMDModImmType10(uint64_t Imm) {
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That is atrocious. Could you please add the connect/DevComm link for the report?
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Done. |
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Rebased |
✅ With the latest revision this PR passed the C/C++ code formatter. |
The MSVC compiler 19.37 for ARM64 from Visual Studio 17.7.4 has an optimization bug that causes an incorrect behavior with isAdvSIMDModImmType10() and causes the test test/CodeGen/AArch64/arm64-build-vector.ll to fail. Work around by using a slightly different variation. Bug: https://developercommunity.visualstudio.com/t/C-ARM64-compiler-optimization-bug/10481261
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Fixed formatting |
This is a bit of a shame but the code looks OK. |
The MSVC compiler 19.37 for ARM64 from Visual Studio 17.7.4 has an optimization bug that causes an incorrect behavior with isAdvSIMDModImmType10() and causes the test
test/CodeGen/AArch64/arm64-build-vector.ll to fail. Work around by using a slightly different variation.