[X86] Lower mathlib call ldexp into scalef when avx512 is enabled #69710

huhu233 · 2023-10-20T11:23:16Z

No description provided.

huhu233 · 2023-10-20T11:24:42Z

Similar to #67552

RKSimon · 2023-10-24T15:26:34Z

llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll

+; CHECK-AVX2-NEXT:    vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
+; CHECK-AVX2-NEXT:    addq $40, %rsp
+; CHECK-AVX2-NEXT:    .cfi_def_cfa_offset 8
+; CHECK-AVX2-NEXT:    retq


Missing avx512 checks?

Supplement the check, thanks!

RKSimon · 2023-10-24T15:27:36Z

llvm/lib/Target/X86/X86ISelLowering.h

@@ -1705,6 +1705,8 @@ namespace llvm {
                        const SmallVectorImpl<SDValue> &OutVals,
                        const SDLoc &dl, SelectionDAG &DAG) const override;

+    SDValue LowerFLDEXP(SDValue Op, SelectionDAG &DAG) const;


no need to create a method - just make it static inside X86ISelLowering.cpp

Done, thanks!

RKSimon · 2023-10-24T15:28:30Z

llvm/lib/Target/X86/X86ISelLowering.cpp

+  case MVT::f64:
+    XVT = MVT::v2f64;
+    ExpVT = MVT::v2f64;
+    IID = DAG.getConstant(Intrinsic::x86_avx512_mask_scalef_sd, DL, MVT::i64);


We'd be much better off adding a X86ISD::SCALEF nodetype rather than individual intrinsic lowering cases.

Hi, @RKSimon, sorry for the delay in replying your comments, I have made some changes to the patch, please have a check, thanks very much!

huhu233 · 2023-12-13T12:10:52Z

Rebase the branch
Use X86ISD::SCALEFS instead of specific intrinsics
Transfrom the function into static version
update the test file

RKSimon · 2023-12-13T15:54:47Z

llvm/lib/Target/X86/X86ISelLowering.cpp

@@ -31979,6 +32024,8 @@ SDValue X86TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
  case ISD::ADDRSPACECAST:      return LowerADDRSPACECAST(Op, DAG);
  case X86ISD::CVTPS2PH:        return LowerCVTPS2PH(Op, DAG);
  case ISD::PREFETCH:           return LowerPREFETCH(Op, Subtarget, DAG);
+  case ISD::FLDEXP:
+    return LowerFLDEXP(Op, DAG);


Use the single line style like (most of) the previous cases.

It seems that coding style check discourages this change ...

RKSimon · 2023-12-13T15:59:41Z

llvm/lib/Target/X86/X86ISelLowering.cpp

+      DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, XVT, DAG.getUNDEF(XVT), X, Zero);
+  SDValue VExp = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, ExpVT,
+                             DAG.getUNDEF(ExpVT), Exp, Zero);
+  SDValue Scalef = DAG.getNode(X86ISD::SCALEFS, DL, XVT, VX, VExp, VX);


Why do you need to vectorize to use SCALEFS? I thought SCALEFS was for scalar types and SCALEF was for vector types? (So it should be possible to add vector support here as well).

RKSimon · 2023-12-13T16:00:58Z

llvm/lib/Target/X86/X86ISelLowering.cpp

+  default:
+    return SDValue();
+  case MVT::f16:
+    X = DAG.getNode(ISD::FP_EXTEND, DL, MVT::f32, X);


Can we use vscalefph if we have AVX512FP16?

Hi, there may be risk of truncation, as the EXP operand of FLDEXP types i32, e.g., @llvm.ldexp.f16.i32(half, i32) ->@llvm.x86.avx512fp16.mask.scalef.sh(<8 x half>, <8 x half>, <8 x half>. I didn't know how to handle the issue elegantly, so I made an extension here.

Good point! LangRef doesn't give an example f16 case. Should we define it as @llvm.ldexp.f16.i16(half, i16)? i32 is a too large range to be useful for FP16.

Could we use value tracking to check the bounds of the EXP operand?

Value tracking seems to make things very complicated.

I'd settle for a TODO comment for now

github-actions · 2023-12-14T14:50:12Z

⚠️ C/C++ code formatter, clang-format found issues in your code. ⚠️

You can test this locally with the following command:

git-clang-format --diff e34c35a21ccc215ce507a1e19b4ff2a1ce9906f3 4ac55f1aecf19b4e2ce981ad757c79b0daf46e5e -- llvm/lib/Target/X86/X86ISelLowering.cpp

View the diff from clang-format here.

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 19510bbba0..7ac39cea21 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -2406,11 +2406,11 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
   }
 
   if (Subtarget.hasAVX512()) {
-    for (MVT VT : { MVT::f16, MVT::f32, MVT::f64, MVT::v4f32, MVT::v2f64 })
+    for (MVT VT : {MVT::f16, MVT::f32, MVT::f64, MVT::v4f32, MVT::v2f64})
       setOperationAction(ISD::FLDEXP, VT, Custom);
 
     if (Subtarget.hasVLX())
-      for (MVT VT : { MVT::v8f32, MVT::v4f64, MVT::v16f32, MVT::v8f64 })
+      for (MVT VT : {MVT::v8f32, MVT::v4f64, MVT::v16f32, MVT::v8f64})
         setOperationAction(ISD::FLDEXP, VT, Custom);
   }
 
@@ -32039,7 +32039,8 @@ SDValue X86TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
   case ISD::ADDRSPACECAST:      return LowerADDRSPACECAST(Op, DAG);
   case X86ISD::CVTPS2PH:        return LowerCVTPS2PH(Op, DAG);
   case ISD::PREFETCH:           return LowerPREFETCH(Op, Subtarget, DAG);
-  case ISD::FLDEXP:             return LowerFLDEXP(Op, Subtarget, DAG);
+  case ISD::FLDEXP:
+    return LowerFLDEXP(Op, Subtarget, DAG);
   }
 }

huhu233 · 2023-12-14T14:58:08Z

Fix coding style issues
Support vector versions of ldexp, e.g., @llvm.ldexp.v8f32.v8i32 -- +avx512vl , @llvm.ldexp.v4f32.v4i32 -- +avx512f or +avx512vl, etc.

huhu233 · 2023-12-15T11:16:53Z

add TODO for avx512fp16

RKSimon · 2023-12-28T15:04:33Z

llvm/lib/Target/X86/X86ISelLowering.cpp

@@ -2405,6 +2405,15 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
    setOperationAction(ISD::STRICT_UINT_TO_FP, MVT::i128, Custom);
  }

+  if (Subtarget.hasAVX512()) {
+    for (MVT VT : { MVT::f16, MVT::f32, MVT::f64, MVT::v4f32, MVT::v2f64 })


Are we sure this is right? I'd expect MVT::v4f32, MVT::v2f64, MVT::v8f32, MVT::v4f64 to be the VLX cases.

arsenm · 2024-01-17T09:00:36Z

llvm/test/CodeGen/X86/call-ldexp.ll

+; AVX512VL-NEXT:    vpinsrw $0, %eax, %xmm0, %xmm0
+; AVX512VL-NEXT:    retq
+entry:
+  %r = tail call fast half @llvm.ldexp.f16.i32(half %x, i32 %exp)


Drop unnecessary fast flags?

RKSimon · 2024-04-03T10:59:15Z

@huhu233 reverse-ping

llvmbot added the backend:X86 label Oct 20, 2023

huhu233 requested review from nikic, arsenm and RKSimon October 24, 2023 13:39

RKSimon reviewed Oct 24, 2023

View reviewed changes

huhu233 force-pushed the feature-ldexp-x86 branch from 7355b45 to 85f59ff Compare December 13, 2023 11:56

huhu233 requested a review from RKSimon December 13, 2023 12:14

RKSimon reviewed Dec 13, 2023

View reviewed changes

RKSimon requested a review from phoebewang December 13, 2023 16:02

nikic removed their request for review December 14, 2023 08:31

huhu233 force-pushed the feature-ldexp-x86 branch from 85f59ff to c365199 Compare December 14, 2023 14:47

[X86] Lower mathlib call ldexp into scalef when avx512 is enabled

4ac55f1

huhu233 force-pushed the feature-ldexp-x86 branch from c365199 to 4ac55f1 Compare December 15, 2023 11:14

huhu233 requested a review from RKSimon December 27, 2023 06:25

RKSimon reviewed Dec 28, 2023

View reviewed changes

arsenm reviewed Jan 17, 2024

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[X86] Lower mathlib call ldexp into scalef when avx512 is enabled #69710

[X86] Lower mathlib call ldexp into scalef when avx512 is enabled #69710

huhu233 commented Oct 20, 2023

huhu233 commented Oct 20, 2023

RKSimon Oct 24, 2023

huhu233 Dec 13, 2023

RKSimon Oct 24, 2023

huhu233 Dec 13, 2023

RKSimon Oct 24, 2023

huhu233 Dec 13, 2023

huhu233 commented Dec 13, 2023

RKSimon Dec 13, 2023

huhu233 Dec 14, 2023

RKSimon Dec 13, 2023

RKSimon Dec 13, 2023

phoebewang Dec 14, 2023

huhu233 Dec 14, 2023 •

edited

phoebewang Dec 14, 2023

RKSimon Dec 14, 2023

huhu233 Dec 14, 2023

RKSimon Dec 14, 2023

github-actions bot commented Dec 14, 2023 •

edited

huhu233 commented Dec 14, 2023

huhu233 commented Dec 15, 2023

RKSimon Dec 28, 2023

arsenm Jan 17, 2024

RKSimon commented Apr 3, 2024

[X86] Lower mathlib call ldexp into scalef when avx512 is enabled #69710

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[X86] Lower mathlib call ldexp into scalef when avx512 is enabled #69710

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huhu233 commented Oct 20, 2023

huhu233 commented Oct 20, 2023

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huhu233 commented Dec 13, 2023

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huhu233 Dec 14, 2023 • edited

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github-actions bot commented Dec 14, 2023 • edited

huhu233 commented Dec 14, 2023

huhu233 commented Dec 15, 2023

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RKSimon commented Apr 3, 2024

huhu233 Dec 14, 2023 •

edited

github-actions bot commented Dec 14, 2023 •

edited