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[AArch64][SVE2] Use rshrnb for masked stores #70026

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merged 2 commits into from
Oct 26, 2023
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Commits on Oct 24, 2023

  1. [AArch64][SVE2] Use rshrnb for masked stores

    This patch is a follow up on https://reviews.llvm.org/D155299.
    This patch combines add+lsr to rshrnb when 'B' in:
    
      C = A + B
      D = C >> Shift
    
    is equal to (1 << (Shift-1), and the bits in the top half
    of each vector element are zeroed or ignored, such as in a
    truncating masked store.
    MDevereau committed Oct 24, 2023
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Commits on Oct 25, 2023

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