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[RISCV] Add register bank and instruction selection support for FP G_SELECT. #72726

Merged
merged 6 commits into from
Nov 27, 2023
Merged

[RISCV] Add register bank and instruction selection support for FP G_SELECT. #72726

merged 6 commits into from
Nov 27, 2023

Commits on Nov 27, 2023

  1. [RISCV] Add register bank and instruction selection support for G_SEL… 

    …ECT.

Try to pick the FP register bank based on surrounding use/defs. Code
is basically copied from AArch64.

Need legalizer changes to make this more useful. Right now we're stuck
with only being able to FP typs the same size as XLen.
    @topperc
    topperc committed Nov 27, 2023
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  2. fixup! clang-format

    @topperc
    topperc committed Nov 27, 2023
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  3. Add f32 test for rv64.

    @topperc
    topperc committed Nov 27, 2023
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  4. fixup! Update comment copy/pasted from AArch64.

    @topperc
    topperc committed Nov 27, 2023
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  5. fixup! Add s32 regbank test for rv64.

    @topperc
    topperc committed Nov 27, 2023
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  6. fixup! add more tests.

    @topperc
    topperc committed Nov 27, 2023
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