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[X86][MC] Not emit {evex} for VEX-promoted instructions with GPR operands #74039

Merged
merged 2 commits into from
Dec 1, 2023
Merged

[X86][MC] Not emit {evex} for VEX-promoted instructions with GPR operands #74039

merged 2 commits into from
Dec 1, 2023

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KanRobert
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To align with

  1. GNU binutils's behavior for APX instructions
  2. LLVM's behaviour for EVEX intructions with VEX variant

@KanRobert
[X86][MC] Not emit {evex} for VEX-promoted instructions with GPR oper…
593fc52 
…ands

To align with
1. GNU binutils's behavior for APX instructions
2. LLVM's behaviour for EVEX intructions with VEX variant
@llvmbot llvmbot added backend:X86 mc Machine (object) code labels Dec 1, 2023
@llvmbot
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llvmbot commented Dec 1, 2023

@llvm/pr-subscribers-mc

Author: Shengchen Kan (KanRobert)

Changes

To align with

  1. GNU binutils's behavior for APX instructions
  2. LLVM's behaviour for EVEX intructions with VEX variant

Full diff: https://github.com/llvm/llvm-project/pull/74039.diff

4 Files Affected:

  • (modified) llvm/lib/Target/X86/X86InstrAVX512.td (+3-4)
  • (modified) llvm/test/MC/Disassembler/X86/apx/kmov.txt (+19-16)
  • (modified) llvm/test/MC/X86/apx/kmov-att.s (+15-13)
  • (modified) llvm/test/MC/X86/apx/kmov-intel.s (+15-13)
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td
index 0514f0d19506707..77b359e84fbd2d4 100644
--- a/llvm/lib/Target/X86/X86InstrAVX512.td
+++ b/llvm/lib/Target/X86/X86InstrAVX512.td
@@ -2855,8 +2855,8 @@ defm VFPCLASS : avx512_fp_fpclass_all<"vfpclass", 0x66, 0x67, SchedWriteFCmp>, E
 multiclass avx512_mask_mov<bits<8> opc_kk, bits<8> opc_km, bits<8> opc_mk,
                           string OpcodeStr, RegisterClass KRC, ValueType vvt,
                           X86MemOperand x86memop, string Suffix = ""> {
-  let explicitOpPrefix = !if(!eq(Suffix, ""), NoExplicitOpPrefix, ExplicitEVEX) in {
-  let isMoveReg = 1, hasSideEffects = 0, SchedRW = [WriteMove] in
+  let isMoveReg = 1, hasSideEffects = 0, SchedRW = [WriteMove],
+      explicitOpPrefix = !if(!eq(Suffix, ""), NoExplicitOpPrefix, ExplicitEVEX) in
   def kk#Suffix : I<opc_kk, MRMSrcReg, (outs KRC:$dst), (ins KRC:$src),
                     !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"), []>,
                   Sched<[WriteMove]>;
@@ -2868,13 +2868,12 @@ multiclass avx512_mask_mov<bits<8> opc_kk, bits<8> opc_km, bits<8> opc_mk,
                     !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
                     [(store KRC:$src, addr:$dst)]>,
                   Sched<[WriteStore]>;
-  }
 }
 
 multiclass avx512_mask_mov_gpr<bits<8> opc_kr, bits<8> opc_rk,
                                string OpcodeStr, RegisterClass KRC,
                                RegisterClass GRC, string Suffix = ""> {
-  let hasSideEffects = 0, explicitOpPrefix = !if(!eq(Suffix, ""), NoExplicitOpPrefix, ExplicitEVEX) in {
+  let hasSideEffects = 0 in {
     def kr#Suffix : I<opc_kr, MRMSrcReg, (outs KRC:$dst), (ins GRC:$src),
                       !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"), []>,
                     Sched<[WriteMove]>;
diff --git a/llvm/test/MC/Disassembler/X86/apx/kmov.txt b/llvm/test/MC/Disassembler/X86/apx/kmov.txt
index d089ef192230a54..5d947ff39f23149 100644
--- a/llvm/test/MC/Disassembler/X86/apx/kmov.txt
+++ b/llvm/test/MC/Disassembler/X86/apx/kmov.txt
@@ -1,6 +1,25 @@
 # RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
 # RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
 
+# ATT:   {evex} kmovb	%k1, %k2
+# INTEL: {evex} kmovb	k2, k1
+0x62,0xf1,0x7d,0x08,0x90,0xd1
+
+# ATT:   {evex} kmovw	%k1, %k2
+# INTEL: {evex} kmovw	k2, k1
+0x62,0xf1,0x7c,0x08,0x90,0xd1
+
+# ATT:   {evex} kmovd	%k1, %k2
+# INTEL: {evex} kmovd	k2, k1
+0x62,0xf1,0xfd,0x08,0x90,0xd1
+
+# ATT:   {evex} kmovq	%k1, %k2
+# INTEL: {evex} kmovq	k2, k1
+0x62,0xf1,0xfc,0x08,0x90,0xd1
+
+# ATT-NOT: {evex}
+# INTEL-NOT: {evex}
+
 # ATT:   kmovb	%r16d, %k1
 # INTEL: kmovb	k1, r16d
 0x62,0xf9,0x7d,0x08,0x92,0xc8
@@ -64,19 +83,3 @@
 # ATT:   kmovq	%k1, (%r16,%r17)
 # INTEL: kmovq	qword ptr [r16 + r17], k1
 0x62,0xf9,0xf8,0x08,0x91,0x0c,0x08
-
-# ATT:   {evex} kmovb	%k1, %k2
-# INTEL: {evex} kmovb	k2, k1
-0x62,0xf1,0x7d,0x08,0x90,0xd1
-
-# ATT:   {evex} kmovw	%k1, %k2
-# INTEL: {evex} kmovw	k2, k1
-0x62,0xf1,0x7c,0x08,0x90,0xd1
-
-# ATT:   {evex} kmovd	%k1, %k2
-# INTEL: {evex} kmovd	k2, k1
-0x62,0xf1,0xfd,0x08,0x90,0xd1
-
-# ATT:   {evex} kmovq	%k1, %k2
-# INTEL: {evex} kmovq	k2, k1
-0x62,0xf1,0xfc,0x08,0x90,0xd1
diff --git a/llvm/test/MC/X86/apx/kmov-att.s b/llvm/test/MC/X86/apx/kmov-att.s
index be5042cf0a30c8f..5608f8d5f676ac4 100644
--- a/llvm/test/MC/X86/apx/kmov-att.s
+++ b/llvm/test/MC/X86/apx/kmov-att.s
@@ -3,6 +3,21 @@
 
 # ERROR-COUNT-20: error:
 # ERROR-NOT: error:
+# CHECK: {evex}	kmovb	%k1, %k2
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x90,0xd1]
+         {evex}	kmovb	%k1, %k2
+# CHECK: {evex}	kmovw	%k1, %k2
+# CHECK: encoding: [0x62,0xf1,0x7c,0x08,0x90,0xd1]
+         {evex}	kmovw	%k1, %k2
+# CHECK: {evex}	kmovd	%k1, %k2
+# CHECK: encoding: [0x62,0xf1,0xfd,0x08,0x90,0xd1]
+         {evex}	kmovd	%k1, %k2
+# CHECK: {evex}	kmovq	%k1, %k2
+
+# CHECK-NOT: {evex}
+
+# CHECK: encoding: [0x62,0xf1,0xfc,0x08,0x90,0xd1]
+         {evex}	kmovq	%k1, %k2
 # CHECK: kmovb	%r16d, %k1
 # CHECK: encoding: [0x62,0xf9,0x7d,0x08,0x92,0xc8]
          kmovb	%r16d, %k1
@@ -54,16 +69,3 @@
 # CHECK: kmovq	%k1, (%r16,%r17)
 # CHECK: encoding: [0x62,0xf9,0xf8,0x08,0x91,0x0c,0x08]
          kmovq	%k1, (%r16,%r17)
-
-# CHECK: {evex}	kmovb	%k1, %k2
-# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x90,0xd1]
-         {evex}	kmovb	%k1, %k2
-# CHECK: {evex}	kmovw	%k1, %k2
-# CHECK: encoding: [0x62,0xf1,0x7c,0x08,0x90,0xd1]
-         {evex}	kmovw	%k1, %k2
-# CHECK: {evex}	kmovd	%k1, %k2
-# CHECK: encoding: [0x62,0xf1,0xfd,0x08,0x90,0xd1]
-         {evex}	kmovd	%k1, %k2
-# CHECK: {evex}	kmovq	%k1, %k2
-# CHECK: encoding: [0x62,0xf1,0xfc,0x08,0x90,0xd1]
-         {evex}	kmovq	%k1, %k2
diff --git a/llvm/test/MC/X86/apx/kmov-intel.s b/llvm/test/MC/X86/apx/kmov-intel.s
index 8ceb29d32dba6c4..0cdbd310062eba8 100644
--- a/llvm/test/MC/X86/apx/kmov-intel.s
+++ b/llvm/test/MC/X86/apx/kmov-intel.s
@@ -1,5 +1,20 @@
 # RUN: llvm-mc -triple x86_64 -show-encoding -x86-asm-syntax=intel -output-asm-variant=1 %s | FileCheck %s
 
+# CHECK: {evex}	kmovb	k2, k1
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x90,0xd1]
+         {evex}	kmovb	k2, k1
+# CHECK: {evex}	kmovw	k2, k1
+# CHECK: encoding: [0x62,0xf1,0x7c,0x08,0x90,0xd1]
+         {evex}	kmovw	k2, k1
+# CHECK: {evex}	kmovd	k2, k1
+# CHECK: encoding: [0x62,0xf1,0xfd,0x08,0x90,0xd1]
+         {evex}	kmovd	k2, k1
+# CHECK: {evex}	kmovq	k2, k1
+# CHECK: encoding: [0x62,0xf1,0xfc,0x08,0x90,0xd1]
+         {evex}	kmovq	k2, k1
+
+# CHECK-NOT: {evex}
+
 # CHECK: kmovb	k1, r16d
 # CHECK: encoding: [0x62,0xf9,0x7d,0x08,0x92,0xc8]
          kmovb	k1, r16d
@@ -51,16 +66,3 @@
 # CHECK: kmovq	qword ptr [r16 + r17], k1
 # CHECK: encoding: [0x62,0xf9,0xf8,0x08,0x91,0x0c,0x08]
          kmovq	qword ptr [r16 + r17], k1
-
-# CHECK: {evex}	kmovb	k2, k1
-# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x90,0xd1]
-         {evex}	kmovb	k2, k1
-# CHECK: {evex}	kmovw	k2, k1
-# CHECK: encoding: [0x62,0xf1,0x7c,0x08,0x90,0xd1]
-         {evex}	kmovw	k2, k1
-# CHECK: {evex}	kmovd	k2, k1
-# CHECK: encoding: [0x62,0xf1,0xfd,0x08,0x90,0xd1]
-         {evex}	kmovd	k2, k1
-# CHECK: {evex}	kmovq	k2, k1
-# CHECK: encoding: [0x62,0xf1,0xfc,0x08,0x90,0xd1]
-         {evex}	kmovq	k2, k1

@llvmbot
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llvmbot commented Dec 1, 2023

@llvm/pr-subscribers-backend-x86

Author: Shengchen Kan (KanRobert)

Changes

To align with

  1. GNU binutils's behavior for APX instructions
  2. LLVM's behaviour for EVEX intructions with VEX variant

Full diff: https://github.com/llvm/llvm-project/pull/74039.diff

4 Files Affected:

  • (modified) llvm/lib/Target/X86/X86InstrAVX512.td (+3-4)
  • (modified) llvm/test/MC/Disassembler/X86/apx/kmov.txt (+19-16)
  • (modified) llvm/test/MC/X86/apx/kmov-att.s (+15-13)
  • (modified) llvm/test/MC/X86/apx/kmov-intel.s (+15-13)
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td
index 0514f0d19506707..77b359e84fbd2d4 100644
--- a/llvm/lib/Target/X86/X86InstrAVX512.td
+++ b/llvm/lib/Target/X86/X86InstrAVX512.td
@@ -2855,8 +2855,8 @@ defm VFPCLASS : avx512_fp_fpclass_all<"vfpclass", 0x66, 0x67, SchedWriteFCmp>, E
 multiclass avx512_mask_mov<bits<8> opc_kk, bits<8> opc_km, bits<8> opc_mk,
                           string OpcodeStr, RegisterClass KRC, ValueType vvt,
                           X86MemOperand x86memop, string Suffix = ""> {
-  let explicitOpPrefix = !if(!eq(Suffix, ""), NoExplicitOpPrefix, ExplicitEVEX) in {
-  let isMoveReg = 1, hasSideEffects = 0, SchedRW = [WriteMove] in
+  let isMoveReg = 1, hasSideEffects = 0, SchedRW = [WriteMove],
+      explicitOpPrefix = !if(!eq(Suffix, ""), NoExplicitOpPrefix, ExplicitEVEX) in
   def kk#Suffix : I<opc_kk, MRMSrcReg, (outs KRC:$dst), (ins KRC:$src),
                     !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"), []>,
                   Sched<[WriteMove]>;
@@ -2868,13 +2868,12 @@ multiclass avx512_mask_mov<bits<8> opc_kk, bits<8> opc_km, bits<8> opc_mk,
                     !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
                     [(store KRC:$src, addr:$dst)]>,
                   Sched<[WriteStore]>;
-  }
 }
 
 multiclass avx512_mask_mov_gpr<bits<8> opc_kr, bits<8> opc_rk,
                                string OpcodeStr, RegisterClass KRC,
                                RegisterClass GRC, string Suffix = ""> {
-  let hasSideEffects = 0, explicitOpPrefix = !if(!eq(Suffix, ""), NoExplicitOpPrefix, ExplicitEVEX) in {
+  let hasSideEffects = 0 in {
     def kr#Suffix : I<opc_kr, MRMSrcReg, (outs KRC:$dst), (ins GRC:$src),
                       !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"), []>,
                     Sched<[WriteMove]>;
diff --git a/llvm/test/MC/Disassembler/X86/apx/kmov.txt b/llvm/test/MC/Disassembler/X86/apx/kmov.txt
index d089ef192230a54..5d947ff39f23149 100644
--- a/llvm/test/MC/Disassembler/X86/apx/kmov.txt
+++ b/llvm/test/MC/Disassembler/X86/apx/kmov.txt
@@ -1,6 +1,25 @@
 # RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
 # RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
 
+# ATT:   {evex} kmovb	%k1, %k2
+# INTEL: {evex} kmovb	k2, k1
+0x62,0xf1,0x7d,0x08,0x90,0xd1
+
+# ATT:   {evex} kmovw	%k1, %k2
+# INTEL: {evex} kmovw	k2, k1
+0x62,0xf1,0x7c,0x08,0x90,0xd1
+
+# ATT:   {evex} kmovd	%k1, %k2
+# INTEL: {evex} kmovd	k2, k1
+0x62,0xf1,0xfd,0x08,0x90,0xd1
+
+# ATT:   {evex} kmovq	%k1, %k2
+# INTEL: {evex} kmovq	k2, k1
+0x62,0xf1,0xfc,0x08,0x90,0xd1
+
+# ATT-NOT: {evex}
+# INTEL-NOT: {evex}
+
 # ATT:   kmovb	%r16d, %k1
 # INTEL: kmovb	k1, r16d
 0x62,0xf9,0x7d,0x08,0x92,0xc8
@@ -64,19 +83,3 @@
 # ATT:   kmovq	%k1, (%r16,%r17)
 # INTEL: kmovq	qword ptr [r16 + r17], k1
 0x62,0xf9,0xf8,0x08,0x91,0x0c,0x08
-
-# ATT:   {evex} kmovb	%k1, %k2
-# INTEL: {evex} kmovb	k2, k1
-0x62,0xf1,0x7d,0x08,0x90,0xd1
-
-# ATT:   {evex} kmovw	%k1, %k2
-# INTEL: {evex} kmovw	k2, k1
-0x62,0xf1,0x7c,0x08,0x90,0xd1
-
-# ATT:   {evex} kmovd	%k1, %k2
-# INTEL: {evex} kmovd	k2, k1
-0x62,0xf1,0xfd,0x08,0x90,0xd1
-
-# ATT:   {evex} kmovq	%k1, %k2
-# INTEL: {evex} kmovq	k2, k1
-0x62,0xf1,0xfc,0x08,0x90,0xd1
diff --git a/llvm/test/MC/X86/apx/kmov-att.s b/llvm/test/MC/X86/apx/kmov-att.s
index be5042cf0a30c8f..5608f8d5f676ac4 100644
--- a/llvm/test/MC/X86/apx/kmov-att.s
+++ b/llvm/test/MC/X86/apx/kmov-att.s
@@ -3,6 +3,21 @@
 
 # ERROR-COUNT-20: error:
 # ERROR-NOT: error:
+# CHECK: {evex}	kmovb	%k1, %k2
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x90,0xd1]
+         {evex}	kmovb	%k1, %k2
+# CHECK: {evex}	kmovw	%k1, %k2
+# CHECK: encoding: [0x62,0xf1,0x7c,0x08,0x90,0xd1]
+         {evex}	kmovw	%k1, %k2
+# CHECK: {evex}	kmovd	%k1, %k2
+# CHECK: encoding: [0x62,0xf1,0xfd,0x08,0x90,0xd1]
+         {evex}	kmovd	%k1, %k2
+# CHECK: {evex}	kmovq	%k1, %k2
+
+# CHECK-NOT: {evex}
+
+# CHECK: encoding: [0x62,0xf1,0xfc,0x08,0x90,0xd1]
+         {evex}	kmovq	%k1, %k2
 # CHECK: kmovb	%r16d, %k1
 # CHECK: encoding: [0x62,0xf9,0x7d,0x08,0x92,0xc8]
          kmovb	%r16d, %k1
@@ -54,16 +69,3 @@
 # CHECK: kmovq	%k1, (%r16,%r17)
 # CHECK: encoding: [0x62,0xf9,0xf8,0x08,0x91,0x0c,0x08]
          kmovq	%k1, (%r16,%r17)
-
-# CHECK: {evex}	kmovb	%k1, %k2
-# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x90,0xd1]
-         {evex}	kmovb	%k1, %k2
-# CHECK: {evex}	kmovw	%k1, %k2
-# CHECK: encoding: [0x62,0xf1,0x7c,0x08,0x90,0xd1]
-         {evex}	kmovw	%k1, %k2
-# CHECK: {evex}	kmovd	%k1, %k2
-# CHECK: encoding: [0x62,0xf1,0xfd,0x08,0x90,0xd1]
-         {evex}	kmovd	%k1, %k2
-# CHECK: {evex}	kmovq	%k1, %k2
-# CHECK: encoding: [0x62,0xf1,0xfc,0x08,0x90,0xd1]
-         {evex}	kmovq	%k1, %k2
diff --git a/llvm/test/MC/X86/apx/kmov-intel.s b/llvm/test/MC/X86/apx/kmov-intel.s
index 8ceb29d32dba6c4..0cdbd310062eba8 100644
--- a/llvm/test/MC/X86/apx/kmov-intel.s
+++ b/llvm/test/MC/X86/apx/kmov-intel.s
@@ -1,5 +1,20 @@
 # RUN: llvm-mc -triple x86_64 -show-encoding -x86-asm-syntax=intel -output-asm-variant=1 %s | FileCheck %s
 
+# CHECK: {evex}	kmovb	k2, k1
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x90,0xd1]
+         {evex}	kmovb	k2, k1
+# CHECK: {evex}	kmovw	k2, k1
+# CHECK: encoding: [0x62,0xf1,0x7c,0x08,0x90,0xd1]
+         {evex}	kmovw	k2, k1
+# CHECK: {evex}	kmovd	k2, k1
+# CHECK: encoding: [0x62,0xf1,0xfd,0x08,0x90,0xd1]
+         {evex}	kmovd	k2, k1
+# CHECK: {evex}	kmovq	k2, k1
+# CHECK: encoding: [0x62,0xf1,0xfc,0x08,0x90,0xd1]
+         {evex}	kmovq	k2, k1
+
+# CHECK-NOT: {evex}
+
 # CHECK: kmovb	k1, r16d
 # CHECK: encoding: [0x62,0xf9,0x7d,0x08,0x92,0xc8]
          kmovb	k1, r16d
@@ -51,16 +66,3 @@
 # CHECK: kmovq	qword ptr [r16 + r17], k1
 # CHECK: encoding: [0x62,0xf9,0xf8,0x08,0x91,0x0c,0x08]
          kmovq	qword ptr [r16 + r17], k1
-
-# CHECK: {evex}	kmovb	k2, k1
-# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x90,0xd1]
-         {evex}	kmovb	k2, k1
-# CHECK: {evex}	kmovw	k2, k1
-# CHECK: encoding: [0x62,0xf1,0x7c,0x08,0x90,0xd1]
-         {evex}	kmovw	k2, k1
-# CHECK: {evex}	kmovd	k2, k1
-# CHECK: encoding: [0x62,0xf1,0xfd,0x08,0x90,0xd1]
-         {evex}	kmovd	k2, k1
-# CHECK: {evex}	kmovq	k2, k1
-# CHECK: encoding: [0x62,0xf1,0xfc,0x08,0x90,0xd1]
-         {evex}	kmovq	k2, k1

XinWang10
XinWang10 approved these changes Dec 1, 2023
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LGTM

@KanRobert KanRobert merged commit 0e163e7 into llvm:main Dec 1, 2023
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@XinWang10 XinWang10 XinWang10 approved these changes

@phoebewang phoebewang Awaiting requested review from phoebewang

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