[AMDGPU] Presubmit test: max register pressure on defs.

[vpykhtin]

Upcoming patch #74422.

[llvmbot]

@llvm/pr-subscribers-backend-amdgpu

Author: Valery Pykhtin (vpykhtin)

Changes

Upcoming patch #74422.

---

Full diff: https://github.com/llvm/llvm-project/pull/74424.diff

1 Files Affected:

• (modified) llvm/test/CodeGen/AMDGPU/regpressure_printer.mir (+113-2)

diff --git a/llvm/test/CodeGen/AMDGPU/regpressure_printer.mir b/llvm/test/CodeGen/AMDGPU/regpressure_printer.mir
index a1722c42b189f..83e85ccf7f8f1 100644
--- a/llvm/test/CodeGen/AMDGPU/regpressure_printer.mir
+++ b/llvm/test/CodeGen/AMDGPU/regpressure_printer.mir
@@ -1,6 +1,6 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 --filetype=null --run-pass=amdgpu-print-rp %s 2>&1 >/dev/null | FileCheck %s --check-prefix=RP --check-prefix=RPU
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 --filetype=null --run-pass=amdgpu-print-rp -amdgpu-print-rp-downward %s 2>&1 >/dev/null | FileCheck %s --check-prefix=RP --check-prefix=RPD
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 --filetype=null -verify-machineinstrs --run-pass=amdgpu-print-rp %s 2>&1 >/dev/null | FileCheck %s --check-prefix=RP --check-prefix=RPU
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 --filetype=null -verify-machineinstrs --run-pass=amdgpu-print-rp -amdgpu-print-rp-downward %s 2>&1 >/dev/null | FileCheck %s --check-prefix=RP --check-prefix=RPD
 
 
 ---
@@ -666,3 +666,114 @@ body: |
     EXP_DONE 0, %49:vgpr_32, undef %51:vgpr_32, undef %53:vgpr_32, undef %55:vgpr_32, -1, 0, 1, implicit $exec
     S_ENDPGM 0
 ...
+---
+name:  test_partially_used_def
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $sgpr0_sgpr1_sgpr2_sgpr3
+    ; RPU-LABEL: name: test_partially_used_def
+    ; RPU: Live-in:
+    ; RPU-NEXT: SGPR  VGPR
+    ; RPU-NEXT: 0     0
+    ; RPU-NEXT: 4     0      %0:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
+    ; RPU-NEXT: 4     0
+    ; RPU-NEXT: 4     0      %1:sgpr_128 = COPY %0:sgpr_128
+    ; RPU-NEXT: 1     0
+    ; RPU-NEXT: 1     0      S_NOP 0, implicit %1.sub1:sgpr_128
+    ; RPU-NEXT: 0     0
+    ; RPU-NEXT: Live-out:
+    ; RPU-NEXT: Live-thr:
+    ; RPU-NEXT: 0     0
+    ;
+    ; RPD-LABEL: name: test_partially_used_def
+    ; RPD: Live-in:
+    ; RPD-NEXT: SGPR  VGPR
+    ; RPD-NEXT: 0     0
+    ; RPD-NEXT: 4     0      %0:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
+    ; RPD-NEXT: 4     0
+    ; RPD-NEXT: 8     0      %1:sgpr_128 = COPY %0:sgpr_128
+    ; RPD-NEXT: 1     0
+    ; RPD-NEXT: 1     0      S_NOP 0, implicit %1.sub1:sgpr_128
+    ; RPD-NEXT: 0     0
+    ; RPD-NEXT: Live-out:
+    ; RPD-NEXT: Live-thr:
+    ; RPD-NEXT: 0     0
+    %0:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
+    %1:sgpr_128 = COPY %0:sgpr_128
+    S_NOP 0, implicit %1.sub1
+...
+---
+name:  test_partially_used_early_clobber_def
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $sgpr0_sgpr1_sgpr2_sgpr3
+    ; RPU-LABEL: name: test_partially_used_early_clobber_def
+    ; RPU: Live-in:
+    ; RPU-NEXT: SGPR  VGPR
+    ; RPU-NEXT: 0     0
+    ; RPU-NEXT: 4     0      %0:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
+    ; RPU-NEXT: 4     0
+    ; RPU-NEXT: 5     0      early-clobber %1:sgpr_128 = COPY %0:sgpr_128
+    ; RPU-NEXT: 1     0
+    ; RPU-NEXT: 1     0      S_NOP 0, implicit %1.sub1:sgpr_128
+    ; RPU-NEXT: 0     0
+    ; RPU-NEXT: Live-out:
+    ; RPU-NEXT: Live-thr:
+    ; RPU-NEXT: 0     0
+    ;
+    ; RPD-LABEL: name: test_partially_used_early_clobber_def
+    ; RPD: Live-in:
+    ; RPD-NEXT: SGPR  VGPR
+    ; RPD-NEXT: 0     0
+    ; RPD-NEXT: 4     0      %0:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
+    ; RPD-NEXT: 4     0
+    ; RPD-NEXT: 8     0      early-clobber %1:sgpr_128 = COPY %0:sgpr_128
+    ; RPD-NEXT: 1     0
+    ; RPD-NEXT: 1     0      S_NOP 0, implicit %1.sub1:sgpr_128
+    ; RPD-NEXT: 0     0
+    ; RPD-NEXT: Live-out:
+    ; RPD-NEXT: Live-thr:
+    ; RPD-NEXT: 0     0
+    %0:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
+    early-clobber %1:sgpr_128 = COPY %0:sgpr_128
+    S_NOP 0, implicit %1.sub1
+...
+---
+name:  test_partially_used_def_and_early_clobber_def
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $sgpr0_sgpr1_sgpr2_sgpr3
+    ; RPU-LABEL: name: test_partially_used_def_and_early_clobber_def
+    ; RPU: Live-in:
+    ; RPU-NEXT: SGPR  VGPR
+    ; RPU-NEXT: 0     0
+    ; RPU-NEXT: 4     0      %0:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
+    ; RPU-NEXT: 4     0
+    ; RPU-NEXT: 7     0      %1:sgpr_128 = COPY %0:sgpr_128, implicit-def %2:sgpr_128, implicit-def early-clobber %3:sgpr_128, implicit-def dead early-clobber %4:sgpr_128
+    ; RPU-NEXT: 6     0
+    ; RPU-NEXT: 6     0      S_NOP 0, implicit %1.sub1:sgpr_128, implicit %2.sub0_sub1:sgpr_128, implicit %3.sub0_sub1_sub2:sgpr_128
+    ; RPU-NEXT: 0     0
+    ; RPU-NEXT: Live-out:
+    ; RPU-NEXT: Live-thr:
+    ; RPU-NEXT: 0     0
+    ;
+    ; RPD-LABEL: name: test_partially_used_def_and_early_clobber_def
+    ; RPD: Live-in:
+    ; RPD-NEXT: SGPR  VGPR
+    ; RPD-NEXT: 0     0
+    ; RPD-NEXT: 4     0      %0:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
+    ; RPD-NEXT: 4     0
+    ; RPD-NEXT: 20    0      %1:sgpr_128 = COPY %0:sgpr_128, implicit-def %2:sgpr_128, implicit-def early-clobber %3:sgpr_128, implicit-def dead early-clobber %4:sgpr_128
+    ; RPD-NEXT: 6     0
+    ; RPD-NEXT: 6     0      S_NOP 0, implicit %1.sub1:sgpr_128, implicit %2.sub0_sub1:sgpr_128, implicit %3.sub0_sub1_sub2:sgpr_128
+    ; RPD-NEXT: 0     0
+    ; RPD-NEXT: Live-out:
+    ; RPD-NEXT: Live-thr:
+    ; RPD-NEXT: 0     0
+    %0:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
+    %1:sgpr_128 = COPY %0:sgpr_128, implicit-def %2:sgpr_128, implicit-def early-clobber %3:sgpr_128, implicit-def early-clobber %4:sgpr_128
+    S_NOP 0, implicit %1.sub1, implicit %2.sub0_sub1, implicit %3.sub0_sub1_sub2
+...