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[RegAllocFast] NFC cleanups #74860

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merged 1 commit into from
Dec 12, 2023
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nickdesaulniers
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  • use more range for
  • avoid capturing lambda
  • prefer Register type to unsigned
  • remove braces around single statement if

- use more range for
- avoid capturing lambda
- prefer Register type to unsigned
- remove braces around single statement if
// Scan for special cases; Apply pre-assigned register defs to state.
bool HasPhysRegUse = false;
bool HasRegMask = false;
bool HasVRegDef = false;
bool HasDef = false;
bool HasEarlyClobber = false;
bool NeedToAssignLiveThroughs = false;
for (unsigned I = 0; I < MI.getNumOperands(); ++I) {
MachineOperand &MO = MI.getOperand(I);
for (MachineOperand &MO : MI.operands()) {
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This feels like it was intentional, especially given it is not even storing MI.getNumOperands() in a variable. And in fact git blame points to this: https://reviews.llvm.org/D124834

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It was done to pass I to TiedOpIsUndef, not because MI's number of operands change in the loop. I've eliminated the need to pass I, since it can be rematerialized from the MachineOperand itself.

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Ah I see, LGTM then.

@MatzeB
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MatzeB commented Dec 8, 2023

Most of the changes look good to me. I suspect there is ways where definePhysReg can change the number of operands of the instruction, making it a necessity to write some of those for loops in this odd style?

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MatzeB commented Dec 8, 2023

CC @LuoYuanke I assume you changed those for-loops on purpose in https://reviews.llvm.org/D124834 ? Do you still remember why? As admittedly I cannot immediately see the reason for it, especially with that reverse-loop where added operands would not even get recognized...

@nickdesaulniers nickdesaulniers merged commit 935c6a2 into llvm:main Dec 12, 2023
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2 participants