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[RISCV] Minor improvements to RISCVInstrInfoXSf.td. NFC #76424

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merged 1 commit into from
Dec 27, 2023

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@topperc topperc commented Dec 27, 2023

Use an explicit list of LMULInfos instead of indexing part of other lists. Use wvrclass field to double LMUL instead of using two lists.

Use range instead of list in another spot. I wish I could use a list of LMULInfo here but there's no way to quadruple an LMUL yet.

Use an explicit list of LMULInfos instead of indexing part of
other lists. Use wvrclass field to double LMUL instead of using
two lists.

Use range instead of list in another spot where I couldn't simplify
to use a list since there isn't a way to quadruple LMUL currently.
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llvmbot commented Dec 27, 2023

@llvm/pr-subscribers-backend-risc-v

Author: Craig Topper (topperc)

Changes

Use an explicit list of LMULInfos instead of indexing part of other lists. Use wvrclass field to double LMUL instead of using two lists.

Use range instead of list in another spot. I wish I could use a list of LMULInfo here but there's no way to quadruple an LMUL yet.


Full diff: https://github.com/llvm/llvm-project/pull/76424.diff

1 Files Affected:

  • (modified) llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td (+4-5)
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td b/llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
index 38d05877bb45c1..561ab8d7403d67 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
@@ -356,10 +356,9 @@ multiclass VPseudoSiFiveVQMACCDOD<string Constraint = ""> {
 }
 
 multiclass VPseudoSiFiveVQMACCQOQ<string Constraint = ""> {
-  foreach i = 0-3 in
-    let VLMul = MxListVF4[i].value in
-    defm NAME : VPseudoSiFiveVMACC<MxListVF4[i].MX, MxListVF8[i].vrclass,
-                                   MxListVF4[i].vrclass, Constraint>;
+  foreach m = [V_MF2, V_M1, V_M2, V_M4] in
+    let VLMul = m.value in
+    defm NAME : VPseudoSiFiveVMACC<m.MX, m.wvrclass, m.vrclass, Constraint>;
 }
 
 multiclass VPseudoSiFiveVFWMACC<string Constraint = ""> {
@@ -369,7 +368,7 @@ multiclass VPseudoSiFiveVFWMACC<string Constraint = ""> {
 }
 
 multiclass VPseudoSiFiveVFNRCLIP<string Constraint = "@earlyclobber $rd"> {
-  foreach i = [0, 1, 2, 3, 4] in
+  foreach i = 0-4 in
     let hasSideEffects = 0 in
       defm "Pseudo" # NAME : VPseudoBinaryRoundingMode<MxListW[i].vrclass,
                                                        MxListVF4[i].vrclass,

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@4vtomat 4vtomat left a comment

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LGTM, thanks~

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@wangpc-pp wangpc-pp left a comment

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LGTM.

@topperc topperc merged commit cdb7d8a into llvm:main Dec 27, 2023
4 of 5 checks passed
@topperc topperc deleted the pr/xsf-simply branch December 27, 2023 17:45
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4 participants