Fix unsigned typos

[Rageking8]

No description provided.

[llvmbot]

@llvm/pr-subscribers-backend-aarch64
@llvm/pr-subscribers-mlir
@llvm/pr-subscribers-mlir-linalg
@llvm/pr-subscribers-clang
@llvm/pr-subscribers-mc

@llvm/pr-subscribers-backend-webassembly

Author: None (Rageking8)

Changes

---

Full diff: https://github.com/llvm/llvm-project/pull/76670.diff

7 Files Affected:

• (modified) clang/test/Analysis/additive-op-on-sym-int-expr.c (+2-2)
• (modified) llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTypeUtilities.h (+1-1)
• (modified) llvm/test/MC/AArch64/neon-diagnostics.s (+1-1)
• (modified) llvm/test/MC/AArch64/neon-scalar-shift-imm.s (+1-1)
• (modified) llvm/test/MC/Disassembler/AArch64/neon-instructions.txt (+1-1)
• (modified) mlir/docs/Dialects/Linalg/OpDSL.md (+1-1)
• (modified) mlir/python/mlir/dialects/linalg/opdsl/lang/comprehension.py (+1-1)

diff --git a/clang/test/Analysis/additive-op-on-sym-int-expr.c b/clang/test/Analysis/additive-op-on-sym-int-expr.c
index bd951c4443a1be..a268baf0a5f18c 100644
--- a/clang/test/Analysis/additive-op-on-sym-int-expr.c
+++ b/clang/test/Analysis/additive-op-on-sym-int-expr.c
@@ -59,7 +59,7 @@ void testMin(int i, long l) {
   clang_analyzer_dumpL(l - intMin); // expected-warning-re {{(reg_${{[0-9]+}}<long l>) + 2147483648 }} instead of - -2147483648
 }
 
-void changingToUnsinged(unsigned u, int i) {
+void changingToUnsigned(unsigned u, int i) {
   unsigned c = u + (unsigned)i;
   unsigned d = u - (unsigned)i;
   if (i == -1) {
@@ -89,7 +89,7 @@ void extendingToSigned(long l, int i) {
   }
 }
 
-void extendingToUnigned(unsigned long ul, int i) {
+void extendingToUnsigned(unsigned long ul, int i) {
   unsigned long c = ul + (unsigned long)i;
   unsigned long d = ul - (unsigned long)i;
   if (i == -1) {
diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTypeUtilities.h b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTypeUtilities.h
index 18018dfc6d6fb9..486cf264d13e2f 100644
--- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTypeUtilities.h
+++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTypeUtilities.h
@@ -46,7 +46,7 @@ inline bool isRefType(wasm::ValType Type) {
 
 // Convert ValType or a list/signature of ValTypes to a string.
 
-// Convert an unsinged integer, which can be among wasm::ValType enum, to its
+// Convert an unsigned integer, which can be among wasm::ValType enum, to its
 // type name string. If the input is not within wasm::ValType, returns
 // "invalid_type".
 const char *anyTypeToString(unsigned Type);
diff --git a/llvm/test/MC/AArch64/neon-diagnostics.s b/llvm/test/MC/AArch64/neon-diagnostics.s
index 481a5ddd6a83f9..9a0445131ddf7c 100644
--- a/llvm/test/MC/AArch64/neon-diagnostics.s
+++ b/llvm/test/MC/AArch64/neon-diagnostics.s
@@ -4877,7 +4877,7 @@
 // CHECK-ERROR:                        ^
 
 //----------------------------------------------------------------------
-// Scalar Unigned Rounding Shift Right (Immediate)
+// Scalar Unsigned Rounding Shift Right (Immediate)
 //----------------------------------------------------------------------
 
         urshr d20, d23, #99
diff --git a/llvm/test/MC/AArch64/neon-scalar-shift-imm.s b/llvm/test/MC/AArch64/neon-scalar-shift-imm.s
index 96cb815eafa816..db8e21a17a1d36 100644
--- a/llvm/test/MC/AArch64/neon-scalar-shift-imm.s
+++ b/llvm/test/MC/AArch64/neon-scalar-shift-imm.s
@@ -24,7 +24,7 @@
 // CHECK: srshr d19, d18, #7  // encoding: [0x53,0x26,0x79,0x5f]
 
 //----------------------------------------------------------------------
-// Scalar Unigned Rounding Shift Right (Immediate)
+// Scalar Unsigned Rounding Shift Right (Immediate)
 //----------------------------------------------------------------------
         urshr d20, d23, #31
 
diff --git a/llvm/test/MC/Disassembler/AArch64/neon-instructions.txt b/llvm/test/MC/Disassembler/AArch64/neon-instructions.txt
index ff7dedce444a4d..952ead99f92f76 100644
--- a/llvm/test/MC/Disassembler/AArch64/neon-instructions.txt
+++ b/llvm/test/MC/Disassembler/AArch64/neon-instructions.txt
@@ -1829,7 +1829,7 @@
 0x53,0x26,0x79,0x5f
 
 #----------------------------------------------------------------------
-# Scalar Unigned Rounding Shift Right (Immediate)
+# Scalar Unsigned Rounding Shift Right (Immediate)
 #----------------------------------------------------------------------
 # CHECK: urshr d20, d23, #31
 0xf4,0x26,0x61,0x7f
diff --git a/mlir/docs/Dialects/Linalg/OpDSL.md b/mlir/docs/Dialects/Linalg/OpDSL.md
index 5c4c8b4e1880ae..9d324d8c538ac7 100644
--- a/mlir/docs/Dialects/Linalg/OpDSL.md
+++ b/mlir/docs/Dialects/Linalg/OpDSL.md
@@ -291,7 +291,7 @@ The following examples illustrate the lowering of signed and unsigned functions:
 *   cast_unsigned(I32 -> I64) -> `arith.ExtUIOp`
 *   cast_unsigned(F32 -> I32) -> `arith.FPToUIOp`
 *   max_signed -> `arith.MaxSIOp`
-*   max_unsinged -> `arith.MaxUIOp`
+*   max_unsigned -> `arith.MaxUIOp`
 
 Not all functions are applicable for all numeric types, and on mismatch, op
 verification will fail.
diff --git a/mlir/python/mlir/dialects/linalg/opdsl/lang/comprehension.py b/mlir/python/mlir/dialects/linalg/opdsl/lang/comprehension.py
index d9698e8ab867e4..23d6d26b7e294c 100644
--- a/mlir/python/mlir/dialects/linalg/opdsl/lang/comprehension.py
+++ b/mlir/python/mlir/dialects/linalg/opdsl/lang/comprehension.py
@@ -318,7 +318,7 @@ class BinaryFn:
 
     Examples:
     - max -> `arith.MaxSIOp`
-    - max_unsinged -> `arith.MaxUIOp`
+    - max_unsigned -> `arith.MaxUIOp`
     """
 
     add = BinaryFnType("add")

[Rageking8]

Is this PR ready to merge?

[MaheshRavishankar]

Yes, you can merge it. Thanks! Let me know if you don't have access