[LoongArch][GlobalISel] Adding initial GlobalISel infrastructure #76912
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Add an initial GlobalISel skeleton for LoongArch. It can only run ir translator for `ret void`.
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@llvm/pr-subscribers-llvm-globalisel @llvm/pr-subscribers-backend-loongarch Author: None (GongMengyao) ChangesAdd an initial GlobalISel skeleton for LoongArch. It can only run ir translator for Patch is 24.08 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/76912.diff 16 Files Affected:
diff --git a/llvm/lib/Target/LoongArch/CMakeLists.txt b/llvm/lib/Target/LoongArch/CMakeLists.txt
index 62e5a0ab61b3fd..17cde9c57e69a6 100644
--- a/llvm/lib/Target/LoongArch/CMakeLists.txt
+++ b/llvm/lib/Target/LoongArch/CMakeLists.txt
@@ -6,9 +6,11 @@ tablegen(LLVM LoongArchGenAsmMatcher.inc -gen-asm-matcher)
tablegen(LLVM LoongArchGenAsmWriter.inc -gen-asm-writer)
tablegen(LLVM LoongArchGenDAGISel.inc -gen-dag-isel)
tablegen(LLVM LoongArchGenDisassemblerTables.inc -gen-disassembler)
+tablegen(LLVM LoongArchGenGlobalISel.inc -gen-global-isel)
tablegen(LLVM LoongArchGenInstrInfo.inc -gen-instr-info)
tablegen(LLVM LoongArchGenMCPseudoLowering.inc -gen-pseudo-lowering)
tablegen(LLVM LoongArchGenMCCodeEmitter.inc -gen-emitter)
+tablegen(LLVM LoongArchGenRegisterBank.inc -gen-register-bank)
tablegen(LLVM LoongArchGenRegisterInfo.inc -gen-register-info)
tablegen(LLVM LoongArchGenSubtargetInfo.inc -gen-subtarget)
@@ -16,13 +18,17 @@ add_public_tablegen_target(LoongArchCommonTableGen)
add_llvm_target(LoongArchCodeGen
LoongArchAsmPrinter.cpp
+ LoongArchCallLowering.cpp
LoongArchExpandAtomicPseudoInsts.cpp
LoongArchExpandPseudoInsts.cpp
LoongArchFrameLowering.cpp
LoongArchInstrInfo.cpp
+ LoongArchInstructionSelector.cpp
LoongArchISelDAGToDAG.cpp
LoongArchISelLowering.cpp
+ LoongArchLegalizerInfo.cpp
LoongArchMCInstLower.cpp
+ LoongArchRegisterBankInfo.cpp
LoongArchRegisterInfo.cpp
LoongArchSubtarget.cpp
LoongArchTargetMachine.cpp
@@ -42,6 +48,7 @@ add_llvm_target(LoongArchCodeGen
Support
Target
TargetParser
+ GlobalISel
ADD_TO_COMPONENT
LoongArch
diff --git a/llvm/lib/Target/LoongArch/LoongArch.h b/llvm/lib/Target/LoongArch/LoongArch.h
index 09ca089c91151b..88873cd1711aa0 100644
--- a/llvm/lib/Target/LoongArch/LoongArch.h
+++ b/llvm/lib/Target/LoongArch/LoongArch.h
@@ -20,7 +20,10 @@
namespace llvm {
class AsmPrinter;
class FunctionPass;
+class InstructionSelector;
class LoongArchTargetMachine;
+class LoongArchRegisterBankInfo;
+class LoongArchSubtarget;
class MCInst;
class MCOperand;
class MachineInstr;
@@ -41,6 +44,11 @@ void initializeLoongArchDAGToDAGISelPass(PassRegistry &);
void initializeLoongArchExpandAtomicPseudoPass(PassRegistry &);
void initializeLoongArchPreRAExpandPseudoPass(PassRegistry &);
void initializeLoongArchExpandPseudoPass(PassRegistry &);
+
+InstructionSelector *
+createLoongArchInstructionSelector(const LoongArchTargetMachine &,
+ LoongArchSubtarget &,
+ LoongArchRegisterBankInfo &);
} // end namespace llvm
#endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCH_H
diff --git a/llvm/lib/Target/LoongArch/LoongArch.td b/llvm/lib/Target/LoongArch/LoongArch.td
index 75b65fe69f2629..121b49b7868ef7 100644
--- a/llvm/lib/Target/LoongArch/LoongArch.td
+++ b/llvm/lib/Target/LoongArch/LoongArch.td
@@ -113,6 +113,7 @@ def FeatureRelax
include "LoongArchRegisterInfo.td"
include "LoongArchCallingConv.td"
include "LoongArchInstrInfo.td"
+include "LoongArchRegisterBanks.td"
//===----------------------------------------------------------------------===//
// LoongArch processors supported.
diff --git a/llvm/lib/Target/LoongArch/LoongArchCallLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchCallLowering.cpp
new file mode 100644
index 00000000000000..e99e1057cd5ef9
--- /dev/null
+++ b/llvm/lib/Target/LoongArch/LoongArchCallLowering.cpp
@@ -0,0 +1,53 @@
+//===-- LoongArchCallLowering.cpp - Call lowering -------------------*- C++
+//-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+/// \file
+/// This file implements the lowering of LLVM calls to machine code calls for
+/// GlobalISel.
+//
+//===----------------------------------------------------------------------===//
+
+#include "LoongArchCallLowering.h"
+#include "LoongArchISelLowering.h"
+#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
+
+using namespace llvm;
+
+LoongArchCallLowering::LoongArchCallLowering(const LoongArchTargetLowering &TLI)
+ : CallLowering(&TLI) {}
+
+bool LoongArchCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
+ const Value *Val,
+ ArrayRef<Register> VRegs,
+ FunctionLoweringInfo &FLI,
+ Register SwiftErrorVReg) const {
+
+ MachineInstrBuilder Ret = MIRBuilder.buildInstrNoInsert(LoongArch::PseudoRET);
+
+ if (Val != nullptr) {
+ return false;
+ }
+ MIRBuilder.insertInstr(Ret);
+ return true;
+}
+
+bool LoongArchCallLowering::lowerFormalArguments(
+ MachineIRBuilder &MIRBuilder, const Function &F,
+ ArrayRef<ArrayRef<Register>> VRegs, FunctionLoweringInfo &FLI) const {
+
+ if (F.arg_empty())
+ return true;
+
+ return false;
+}
+
+bool LoongArchCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
+ CallLoweringInfo &Info) const {
+ return false;
+}
diff --git a/llvm/lib/Target/LoongArch/LoongArchCallLowering.h b/llvm/lib/Target/LoongArch/LoongArchCallLowering.h
new file mode 100644
index 00000000000000..5396928a5c9396
--- /dev/null
+++ b/llvm/lib/Target/LoongArch/LoongArchCallLowering.h
@@ -0,0 +1,45 @@
+//===-- LoongArchCallLowering.h - Call lowering ---------------------*- C++
+//-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+/// \file
+/// This file describes how to lower LLVM calls to machine code calls.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_LoongArch_LoongArchCALLLOWERING_H
+#define LLVM_LIB_TARGET_LoongArch_LoongArchCALLLOWERING_H
+
+#include "llvm/CodeGen/CallingConvLower.h"
+#include "llvm/CodeGen/GlobalISel/CallLowering.h"
+#include "llvm/CodeGen/ValueTypes.h"
+
+namespace llvm {
+
+class LoongArchTargetLowering;
+
+class LoongArchCallLowering : public CallLowering {
+
+public:
+ LoongArchCallLowering(const LoongArchTargetLowering &TLI);
+
+ bool lowerReturn(MachineIRBuilder &MIRBuiler, const Value *Val,
+ ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI,
+ Register SwiftErrorVReg) const override;
+
+ bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
+ ArrayRef<ArrayRef<Register>> VRegs,
+ FunctionLoweringInfo &FLI) const override;
+
+ bool lowerCall(MachineIRBuilder &MIRBuilder,
+ CallLoweringInfo &Info) const override;
+};
+
+} // end namespace llvm
+
+#endif // LLVM_LIB_TARGET_LoongArch_LoongArchCALLLOWERING_H
diff --git a/llvm/lib/Target/LoongArch/LoongArchInstructionSelector.cpp b/llvm/lib/Target/LoongArch/LoongArchInstructionSelector.cpp
new file mode 100644
index 00000000000000..46de4df77eb62c
--- /dev/null
+++ b/llvm/lib/Target/LoongArch/LoongArchInstructionSelector.cpp
@@ -0,0 +1,105 @@
+//===-- LoongArchInstructionSelector.cpp -----------------------------*- C++
+//-*-==//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+/// \file
+/// This file implements the targeting of the InstructionSelector class for
+/// LoongArch.
+/// \todo This should be generated by TableGen.
+//===----------------------------------------------------------------------===//
+
+#include "LoongArchRegisterBankInfo.h"
+#include "LoongArchSubtarget.h"
+#include "LoongArchTargetMachine.h"
+#include "llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h"
+#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
+#include "llvm/IR/IntrinsicsLoongArch.h"
+#include "llvm/Support/Debug.h"
+
+#define DEBUG_TYPE "loongarch-isel"
+
+using namespace llvm;
+
+#define GET_GLOBALISEL_PREDICATE_BITSET
+#include "LoongArchGenGlobalISel.inc"
+#undef GET_GLOBALISEL_PREDICATE_BITSET
+
+namespace {
+
+class LoongArchInstructionSelector : public InstructionSelector {
+public:
+ LoongArchInstructionSelector(const LoongArchTargetMachine &TM,
+ const LoongArchSubtarget &STI,
+ const LoongArchRegisterBankInfo &RBI);
+
+ bool select(MachineInstr &I) override;
+ static const char *getName() { return DEBUG_TYPE; }
+
+private:
+ bool selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const;
+
+ const LoongArchSubtarget &STI;
+ const LoongArchInstrInfo &TII;
+ const LoongArchRegisterInfo &TRI;
+ const LoongArchRegisterBankInfo &RBI;
+
+ // FIXME: This is necessary because DAGISel uses "Subtarget->" and GlobalISel
+ // uses "STI." in the code generated by TableGen. We need to unify the name of
+ // Subtarget variable.
+ const LoongArchSubtarget *Subtarget = &STI;
+
+#define GET_GLOBALISEL_PREDICATES_DECL
+#include "LoongArchGenGlobalISel.inc"
+#undef GET_GLOBALISEL_PREDICATES_DECL
+
+#define GET_GLOBALISEL_TEMPORARIES_DECL
+#include "LoongArchGenGlobalISel.inc"
+#undef GET_GLOBALISEL_TEMPORARIES_DECL
+};
+
+} // end anonymous namespace
+
+#define GET_GLOBALISEL_IMPL
+#include "LoongArchGenGlobalISel.inc"
+#undef GET_GLOBALISEL_IMPL
+
+LoongArchInstructionSelector::LoongArchInstructionSelector(
+ const LoongArchTargetMachine &TM, const LoongArchSubtarget &STI,
+ const LoongArchRegisterBankInfo &RBI)
+ : InstructionSelector(), STI(STI), TII(*STI.getInstrInfo()),
+ TRI(*STI.getRegisterInfo()), RBI(RBI),
+
+#define GET_GLOBALISEL_PREDICATES_INIT
+#include "LoongArchGenGlobalISel.inc"
+#undef GET_GLOBALISEL_PREDICATES_INIT
+#define GET_GLOBALISEL_TEMPORARIES_INIT
+#include "LoongArchGenGlobalISel.inc"
+#undef GET_GLOBALISEL_TEMPORARIES_INIT
+{
+}
+
+bool LoongArchInstructionSelector::select(MachineInstr &I) {
+
+ if (!isPreISelGenericOpcode(I.getOpcode())) {
+ // Certain non-generic instructions also need some special handling.
+ return true;
+ }
+
+ if (selectImpl(I, *CoverageInfo))
+ return true;
+
+ return false;
+}
+
+namespace llvm {
+InstructionSelector *
+createLoongArchInstructionSelector(const LoongArchTargetMachine &TM,
+ LoongArchSubtarget &Subtarget,
+ LoongArchRegisterBankInfo &RBI) {
+ return new LoongArchInstructionSelector(TM, Subtarget, RBI);
+}
+} // end namespace llvm
diff --git a/llvm/lib/Target/LoongArch/LoongArchLegalizerInfo.cpp b/llvm/lib/Target/LoongArch/LoongArchLegalizerInfo.cpp
new file mode 100644
index 00000000000000..0b0f38c4499510
--- /dev/null
+++ b/llvm/lib/Target/LoongArch/LoongArchLegalizerInfo.cpp
@@ -0,0 +1,24 @@
+//===-- LoongArchLegalizerInfo.cpp ----------------------------------*- C++
+//-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+/// \file
+/// This file implements the targeting of the Machinelegalizer class for
+/// LoongArch. \todo This should be generated by TableGen.
+//===----------------------------------------------------------------------===//
+
+#include "LoongArchLegalizerInfo.h"
+#include "llvm/CodeGen/TargetOpcodes.h"
+#include "llvm/CodeGen/ValueTypes.h"
+#include "llvm/IR/DerivedTypes.h"
+#include "llvm/IR/Type.h"
+
+using namespace llvm;
+
+LoongArchLegalizerInfo::LoongArchLegalizerInfo(const LoongArchSubtarget &ST) {
+ getLegacyLegalizerInfo().computeTables();
+}
diff --git a/llvm/lib/Target/LoongArch/LoongArchLegalizerInfo.h b/llvm/lib/Target/LoongArch/LoongArchLegalizerInfo.h
new file mode 100644
index 00000000000000..387fde21f4e5c9
--- /dev/null
+++ b/llvm/lib/Target/LoongArch/LoongArchLegalizerInfo.h
@@ -0,0 +1,29 @@
+//===-- LoongArchLegalizerInfo.h ------------------------------------*- C++
+//-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+/// \file
+/// This file declares the targeting of the Machinelegalizer class for
+/// LoongArch. \todo This should be generated by TableGen.
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_LoongArch_LoongArchMACHINELEGALIZER_H
+#define LLVM_LIB_TARGET_LoongArch_LoongArchMACHINELEGALIZER_H
+
+#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
+
+namespace llvm {
+
+class LoongArchSubtarget;
+
+/// This class provides the information for the target register banks.
+class LoongArchLegalizerInfo : public LegalizerInfo {
+public:
+ LoongArchLegalizerInfo(const LoongArchSubtarget &ST);
+};
+} // end namespace llvm
+#endif
diff --git a/llvm/lib/Target/LoongArch/LoongArchRegisterBankInfo.cpp b/llvm/lib/Target/LoongArch/LoongArchRegisterBankInfo.cpp
new file mode 100644
index 00000000000000..59452f338f91c4
--- /dev/null
+++ b/llvm/lib/Target/LoongArch/LoongArchRegisterBankInfo.cpp
@@ -0,0 +1,27 @@
+//===-- LoongArchRegisterBankInfo.cpp -------------------------------*- C++
+//-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+/// \file
+/// This file implements the targeting of the RegisterBankInfo class for
+/// LoongArch. \todo This should be generated by TableGen.
+//===----------------------------------------------------------------------===//
+
+#include "LoongArchRegisterBankInfo.h"
+#include "MCTargetDesc/LoongArchMCTargetDesc.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/RegisterBank.h"
+#include "llvm/CodeGen/RegisterBankInfo.h"
+#include "llvm/CodeGen/TargetRegisterInfo.h"
+
+#define GET_TARGET_REGBANK_IMPL
+#include "LoongArchGenRegisterBank.inc"
+
+using namespace llvm;
+
+LoongArchRegisterBankInfo::LoongArchRegisterBankInfo(unsigned HwMode)
+ : LoongArchGenRegisterBankInfo(HwMode) {}
diff --git a/llvm/lib/Target/LoongArch/LoongArchRegisterBankInfo.h b/llvm/lib/Target/LoongArch/LoongArchRegisterBankInfo.h
new file mode 100644
index 00000000000000..f9f27a0ef27fd5
--- /dev/null
+++ b/llvm/lib/Target/LoongArch/LoongArchRegisterBankInfo.h
@@ -0,0 +1,38 @@
+//===-- LoongArchRegisterBankInfo.h ---------------------------------*- C++
+//-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+/// \file
+/// This file declares the targeting of the RegisterBankInfo class for
+/// LoongArch. \todo This should be generated by TableGen.
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_LoongArch_LoongArchREGISTERBANKINFO_H
+#define LLVM_LIB_TARGET_LoongArch_LoongArchREGISTERBANKINFO_H
+
+#include "llvm/CodeGen/RegisterBankInfo.h"
+
+#define GET_REGBANK_DECLARATIONS
+#include "LoongArchGenRegisterBank.inc"
+
+namespace llvm {
+
+class TargetRegisterInfo;
+
+class LoongArchGenRegisterBankInfo : public RegisterBankInfo {
+protected:
+#define GET_TARGET_REGBANK_CLASS
+#include "LoongArchGenRegisterBank.inc"
+};
+
+/// This class provides the information for the target register banks.
+class LoongArchRegisterBankInfo final : public LoongArchGenRegisterBankInfo {
+public:
+ LoongArchRegisterBankInfo(unsigned HwMode);
+};
+} // end namespace llvm
+#endif
diff --git a/llvm/lib/Target/LoongArch/LoongArchRegisterBanks.td b/llvm/lib/Target/LoongArch/LoongArchRegisterBanks.td
new file mode 100644
index 00000000000000..bf77dc222bd28e
--- /dev/null
+++ b/llvm/lib/Target/LoongArch/LoongArchRegisterBanks.td
@@ -0,0 +1,15 @@
+//=-- LoongArchRegisterBank.td - Describe the LoongArch Banks --------*- tablegen -*-=//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+//
+//===----------------------------------------------------------------------===//
+
+/// General Purpose Registers: X.
+def GPRBRegBank : RegisterBank<"GPRB", [GPR]>;
+
+def FPRBRegBank : RegisterBank<"FPRB", [FPR64]>;
diff --git a/llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp b/llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp
index ffcde7dd1fa741..0ee3d62058903a 100644
--- a/llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp
@@ -11,7 +11,11 @@
//===----------------------------------------------------------------------===//
#include "LoongArchSubtarget.h"
+#include "LoongArchCallLowering.h"
#include "LoongArchFrameLowering.h"
+#include "LoongArchLegalizerInfo.h"
+#include "LoongArchRegisterBankInfo.h"
+#include "LoongArchTargetMachine.h"
#include "MCTargetDesc/LoongArchBaseInfo.h"
using namespace llvm;
@@ -88,4 +92,28 @@ LoongArchSubtarget::LoongArchSubtarget(const Triple &TT, StringRef CPU,
: LoongArchGenSubtargetInfo(TT, CPU, TuneCPU, FS),
FrameLowering(
initializeSubtargetDependencies(TT, CPU, TuneCPU, FS, ABIName)),
- InstrInfo(*this), RegInfo(getHwMode()), TLInfo(TM, *this) {}
+ InstrInfo(*this), RegInfo(getHwMode()), TLInfo(TM, *this) {
+ CallLoweringInfo.reset(new LoongArchCallLowering(*getTargetLowering()));
+ Legalizer.reset(new LoongArchLegalizerInfo(*this));
+
+ auto *RBI = new LoongArchRegisterBankInfo(getHwMode());
+ RegBankInfo.reset(RBI);
+ InstSelector.reset(createLoongArchInstructionSelector(
+ *static_cast<const LoongArchTargetMachine *>(&TM), *this, *RBI));
+}
+
+const CallLowering *LoongArchSubtarget::getCallLowering() const {
+ return CallLoweringInfo.get();
+}
+
+InstructionSelector *LoongArchSubtarget::getInstructionSelector() const {
+ return InstSelector.get();
+}
+
+const LegalizerInfo *LoongArchSubtarget::getLegalizerInfo() const {
+ return Legalizer.get();
+}
+
+const RegisterBankInfo *LoongArchSubtarget::getRegBankInfo() const {
+ return RegBankInfo.get();
+}
diff --git a/llvm/lib/Target/LoongArch/LoongArchSubtarget.h b/llvm/lib/Target/LoongArch/LoongArchSubtarget.h
index 5c173675cca4cc..cdbabafe8cb329 100644
--- a/llvm/lib/Target/LoongArch/LoongArchSubtarget.h
+++ b/llvm/lib/Target/LoongArch/LoongArchSubtarget.h
@@ -18,6 +18,10 @@
#include "LoongArchInstrInfo.h"
#include "LoongArchRegisterInfo.h"
#include "MCTargetDesc/LoongArchBaseInfo.h"
+#include "llvm/CodeGen/GlobalISel/CallLowering.h"
+#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
+#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
+#include "llvm/CodeGen/RegisterBankInfo.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/IR/DataLayout.h"
@@ -109,6 +113,19 @@ class LoongArchSubtarget : public LoongArchGenSubtargetInfo {
Align getPrefFunctionAlignment() const { return PrefFunctionAlignment; }
Align getPrefLoopAlignment() const { return PrefLoopAlignment; }
unsigned getMaxBytesForAlignment() const { return MaxBytesForAlignment; }
+
+protected:
+ // GlobalISel related APIs.
+ std::unique_ptr<CallLowering> CallLoweringInfo;
+ std::unique_ptr<InstructionSelector> InstSelector;
+ std::unique_ptr<LegalizerInfo> Legalizer;
+ std::unique_ptr<RegisterBankInfo> RegBankInfo;
+
+public:
+ const CallLowering *getCallLowering() const override;
+ InstructionSele...
[truncated]
|
arsenm
reviewed
Jan 4, 2024
tschuett
reviewed
Jan 4, 2024
You can test this locally with the following command:git-clang-format --diff 7df28fd61aa4603846b3ce16f9f988ccc780a584 0e3cb2e67f7939eea3eb6730c15e623daccd08f8 -- llvm/lib/Target/LoongArch/LoongArchCallLowering.cpp llvm/lib/Target/LoongArch/LoongArchCallLowering.h llvm/lib/Target/LoongArch/LoongArchInstructionSelector.cpp llvm/lib/Target/LoongArch/LoongArchLegalizerInfo.cpp llvm/lib/Target/LoongArch/LoongArchLegalizerInfo.h llvm/lib/Target/LoongArch/LoongArchRegisterBankInfo.cpp llvm/lib/Target/LoongArch/LoongArchRegisterBankInfo.h llvm/lib/Target/LoongArch/LoongArch.h llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp llvm/lib/Target/LoongArch/LoongArchSubtarget.h llvm/lib/Target/LoongArch/LoongArchTargetMachine.cppView the diff from clang-format here.diff --git a/llvm/lib/Target/LoongArch/LoongArchCallLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchCallLowering.cpp
index 7ec7fa09ed..4002ba46fe 100644
--- a/llvm/lib/Target/LoongArch/LoongArchCallLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchCallLowering.cpp
@@ -31,7 +31,7 @@ bool LoongArchCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
if (Val != nullptr)
return false;
-
+
MIRBuilder.insertInstr(Ret);
return true;
}
|
arsenm
approved these changes
Jan 9, 2024
| return true; | ||
| } | ||
|
|
||
| if (selectImpl(I, *CoverageInfo)) |
There was a problem hiding this comment.
Could fold to return selectImpl but I assume this will fill in other code later
SixWeining
reviewed
Jan 9, 2024
| @@ -0,0 +1,16 @@ | |||
| ; RUN: llc -O0 --mtriple=loongarch32 -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \ | |||
There was a problem hiding this comment.
- Use standard options listed by
llc --help-hiddenandFileCheck --help. For example,--global-iseland--check-prefix=. - Can we use utils/update_llc_test_checks.py to auto-gen the check lines?
There was a problem hiding this comment.
The standard option for GlobalISel is -global-isel with a single dash.
There was a problem hiding this comment.
I also think it should be the first option in the argument list
| ; RUN: | FileCheck %s -check-prefix=LA64 | ||
|
|
||
| define void @foo() { | ||
| ; LA32-LABEL: name: foo |
There was a problem hiding this comment.
Remove useless leading spaces.
| @@ -0,0 +1,18 @@ | |||
| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py | |||
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It's better to put the test and future tests in a seperate sub-folder, like GlobalISel.
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| //===-- LoongArchCallLowering.cpp - Call lowering ---------------*- C++ -*-===// | |||
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Since the filename is too generic, you can put this file and other files in a seperate sub-folder like GISel.
| // FIXME: This is necessary because DAGISel uses "Subtarget->" and GlobalISel | ||
| // uses "STI." in the code generated by TableGen. We need to unify the name of | ||
| // Subtarget variable. | ||
| const LoongArchSubtarget *Subtarget = &STI; |
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Is this variable Subtarget necessary?
aemerson
reviewed
Jan 12, 2024
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| ; RUN: llc -O0 --mtriple=loongarch32 -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \ | |||
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The standard option for GlobalISel is -global-isel with a single dash.
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Should push a clang-format commit to satisfy the bot |
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Any progress? @GongMengyao |
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Add an initial GlobalISel skeleton for LoongArch. It can only run ir translator for
ret void.