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[X86] Fix SLH crash on llvm.eh.sjlh.longjmp #77959
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@llvm/pr-subscribers-backend-x86 Author: Nicholas Mosier (nmosier) ChangesFix #60081. Full diff: https://github.com/llvm/llvm-project/pull/77959.diff 2 Files Affected:
diff --git a/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp b/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
index 6301285fe95457..901b7e8cc36d4f 100644
--- a/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
+++ b/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
@@ -1366,6 +1366,7 @@ void X86SpeculativeLoadHardeningPass::tracePredStateThroughBlocksAndHarden(
if (EnablePostLoadHardening && X86InstrInfo::isDataInvariantLoad(MI) &&
!isEFLAGSDefLive(MI) && MI.getDesc().getNumDefs() == 1 &&
MI.getOperand(0).isReg() &&
+ MI.getOperand(0).getReg().isVirtual() &&
canHardenRegister(MI.getOperand(0).getReg()) &&
!HardenedAddrRegs.count(BaseReg) &&
!HardenedAddrRegs.count(IndexReg)) {
diff --git a/llvm/test/CodeGen/X86/speculative-load-hardening.ll b/llvm/test/CodeGen/X86/speculative-load-hardening.ll
index 0c47fcddc43af2..83eceda8743223 100644
--- a/llvm/test/CodeGen/X86/speculative-load-hardening.ll
+++ b/llvm/test/CodeGen/X86/speculative-load-hardening.ll
@@ -1161,3 +1161,34 @@ define void @idempotent_atomic(ptr %x) speculative_load_hardening {
%tmp = atomicrmw or ptr %x, i32 0 seq_cst
ret void
}
+
+; Make sure we don't crash on longjmps (PR60081).
+declare void @llvm.eh.sjlj.longjmp(ptr)
+define void @test_physical_register_defs(ptr %env) speculative_load_hardening {
+; X64-LABEL: test_physical_register_defs:
+; X64: # %bb.0:
+; X64-NEXT: pushq %rbp
+; X64-NEXT: .cfi_def_cfa_offset 16
+; X64-NEXT: .cfi_offset %rbp, -16
+; X64-NEXT: movq %rsp, %rax
+; X64-NEXT: movq $-1, %rcx
+; X64-NEXT: sarq $63, %rax
+; X64-NEXT: orq %rax, %rdi
+; X64-NEXT: movq (%rdi), %rbp
+; X64-NEXT: movq 8(%rdi), %rcx
+; X64-NEXT: movq 16(%rdi), %rsp
+; X64-NEXT: orq %rax, %rcx
+; X64-NEXT: jmpq *%rcx
+;
+; X64-LFENCE-LABEL: test_physical_register_defs:
+; X64-LFENCE: # %bb.0:
+; X64-LFENCE-NEXT: pushq %rbp
+; X64-LFENCE-NEXT: .cfi_def_cfa_offset 16
+; X64-LFENCE-NEXT: .cfi_offset %rbp, -16
+; X64-LFENCE-NEXT: movq (%rdi), %rbp
+; X64-LFENCE-NEXT: movq 8(%rdi), %rax
+; X64-LFENCE-NEXT: movq 16(%rdi), %rsp
+; X64-LFENCE-NEXT: jmpq *%rax
+ call void @llvm.eh.sjlj.longjmp(ptr %env)
+ unreachable
+}
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@@ -1365,7 +1365,7 @@ void X86SpeculativeLoadHardeningPass::tracePredStateThroughBlocksAndHarden( | |||
// could prune out subsequent loads. | |||
if (EnablePostLoadHardening && X86InstrInfo::isDataInvariantLoad(MI) && | |||
!isEFLAGSDefLive(MI) && MI.getDesc().getNumDefs() == 1 && | |||
MI.getOperand(0).isReg() && | |||
MI.getOperand(0).isReg() && MI.getOperand(0).getReg().isVirtual() && |
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Move the check to canHardenRegister
?
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Done.
…ant checks/assertions
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LGTM.
@phoebewang Can you merge this for me? I don't have commit access. Thanks! |
Fix #60081.