[X86][test] Add --show-mc-encoding for lowering tests of NDD arithmetic instructions #78406

XinWang10 · 2024-01-17T08:08:38Z

#77564 added lowering tests for NDD arithmetic instructions.
It would be great to add --show-mc-encoding to check the NDD variant is selected first.

llvmbot · 2024-01-17T08:09:14Z

@llvm/pr-subscribers-backend-x86

Author: None (XinWang10)

Changes

77564 missed lowering test for ndd and instructions, this patch add it back.
And add --show-mc-encoding to tests, we could see we miss encoding optimization for ND entries, like 'adcl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xd7,0x7b,0x00,0x00,0x00]'

Patch is 165.52 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/78406.diff

7 Files Affected:

(modified) llvm/test/CodeGen/X86/apx/adc.ll (+118-109)
(modified) llvm/test/CodeGen/X86/apx/add.ll (+156-139)
(modified) llvm/test/CodeGen/X86/apx/and.ll (+164-137)
(modified) llvm/test/CodeGen/X86/apx/or.ll (+162-135)
(modified) llvm/test/CodeGen/X86/apx/sbb.ll (+111-105)
(modified) llvm/test/CodeGen/X86/apx/sub.ll (+156-141)
(modified) llvm/test/CodeGen/X86/apx/xor.ll (+151-127)

diff --git a/llvm/test/CodeGen/X86/apx/adc.ll b/llvm/test/CodeGen/X86/apx/adc.ll
index af9458e1b01f39e..e8657acea8ad420 100644
--- a/llvm/test/CodeGen/X86/apx/adc.ll
+++ b/llvm/test/CodeGen/X86/apx/adc.ll
@@ -1,12 +1,12 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s
 
 define i8 @adc8rr(i8 %a, i8 %b, i8 %x, i8 %y) nounwind {
 ; CHECK-LABEL: adc8rr:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subb %dl, %cl, %al
-; CHECK-NEXT:    adcb %sil, %dil, %al
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1]
+; CHECK-NEXT:    adcb %sil, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x10,0xf7]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %s = add i8 %a, %b
   %k = icmp ugt i8 %x, %y
   %z = zext i1 %k to i8
@@ -17,9 +17,9 @@ define i8 @adc8rr(i8 %a, i8 %b, i8 %x, i8 %y) nounwind {
 define i16 @adc16rr(i16 %a, i16 %b, i16 %x, i16 %y) nounwind {
 ; CHECK-LABEL: adc16rr:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subw %dx, %cx, %ax
-; CHECK-NEXT:    adcw %si, %di, %ax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1]
+; CHECK-NEXT:    adcw %si, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x11,0xf7]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %s = add i16 %a, %b
   %k = icmp ugt i16 %x, %y
   %z = zext i1 %k to i16
@@ -30,9 +30,9 @@ define i16 @adc16rr(i16 %a, i16 %b, i16 %x, i16 %y) nounwind {
 define i32 @adc32rr(i32 %a, i32 %b, i32 %x, i32 %y) nounwind {
 ; CHECK-LABEL: adc32rr:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subl %edx, %ecx, %eax
-; CHECK-NEXT:    adcl %esi, %edi, %eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1]
+; CHECK-NEXT:    adcl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x11,0xf7]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %s = add i32 %a, %b
   %k = icmp ugt i32 %x, %y
   %z = zext i1 %k to i32
@@ -43,9 +43,9 @@ define i32 @adc32rr(i32 %a, i32 %b, i32 %x, i32 %y) nounwind {
 define i64 @adc64rr(i64 %a, i64 %b, i64 %x, i64 %y) nounwind {
 ; CHECK-LABEL: adc64rr:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subq %rdx, %rcx, %rax
-; CHECK-NEXT:    adcq %rsi, %rdi, %rax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1]
+; CHECK-NEXT:    adcq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x11,0xf7]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %s = add i64 %a, %b
   %k = icmp ugt i64 %x, %y
   %z = zext i1 %k to i64
@@ -56,9 +56,9 @@ define i64 @adc64rr(i64 %a, i64 %b, i64 %x, i64 %y) nounwind {
 define i8 @adc8rm(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
 ; CHECK-LABEL: adc8rm:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subb %dl, %cl, %al
-; CHECK-NEXT:    adcb (%rsi), %dil, %al
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1]
+; CHECK-NEXT:    adcb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x12,0x3e]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %b = load i8, ptr %ptr
   %s = add i8 %a, %b
   %k = icmp ugt i8 %x, %y
@@ -70,9 +70,9 @@ define i8 @adc8rm(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
 define i16 @adc16rm(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
 ; CHECK-LABEL: adc16rm:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subw %dx, %cx, %ax
-; CHECK-NEXT:    adcw (%rsi), %di, %ax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1]
+; CHECK-NEXT:    adcw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x13,0x3e]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %b = load i16, ptr %ptr
   %s = add i16 %a, %b
   %k = icmp ugt i16 %x, %y
@@ -84,9 +84,9 @@ define i16 @adc16rm(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
 define i32 @adc32rm(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
 ; CHECK-LABEL: adc32rm:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subl %edx, %ecx, %eax
-; CHECK-NEXT:    adcl (%rsi), %edi, %eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1]
+; CHECK-NEXT:    adcl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x13,0x3e]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %b = load i32, ptr %ptr
   %s = add i32 %a, %b
   %k = icmp ugt i32 %x, %y
@@ -98,9 +98,9 @@ define i32 @adc32rm(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
 define i64 @adc64rm(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
 ; CHECK-LABEL: adc64rm:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subq %rdx, %rcx, %rax
-; CHECK-NEXT:    adcq (%rsi), %rdi, %rax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1]
+; CHECK-NEXT:    adcq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x13,0x3e]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %b = load i64, ptr %ptr
   %s = add i64 %a, %b
   %k = icmp ugt i64 %x, %y
@@ -112,11 +112,11 @@ define i64 @adc64rm(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
 define i16 @adc16ri8(i16 %a, i16 %x, i16 %y) nounwind {
 ; CHECK-LABEL: adc16ri8:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subw %si, %dx, %ax
-; CHECK-NEXT:    adcw $0, %di, %ax
-; CHECK-NEXT:    addl $123, %eax
+; CHECK-NEXT:    subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
+; CHECK-NEXT:    adcw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xd7,0x00,0x00]
+; CHECK-NEXT:    addl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x7b]
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %s = add i16 %a, 123
   %k = icmp ugt i16 %x, %y
   %z = zext i1 %k to i16
@@ -127,9 +127,9 @@ define i16 @adc16ri8(i16 %a, i16 %x, i16 %y) nounwind {
 define i32 @adc32ri8(i32 %a, i32 %x, i32 %y) nounwind {
 ; CHECK-LABEL: adc32ri8:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subl %esi, %edx, %eax
-; CHECK-NEXT:    adcl $123, %edi, %eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
+; CHECK-NEXT:    adcl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xd7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %s = add i32 %a, 123
   %k = icmp ugt i32 %x, %y
   %z = zext i1 %k to i32
@@ -140,9 +140,9 @@ define i32 @adc32ri8(i32 %a, i32 %x, i32 %y) nounwind {
 define i64 @adc64ri8(i64 %a, i64 %x, i64 %y) nounwind {
 ; CHECK-LABEL: adc64ri8:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subq %rsi, %rdx, %rax
-; CHECK-NEXT:    adcq $123, %rdi, %rax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
+; CHECK-NEXT:    adcq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xd7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %s = add i64 %a, 123
   %k = icmp ugt i64 %x, %y
   %z = zext i1 %k to i64
@@ -153,9 +153,9 @@ define i64 @adc64ri8(i64 %a, i64 %x, i64 %y) nounwind {
 define i8 @adc8ri(i8 %a, i8 %x, i8 %y) nounwind {
 ; CHECK-LABEL: adc8ri:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subb %sil, %dl, %al
-; CHECK-NEXT:    adcb $123, %dil, %al
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subb %sil, %dl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xf2]
+; CHECK-NEXT:    adcb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xd7,0x7b]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %s = add i8 %a, 123
   %k = icmp ugt i8 %x, %y
   %z = zext i1 %k to i8
@@ -166,11 +166,12 @@ define i8 @adc8ri(i8 %a, i8 %x, i8 %y) nounwind {
 define i16 @adc16ri(i16 %a, i16 %x, i16 %y) nounwind {
 ; CHECK-LABEL: adc16ri:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subw %si, %dx, %ax
-; CHECK-NEXT:    adcw $0, %di, %ax
-; CHECK-NEXT:    addl $1234, %eax # imm = 0x4D2
+; CHECK-NEXT:    subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
+; CHECK-NEXT:    adcw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xd7,0x00,0x00]
+; CHECK-NEXT:    addl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xd2,0x04,0x00,0x00]
+; CHECK-NEXT:    # imm = 0x4D2
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %s = add i16 %a, 1234
   %k = icmp ugt i16 %x, %y
   %z = zext i1 %k to i16
@@ -181,9 +182,10 @@ define i16 @adc16ri(i16 %a, i16 %x, i16 %y) nounwind {
 define i32 @adc32ri(i32 %a, i32 %x, i32 %y) nounwind {
 ; CHECK-LABEL: adc32ri:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subl %esi, %edx, %eax
-; CHECK-NEXT:    adcl $123456, %edi, %eax # imm = 0x1E240
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
+; CHECK-NEXT:    adcl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xd7,0x40,0xe2,0x01,0x00]
+; CHECK-NEXT:    # imm = 0x1E240
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %s = add i32 %a, 123456
   %k = icmp ugt i32 %x, %y
   %z = zext i1 %k to i32
@@ -194,9 +196,10 @@ define i32 @adc32ri(i32 %a, i32 %x, i32 %y) nounwind {
 define i64 @adc64ri(i64 %a, i64 %x, i64 %y) nounwind {
 ; CHECK-LABEL: adc64ri:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subq %rsi, %rdx, %rax
-; CHECK-NEXT:    adcq $123456, %rdi, %rax # imm = 0x1E240
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
+; CHECK-NEXT:    adcq $123456, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xd7,0x40,0xe2,0x01,0x00]
+; CHECK-NEXT:    # imm = 0x1E240
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %s = add i64 %a, 123456
   %k = icmp ugt i64 %x, %y
   %z = zext i1 %k to i64
@@ -207,9 +210,9 @@ define i64 @adc64ri(i64 %a, i64 %x, i64 %y) nounwind {
 define i8 @adc8mr(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
 ; CHECK-LABEL: adc8mr:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subb %dl, %cl, %al
-; CHECK-NEXT:    adcb %dil, (%rsi), %al
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1]
+; CHECK-NEXT:    adcb %dil, (%rsi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x10,0x3e]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %b = load i8, ptr %ptr
   %s = add i8 %b, %a
   %k = icmp ugt i8 %x, %y
@@ -221,9 +224,9 @@ define i8 @adc8mr(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
 define i16 @adc16mr(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
 ; CHECK-LABEL: adc16mr:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subw %dx, %cx, %ax
-; CHECK-NEXT:    adcw %di, (%rsi), %ax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1]
+; CHECK-NEXT:    adcw %di, (%rsi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x11,0x3e]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %b = load i16, ptr %ptr
   %s = add i16 %b, %a
   %k = icmp ugt i16 %x, %y
@@ -235,9 +238,9 @@ define i16 @adc16mr(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
 define i32 @adc32mr(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
 ; CHECK-LABEL: adc32mr:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subl %edx, %ecx, %eax
-; CHECK-NEXT:    adcl %edi, (%rsi), %eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1]
+; CHECK-NEXT:    adcl %edi, (%rsi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x11,0x3e]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %b = load i32, ptr %ptr
   %s = add i32 %b, %a
   %k = icmp ugt i32 %x, %y
@@ -249,9 +252,9 @@ define i32 @adc32mr(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
 define i64 @adc64mr(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
 ; CHECK-LABEL: adc64mr:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subq %rdx, %rcx, %rax
-; CHECK-NEXT:    adcq %rdi, (%rsi), %rax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1]
+; CHECK-NEXT:    adcq %rdi, (%rsi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x11,0x3e]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %b = load i64, ptr %ptr
   %s = add i64 %b, %a
   %k = icmp ugt i64 %x, %y
@@ -263,11 +266,11 @@ define i64 @adc64mr(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
 define i16 @adc16mi8(ptr %ptr, i16 %x, i16 %y) nounwind {
 ; CHECK-LABEL: adc16mi8:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subw %si, %dx, %ax
-; CHECK-NEXT:    adcw $0, (%rdi), %ax
-; CHECK-NEXT:    addl $123, %eax
+; CHECK-NEXT:    subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
+; CHECK-NEXT:    adcw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x17,0x00,0x00]
+; CHECK-NEXT:    addl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x7b]
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %a = load i16, ptr %ptr
   %s = add i16 %a, 123
   %k = icmp ugt i16 %x, %y
@@ -279,9 +282,9 @@ define i16 @adc16mi8(ptr %ptr, i16 %x, i16 %y) nounwind {
 define i32 @adc32mi8(ptr %ptr, i32 %x, i32 %y) nounwind {
 ; CHECK-LABEL: adc32mi8:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subl %esi, %edx, %eax
-; CHECK-NEXT:    adcl $123, (%rdi), %eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
+; CHECK-NEXT:    adcl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x17,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %a = load i32, ptr %ptr
   %s = add i32 %a, 123
   %k = icmp ugt i32 %x, %y
@@ -293,9 +296,9 @@ define i32 @adc32mi8(ptr %ptr, i32 %x, i32 %y) nounwind {
 define i64 @adc64mi8(ptr %ptr, i64 %x, i64 %y) nounwind {
 ; CHECK-LABEL: adc64mi8:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subq %rsi, %rdx, %rax
-; CHECK-NEXT:    adcq $123, (%rdi), %rax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
+; CHECK-NEXT:    adcq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x17,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %a = load i64, ptr %ptr
   %s = add i64 %a, 123
   %k = icmp ugt i64 %x, %y
@@ -307,9 +310,9 @@ define i64 @adc64mi8(ptr %ptr, i64 %x, i64 %y) nounwind {
 define i8 @adc8mi(ptr %ptr, i8 %x, i8 %y) nounwind {
 ; CHECK-LABEL: adc8mi:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subb %sil, %dl, %al
-; CHECK-NEXT:    adcb $123, (%rdi), %al
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subb %sil, %dl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xf2]
+; CHECK-NEXT:    adcb $123, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x17,0x7b]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %a = load i8, ptr %ptr
   %s = add i8 %a, 123
   %k = icmp ugt i8 %x, %y
@@ -321,11 +324,12 @@ define i8 @adc8mi(ptr %ptr, i8 %x, i8 %y) nounwind {
 define i16 @adc16mi(ptr %ptr, i16 %x, i16 %y) nounwind {
 ; CHECK-LABEL: adc16mi:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subw %si, %dx, %ax
-; CHECK-NEXT:    adcw $0, (%rdi), %ax
-; CHECK-NEXT:    addl $1234, %eax # imm = 0x4D2
+; CHECK-NEXT:    subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
+; CHECK-NEXT:    adcw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x17,0x00,0x00]
+; CHECK-NEXT:    addl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xd2,0x04,0x00,0x00]
+; CHECK-NEXT:    # imm = 0x4D2
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %a = load i16, ptr %ptr
   %s = add i16 %a, 1234
   %k = icmp ugt i16 %x, %y
@@ -337,9 +341,10 @@ define i16 @adc16mi(ptr %ptr, i16 %x, i16 %y) nounwind {
 define i32 @adc32mi(ptr %ptr, i32 %x, i32 %y) nounwind {
 ; CHECK-LABEL: adc32mi:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subl %esi, %edx, %eax
-; CHECK-NEXT:    adcl $123456, (%rdi), %eax # imm = 0x1E240
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
+; CHECK-NEXT:    adcl $123456, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x17,0x40,0xe2,0x01,0x00]
+; CHECK-NEXT:    # imm = 0x1E240
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %a = load i32, ptr %ptr
   %s = add i32 %a, 123456
   %k = icmp ugt i32 %x, %y
@@ -351,9 +356,10 @@ define i32 @adc32mi(ptr %ptr, i32 %x, i32 %y) nounwind {
 define i64 @adc64mi(ptr %ptr, i64 %x, i64 %y) nounwind {
 ; CHECK-LABEL: adc64mi:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subq %rsi, %rdx, %rax
-; CHECK-NEXT:    adcq $123456, (%rdi), %rax # imm = 0x1E240
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
+; CHECK-NEXT:    adcq $123456, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x17,0x40,0xe2,0x01,0x00]
+; CHECK-NEXT:    # imm = 0x1E240
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %a = load i64, ptr %ptr
   %s = add i64 %a, 123456
   %k = icmp ugt i64 %x, %y
@@ -365,9 +371,9 @@ define i64 @adc64mi(ptr %ptr, i64 %x, i64 %y) nounwind {
 define void @adc8mr_legacy(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
 ; CHECK-LABEL: adc8mr_legacy:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subb %dl, %cl, %al
-; CHECK-NEXT:    adcb %dil, (%rsi)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1]
+; CHECK-NEXT:    adcb %dil, (%rsi) # encoding: [0x40,0x10,0x3e]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %b = load i8, ptr %ptr
   %s = add i8 %b, %a
   %k = icmp ugt i8 %x, %y
@@ -380,9 +386,9 @@ define void @adc8mr_legacy(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
 define void @adc16mr_legacy(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
 ; CHECK-LABEL: adc16mr_legacy:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subw %dx, %cx, %ax
-; CHECK-NEXT:    adcw %di, (%rsi)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1]
+; CHECK-NEXT:    adcw %di, (%rsi) # encoding: [0x66,0x11,0x3e]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %b = load i16, ptr %ptr
   %s = add i16 %b, %a
   %k = icmp ugt i16 %x, %y
@@ -395,9 +401,9 @@ define void @adc16mr_legacy(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
 define void @adc32mr_legacy(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
 ; CHECK-LABEL: adc32mr_legacy:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subl %edx, %ecx, %eax
-; CHECK-NEXT:    adcl %edi, (%rsi)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1]
+; CHECK-NEXT:    adcl %edi, (%rsi) # encoding: [0x11,0x3e]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %b = load i32, ptr %ptr
   %s = add i32 %b, %a
   %k = icmp ugt i32 %x, %y
@@ -410,9 +416,9 @@ define void @adc32mr_legacy(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
 define void @adc64mr_legacy(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
 ; CHECK-LABEL: adc64mr_legacy:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subq %rdx, %rcx, %rax
-; CHECK-NEXT:    adcq %rdi, (%rsi)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1]
+; CHECK-NEXT:    adcq %rdi, (%rsi) # encoding: [0x48,0x11,0x3e]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %b = load i64, ptr %ptr
   %s = add i64 %b, %a
   %k = icmp ugt i64 %x, %y
@@ -425,9 +431,9 @@ define void @adc64mr_legacy(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
 define void @adc8mi_legacy(ptr %ptr, i8 %x, i8 %y) nounwind {
 ; CHECK-LABEL: adc8mi_legacy:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subb %sil, %dl, %al
-; CHECK-NEXT:    adcb $123, (%rdi)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subb %sil, %dl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xf2]
+; CHECK-NEXT:    adcb $123, (%rdi) # encoding: [0x80,0x17,0x7b]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %a = load i8, ptr %ptr
   %s = add i8 %a, 123
   %k = icmp ugt i8 %x, %y
@@ -440,11 +446,12 @@ define void @adc8mi_legacy(ptr %ptr, i8 %x, i8 %y) nounwind {
 define void @adc16mi_legacy(ptr %ptr, i16 %x, i16 %y) nounwind {
 ; CHECK-LABEL: adc16mi_legacy:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    subw %si, %dx, %ax
-; CHECK-NEXT:    adcw $0, (%rdi), %ax
-; CHECK-NEXT:    addl $1234, %eax # imm = 0x4D2
-; CHECK-NEXT:    movw %ax, (%rdi)
-; CHECK-NEXT:    retq
+; CHECK-NEXT:    subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
+; CHECK-NEXT:    adcw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x17,0x00,0x00]
+; CHECK-NEXT:    addl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xd2,0x04,0x00,0x00]
+; CHECK-NEXT:    # imm = 0x4D2
+; CHECK-NEXT:    movw %ax, (%rdi) # encoding: [0x66,0x89,0x07]
+; CHECK-NEXT:    retq # encoding: [0xc3]
   %a = load i16, ptr %ptr
   %s = add i16 %a, 1234
   ...
[truncated]

KanRobert

LGTM

RKSimon

LGTM

…ic instructions (llvm#78406) llvm#77564 added lowering tests for NDD arithmetic instructions. It would be great to add `--show-mc-encoding` to check the NDD variant is selected first.

[X86][MC]Add missing test for 77564

6dbd2ac

XinWang10 requested review from KanRobert and phoebewang January 17, 2024 08:08

llvmbot added the backend:X86 label Jan 17, 2024

XinWang10 requested a review from RKSimon January 17, 2024 08:08

KanRobert changed the title ~~[X86][MC]Add missing test for 77564~~ [X86][MC]Add missing test for #77564 Jan 17, 2024

KanRobert changed the title ~~[X86][MC]Add missing test for #77564~~ [X86][test] Add --show-mc-encoding for NDD lowering tests for #77564 Jan 17, 2024

KanRobert changed the title ~~[X86][test] Add --show-mc-encoding for NDD lowering tests for #77564~~ [X86][test] Add --show-mc-encoding for NDD lowering tests Jan 17, 2024

KanRobert approved these changes Jan 17, 2024

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KanRobert changed the title ~~[X86][test] Add --show-mc-encoding for NDD lowering tests~~ [X86][test] Add --show-mc-encoding for lowering tests of NDD arithmetic instructions Jan 17, 2024

RKSimon approved these changes Jan 17, 2024

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XinWang10 merged commit f661709 into llvm:main Jan 18, 2024
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[X86][test] Add --show-mc-encoding for lowering tests of NDD arithmetic instructions #78406

[X86][test] Add --show-mc-encoding for lowering tests of NDD arithmetic instructions #78406

XinWang10 commented Jan 17, 2024 •

edited by KanRobert

llvmbot commented Jan 17, 2024

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[X86][test] Add --show-mc-encoding for lowering tests of NDD arithmetic instructions #78406

[X86][test] Add --show-mc-encoding for lowering tests of NDD arithmetic instructions #78406

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XinWang10 commented Jan 17, 2024 • edited by KanRobert

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XinWang10 commented Jan 17, 2024 •

edited by KanRobert