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AMDGPU: Document more backend recognized attributes #80239

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merged 8 commits into from
Mar 28, 2024

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@arsenm arsenm commented Feb 1, 2024

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@arsenm arsenm marked this pull request as draft February 1, 2024 04:16
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llvmbot commented Feb 1, 2024

@llvm/pr-subscribers-backend-amdgpu

Author: Matt Arsenault (arsenm)

Changes

Full diff: https://github.com/llvm/llvm-project/pull/80239.diff

1 Files Affected:

  • (modified) llvm/docs/AMDGPUUsage.rst (+26-1)
diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index 6b2417143ca06..ee4af9f51998e 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -1312,6 +1312,31 @@ The AMDGPU backend supports the following LLVM IR attributes.
                                              the frame. This is an internal detail of how LDS variables are lowered,
                                              language front ends should not set this attribute.
 
+    "amdgpu-gds-size"                        Bytes expected to be allocated at the start of GDS memory at entry.
+
+    "amdgpu-git-ptr-high"                    The hard-wired high half of the address of the global information table
+                                             for AMDPAL OS type. 0xffffffff represents no hard-wired high half, since
+                                             current hardware only allows a 16 bit value.
+
+    "amdgpu-32bit-address-high-bits"         Assumed high 32-bits for
+                                             32-bit address spaces which are really truncated
+                                             64-bit addresses (i.e., addrspace(6))
+
+    "amdgpu-color-export"                    Assumed 1 for :ref:`amdgpu_ps <amdgpu_ps>`, and 0 for other calling conventions.
+
+    "amdgpu-depth-export"                    ..TODO:: Describe.
+
+    "InitialPSInputAddr"                     ..TODO:: Describe.
+
+
+    "amdgpu-wave-priority-threshold"         ..TODO:: Describe.
+
+    "amdgpu-memory-bound".                   Set internally by backend
+
+    "amdgpu-wave-limiter"                    Set internally by backend
+
+    "amdgpu-unroll-threshold"                ..TODO:: Describe.
+
      ======================================= ==========================================================
 
 Calling Conventions
@@ -1397,7 +1422,7 @@ The AMDGPU backend supports the following calling conventions:
      ``amdgpu_ls``                   Used for AMDPAL vertex shader if tessellation is in use.
                                      ..TODO::
                                      Describe.
-
+.. _amdgpu_ps:
      ``amdgpu_ps``                   Used for Mesa/AMDPAL pixel shaders.
                                      ..TODO::
                                      Describe.

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@arsenm arsenm requested a review from kosarev February 29, 2024 09:55
@@ -1438,7 +1438,10 @@ The AMDGPU backend supports the following LLVM IR attributes.
:ref:`amdgpu_ps <amdgpu_ps>` shaders. Any bits enabled by this value will
be enabled in the final register value.

"amdgpu-wave-priority-threshold" ..TODO:: Describe.
"amdgpu-wave-priority-threshold" VALU instruction count threshold for adjusting wave priority. If exceeded,
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ping @kosarev

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The description looks correct to me. The pass was never proven useful though, if I recall correctly.

@arsenm arsenm changed the title WIP: AMDGPU: Document more backend recognized attributes AMDGPU: Document more backend recognized attributes Feb 29, 2024
@arsenm arsenm marked this pull request as ready for review February 29, 2024 11:14
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arsenm commented Mar 19, 2024

ping

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arsenm commented Mar 28, 2024

ping

Comment on lines +1480 to +1482
"amdgpu-memory-bound" Set internally by backend

"amdgpu-wave-limiter" Set internally by backend
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LLPC sets these in some cases. Any explicit setting takes precedence over the backend's internal heuristics. But I'm not sure if we want to document that.

@arsenm arsenm merged commit c13556c into llvm:main Mar 28, 2024
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@arsenm arsenm deleted the amdgpu-document-attributes branch March 28, 2024 11:27
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