[TableGen] Stop using make_pair and make_tuple. NFC. #81730
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These are unnecessary since C++17.
llvmbot
added
backend:X86
llvm:globalisel
backend:DirectX
llvm:SelectionDAG
|
@llvm/pr-subscribers-llvm-globalisel @llvm/pr-subscribers-llvm-selectiondag Author: Jay Foad (jayfoad) ChangesThese are unnecessary since C++17. Patch is 51.04 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/81730.diff 34 Files Affected:
diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
index 2c2c39a3ef54ff..3fcf2d87cc36ae 100644
--- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
@@ -1277,7 +1277,7 @@ void AsmMatcherInfo::buildRegisterClasses(
if (!ContainingSet.empty()) {
RegisterSets.insert(ContainingSet);
- RegisterMap.insert(std::make_pair(CGR.TheDef, ContainingSet));
+ RegisterMap.insert(std::pair(CGR.TheDef, ContainingSet));
}
}
@@ -1298,7 +1298,7 @@ void AsmMatcherInfo::buildRegisterClasses(
CI->DiagnosticType = "";
CI->IsOptional = false;
CI->DefaultMethod = ""; // unused
- RegisterSetClasses.insert(std::make_pair(RS, CI));
+ RegisterSetClasses.insert(std::pair(RS, CI));
++Index;
}
@@ -1340,7 +1340,7 @@ void AsmMatcherInfo::buildRegisterClasses(
if (!CI->DiagnosticString.empty() && CI->DiagnosticType.empty())
CI->DiagnosticType = RC.getName();
- RegisterClassClasses.insert(std::make_pair(Def, CI));
+ RegisterClassClasses.insert(std::pair(Def, CI));
}
// Populate the map for individual registers.
@@ -2193,7 +2193,7 @@ emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
ConversionRow.push_back(SrcOp2);
// Also create an 'enum' for this combination of tied operands.
- auto Key = std::make_tuple(TiedOp, SrcOp1, SrcOp2);
+ auto Key = std::tuple(TiedOp, SrcOp1, SrcOp2);
TiedOperandsEnumMap.emplace(Key, TiedTupleName);
break;
}
@@ -2342,9 +2342,9 @@ emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
// For a tied operand, emit a reference to the TiedAsmOperandTable
// that contains the operand to copy, and the parsed operands to
// check for their tied constraints.
- auto Key = std::make_tuple((uint8_t)ConversionTable[Row][i + 1],
- (uint8_t)ConversionTable[Row][i + 2],
- (uint8_t)ConversionTable[Row][i + 3]);
+ auto Key = std::tuple((uint8_t)ConversionTable[Row][i + 1],
+ (uint8_t)ConversionTable[Row][i + 2],
+ (uint8_t)ConversionTable[Row][i + 3]);
auto TiedOpndEnum = TiedOperandsEnumMap.find(Key);
assert(TiedOpndEnum != TiedOperandsEnumMap.end() &&
"No record for tied operand pair");
@@ -2812,7 +2812,7 @@ emitMnemonicAliasVariant(raw_ostream &OS, const AsmMatcherInfo &Info,
MatchCode += "return;";
- Cases.push_back(std::make_pair(AliasEntry.first, MatchCode));
+ Cases.push_back(std::pair(AliasEntry.first, MatchCode));
}
StringMatcher("Mnemonic", Cases, OS).Emit(Indent);
}
@@ -2979,7 +2979,7 @@ emitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target,
"std::end(OperandMatchTable),\n";
OS << " Mnemonic, LessOpcodeOperand());\n\n";
} else {
- OS << " auto MnemonicRange = std::make_pair(std::begin(OperandMatchTable),"
+ OS << " auto MnemonicRange = std::pair(std::begin(OperandMatchTable),"
" std::end(OperandMatchTable));\n";
OS << " if (!Mnemonic.empty())\n";
OS << " MnemonicRange =\n";
@@ -3154,7 +3154,7 @@ static void emitMnemonicChecker(raw_ostream &OS, CodeGenTarget &Target,
OS << " auto MnemonicRange = "
"std::equal_range(Start, End, Mnemonic, LessOpcode());\n\n";
} else {
- OS << " auto MnemonicRange = std::make_pair(Start, End);\n";
+ OS << " auto MnemonicRange = std::pair(Start, End);\n";
OS << " unsigned SIndex = Mnemonic.empty() ? 0 : 1;\n";
OS << " if (!Mnemonic.empty())\n";
OS << " MnemonicRange = "
@@ -3629,7 +3629,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
OS << " auto MnemonicRange = "
"std::equal_range(Start, End, Mnemonic, LessOpcode());\n\n";
} else {
- OS << " auto MnemonicRange = std::make_pair(Start, End);\n";
+ OS << " auto MnemonicRange = std::pair(Start, End);\n";
OS << " unsigned SIndex = Mnemonic.empty() ? 0 : 1;\n";
OS << " if (!Mnemonic.empty())\n";
OS << " MnemonicRange = "
diff --git a/llvm/utils/TableGen/AsmWriterEmitter.cpp b/llvm/utils/TableGen/AsmWriterEmitter.cpp
index c05991fdbb1667..a27061ee585a59 100644
--- a/llvm/utils/TableGen/AsmWriterEmitter.cpp
+++ b/llvm/utils/TableGen/AsmWriterEmitter.cpp
@@ -144,13 +144,12 @@ static void EmitInstructions(std::vector<AsmWriterInst> &Insts, raw_ostream &O,
O << " switch (MI->getOpcode()) {\n";
O << " default: llvm_unreachable(\"Unexpected opcode.\");\n";
std::vector<std::pair<std::string, AsmWriterOperand>> OpsToPrint;
- OpsToPrint.push_back(
- std::make_pair(FirstInst.CGI->Namespace.str() +
- "::" + FirstInst.CGI->TheDef->getName().str(),
- FirstInst.Operands[i]));
+ OpsToPrint.push_back(std::pair(FirstInst.CGI->Namespace.str() + "::" +
+ FirstInst.CGI->TheDef->getName().str(),
+ FirstInst.Operands[i]));
for (const AsmWriterInst &AWI : SimilarInsts) {
- OpsToPrint.push_back(std::make_pair(
+ OpsToPrint.push_back(std::pair(
AWI.CGI->Namespace.str() + "::" + AWI.CGI->TheDef->getName().str(),
AWI.Operands[i]));
}
@@ -722,7 +721,7 @@ class IAPrinter {
void addOperand(StringRef Op, int OpIdx, int PrintMethodIdx = -1) {
assert(OpIdx >= 0 && OpIdx < 0xFE && "Idx out of range");
assert(PrintMethodIdx >= -1 && PrintMethodIdx < 0xFF && "Idx out of range");
- OpMap[Op] = std::make_pair(OpIdx, PrintMethodIdx);
+ OpMap[Op] = std::pair(OpIdx, PrintMethodIdx);
}
unsigned getNumMIOps() { return NumMIOps; }
@@ -753,7 +752,7 @@ class IAPrinter {
Next = I;
}
- return std::make_pair(StringRef(Start, I - Start), Next);
+ return std::pair(StringRef(Start, I - Start), Next);
}
std::string formatAliasString(uint32_t &UnescapedSize) {
@@ -858,7 +857,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
const DagInit *DI = R->getValueAsDag("ResultInst");
AliasMap[getQualifiedName(DI->getOperatorAsDef(R->getLoc()))].insert(
- std::make_pair(CodeGenInstAlias(R, Target), Priority));
+ std::pair(CodeGenInstAlias(R, Target), Priority));
}
// A map of which conditions need to be met for each instruction operand
diff --git a/llvm/utils/TableGen/CTagsEmitter.cpp b/llvm/utils/TableGen/CTagsEmitter.cpp
index bda18936dc771d..e21dc36a6e959a 100644
--- a/llvm/utils/TableGen/CTagsEmitter.cpp
+++ b/llvm/utils/TableGen/CTagsEmitter.cpp
@@ -40,8 +40,8 @@ class Tag {
Line = LineAndColumn.first;
}
int operator<(const Tag &B) const {
- return std::make_tuple(Id, BufferIdentifier, Line) <
- std::make_tuple(B.Id, B.BufferIdentifier, B.Line);
+ return std::tuple(Id, BufferIdentifier, Line) <
+ std::tuple(B.Id, B.BufferIdentifier, B.Line);
}
void emit(raw_ostream &OS) const {
OS << Id << "\t" << BufferIdentifier << "\t" << Line << "\n";
diff --git a/llvm/utils/TableGen/CodeEmitterGen.cpp b/llvm/utils/TableGen/CodeEmitterGen.cpp
index d7020d1d78b0aa..d80761d5fe35d2 100644
--- a/llvm/utils/TableGen/CodeEmitterGen.cpp
+++ b/llvm/utils/TableGen/CodeEmitterGen.cpp
@@ -300,11 +300,11 @@ CodeEmitterGen::getInstructionCases(Record *R, CodeGenTarget &Target) {
append(" }\n");
}
append(" }\n");
- return std::make_pair(std::move(Case), std::move(BitOffsetCase));
+ return std::pair(std::move(Case), std::move(BitOffsetCase));
}
}
addInstructionCasesForEncoding(R, R, Target, Case, BitOffsetCase);
- return std::make_pair(std::move(Case), std::move(BitOffsetCase));
+ return std::pair(std::move(Case), std::move(BitOffsetCase));
}
void CodeEmitterGen::addInstructionCasesForEncoding(
diff --git a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
index a9046e09a62976..ca6aa4b251e9b2 100644
--- a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
+++ b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
@@ -530,24 +530,24 @@ bool TypeInfer::EnforceSmallerThan(TypeSetByHwMode &Small, TypeSetByHwMode &Big,
auto LT = [](MVT A, MVT B) -> bool {
// Always treat non-scalable MVTs as smaller than scalable MVTs for the
// purposes of ordering.
- auto ASize = std::make_tuple(A.isScalableVector(), A.getScalarSizeInBits(),
- A.getSizeInBits().getKnownMinValue());
- auto BSize = std::make_tuple(B.isScalableVector(), B.getScalarSizeInBits(),
- B.getSizeInBits().getKnownMinValue());
+ auto ASize = std::tuple(A.isScalableVector(), A.getScalarSizeInBits(),
+ A.getSizeInBits().getKnownMinValue());
+ auto BSize = std::tuple(B.isScalableVector(), B.getScalarSizeInBits(),
+ B.getSizeInBits().getKnownMinValue());
return ASize < BSize;
};
auto SameKindLE = [](MVT A, MVT B) -> bool {
// This function is used when removing elements: when a vector is compared
// to a non-vector or a scalable vector to any non-scalable MVT, it should
// return false (to avoid removal).
- if (std::make_tuple(A.isVector(), A.isScalableVector()) !=
- std::make_tuple(B.isVector(), B.isScalableVector()))
+ if (std::tuple(A.isVector(), A.isScalableVector()) !=
+ std::tuple(B.isVector(), B.isScalableVector()))
return false;
- return std::make_tuple(A.getScalarSizeInBits(),
- A.getSizeInBits().getKnownMinValue()) <=
- std::make_tuple(B.getScalarSizeInBits(),
- B.getSizeInBits().getKnownMinValue());
+ return std::tuple(A.getScalarSizeInBits(),
+ A.getSizeInBits().getKnownMinValue()) <=
+ std::tuple(B.getScalarSizeInBits(),
+ B.getSizeInBits().getKnownMinValue());
};
for (unsigned M : Modes) {
@@ -751,8 +751,8 @@ bool TypeInfer::EnforceSameNumElts(TypeSetByHwMode &V, TypeSetByHwMode &W) {
namespace {
struct TypeSizeComparator {
bool operator()(const TypeSize &LHS, const TypeSize &RHS) const {
- return std::make_tuple(LHS.isScalable(), LHS.getKnownMinValue()) <
- std::make_tuple(RHS.isScalable(), RHS.getKnownMinValue());
+ return std::tuple(LHS.isScalable(), LHS.getKnownMinValue()) <
+ std::tuple(RHS.isScalable(), RHS.getKnownMinValue());
}
};
} // end anonymous namespace
@@ -2988,7 +2988,7 @@ TreePatternNodePtr TreePattern::ParseTreePattern(Init *TheInit,
// Check that the ComplexPattern uses are consistent: "(MY_PAT $a, $b)"
// and "(MY_PAT $b, $a)" should not be allowed in the same pattern;
// neither should "(MY_PAT_1 $a, $b)" and "(MY_PAT_2 $a, $b)".
- auto OperandId = std::make_pair(Operator, i);
+ auto OperandId = std::pair(Operator, i);
auto PrevOp = ComplexPatternOperands.find(Child->getName());
if (PrevOp != ComplexPatternOperands.end()) {
if (PrevOp->getValue() != OperandId)
@@ -3197,7 +3197,7 @@ void CodeGenDAGPatterns::ParseNodeInfo() {
while (!Nodes.empty()) {
Record *R = Nodes.back();
- SDNodes.insert(std::make_pair(R, SDNodeInfo(R, CGH)));
+ SDNodes.insert(std::pair(R, SDNodeInfo(R, CGH)));
Nodes.pop_back();
}
@@ -3217,7 +3217,7 @@ void CodeGenDAGPatterns::ParseNodeTransforms() {
Record *SDNode = XFormNode->getValueAsDef("Opcode");
StringRef Code = XFormNode->getValueAsString("XFormFunction");
SDNodeXForms.insert(
- std::make_pair(XFormNode, NodeXForm(SDNode, std::string(Code))));
+ std::pair(XFormNode, NodeXForm(SDNode, std::string(Code))));
Xforms.pop_back();
}
@@ -3227,7 +3227,7 @@ void CodeGenDAGPatterns::ParseComplexPatterns() {
std::vector<Record *> AMs =
Records.getAllDerivedDefinitions("ComplexPattern");
while (!AMs.empty()) {
- ComplexPatterns.insert(std::make_pair(AMs.back(), AMs.back()));
+ ComplexPatterns.insert(std::pair(AMs.back(), AMs.back()));
AMs.pop_back();
}
}
@@ -3340,7 +3340,7 @@ void CodeGenDAGPatterns::ParseDefaultOperands() {
std::vector<std::pair<Init *, StringInit *>> Ops;
for (unsigned op = 0, e = DefaultInfo->getNumArgs(); op != e; ++op)
Ops.push_back(
- std::make_pair(DefaultInfo->getArg(op), DefaultInfo->getArgName(op)));
+ std::pair(DefaultInfo->getArg(op), DefaultInfo->getArgName(op)));
DagInit *DI = DagInit::get(SomeSDNode, nullptr, Ops);
// Create a TreePattern to parse this.
diff --git a/llvm/utils/TableGen/CodeGenHwModes.cpp b/llvm/utils/TableGen/CodeGenHwModes.cpp
index 7c08c7516054ec..fec74d29c8bbbd 100644
--- a/llvm/utils/TableGen/CodeGenHwModes.cpp
+++ b/llvm/utils/TableGen/CodeGenHwModes.cpp
@@ -52,7 +52,7 @@ HwModeSelect::HwModeSelect(Record *R, CodeGenHwModes &CGH) {
}
for (unsigned i = 0, e = Modes.size(); i != e; ++i) {
unsigned ModeId = CGH.getHwModeId(Modes[i]);
- Items.push_back(std::make_pair(ModeId, Objects[i]));
+ Items.push_back(std::pair(ModeId, Objects[i]));
}
}
@@ -71,11 +71,11 @@ CodeGenHwModes::CodeGenHwModes(RecordKeeper &RK) : Records(RK) {
if (R->getName() == DefaultModeName)
continue;
Modes.emplace_back(R);
- ModeIds.insert(std::make_pair(R, Modes.size()));
+ ModeIds.insert(std::pair(R, Modes.size()));
}
for (Record *R : Records.getAllDerivedDefinitions("HwModeSelect")) {
- auto P = ModeSelects.emplace(std::make_pair(R, HwModeSelect(R, *this)));
+ auto P = ModeSelects.emplace(std::pair(R, HwModeSelect(R, *this)));
assert(P.second);
(void)P;
}
diff --git a/llvm/utils/TableGen/CodeGenInstAlias.cpp b/llvm/utils/TableGen/CodeGenInstAlias.cpp
index 8634d45eafc707..d217059542b1ad 100644
--- a/llvm/utils/TableGen/CodeGenInstAlias.cpp
+++ b/llvm/utils/TableGen/CodeGenInstAlias.cpp
@@ -227,7 +227,7 @@ CodeGenInstAlias::CodeGenInstAlias(Record *R, CodeGenTarget &T) : TheDef(R) {
InstOpRec->getValueAsDef("ParserMatchClass")
->getValueAsString("Name") != "Imm")) {
ResultOperands.push_back(ResOp);
- ResultInstOperandIndex.push_back(std::make_pair(i, -1));
+ ResultInstOperandIndex.push_back(std::pair(i, -1));
++AliasOpNo;
// Otherwise, we need to match each of the suboperands individually.
@@ -242,7 +242,7 @@ CodeGenInstAlias::CodeGenInstAlias(Record *R, CodeGenTarget &T) : TheDef(R) {
Result->getArgName(AliasOpNo)->getAsUnquotedString() + "." +
MIOI->getArgName(SubOp)->getAsUnquotedString(),
SubRec);
- ResultInstOperandIndex.push_back(std::make_pair(i, SubOp));
+ ResultInstOperandIndex.push_back(std::pair(i, SubOp));
}
++AliasOpNo;
}
@@ -260,7 +260,7 @@ CodeGenInstAlias::CodeGenInstAlias(Record *R, CodeGenTarget &T) : TheDef(R) {
if (tryAliasOpMatch(Result, AliasOpNo, SubRec, false, R->getLoc(), T,
ResOp)) {
ResultOperands.push_back(ResOp);
- ResultInstOperandIndex.push_back(std::make_pair(i, SubOp));
+ ResultInstOperandIndex.push_back(std::pair(i, SubOp));
++AliasOpNo;
} else {
PrintFatalError(
diff --git a/llvm/utils/TableGen/CodeGenInstruction.cpp b/llvm/utils/TableGen/CodeGenInstruction.cpp
index a569194ef23cbc..b00b95da5fc276 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.cpp
+++ b/llvm/utils/TableGen/CodeGenInstruction.cpp
@@ -175,7 +175,7 @@ CGIOperandList::CGIOperandList(Record *R) : TheDef(R) {
}
OpInfo.SubOpNames[j] = SubArgName;
- SubOpAliases[SubArgName] = std::make_pair(i, j);
+ SubOpAliases[SubArgName] = std::pair(i, j);
}
} else if (!EncoderMethod.empty()) {
// If we have no explicit sub-op dag, but have an top-level encoder
@@ -276,7 +276,7 @@ CGIOperandList::ParseOperandName(StringRef Op, bool AllowWholeOp) {
Op + "'");
// Otherwise, return the operand.
- return std::make_pair(OpIdx, 0U);
+ return std::pair(OpIdx, 0U);
}
// Find the suboperand number involved.
@@ -289,13 +289,13 @@ CGIOperandList::ParseOperandName(StringRef Op, bool AllowWholeOp) {
// Find the operand with the right name.
for (unsigned i = 0, e = MIOpInfo->getNumArgs(); i != e; ++i)
if (MIOpInfo->getArgNameStr(i) == SubOpName)
- return std::make_pair(OpIdx, i);
+ return std::pair(OpIdx, i);
// Otherwise, didn't find it!
PrintFatalError(TheDef->getLoc(), TheDef->getName() +
": unknown suboperand name in '" + Op +
"'");
- return std::make_pair(0U, 0U);
+ return std::pair(0U, 0U);
}
static void ParseConstraint(StringRef CStr, CGIOperandList &Ops, Record *Rec) {
diff --git a/llvm/utils/TableGen/CodeGenInstruction.h b/llvm/utils/TableGen/CodeGenInstruction.h
index ca7b1e9f7f4a4f..11a3acd8e72335 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.h
+++ b/llvm/utils/TableGen/CodeGenInstruction.h
@@ -205,7 +205,7 @@ class CGIOperandList {
for (unsigned i = 0;; ++i) {
assert(i < OperandList.size() && "Invalid flat operand #");
if (OperandList[i].MIOperandNo + OperandList[i].MINumOperands > Op)
- return std::make_pair(i, Op - OperandList[i].MIOperandNo);
+ return std::pair(i, Op - OperandList[i].MIOperandNo);
}
}
diff --git a/llvm/utils/TableGen/CodeGenRegisters.cpp b/llvm/utils/TableGen/CodeGenRegisters.cpp
index 7d266c8896d8e3..5890f0f40e4059 100644
--- a/llvm/utils/TableGen/CodeGenRegisters.cpp
+++ b/llvm/utils/TableGen/CodeGenRegisters.cpp
@@ -281,13 +281,13 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) {
CodeGenSubRegIndex *Idx = ExplicitSubRegIndices[i];
if (!SR->Artificial)
Idx->Artificial = false;
- if (!SubRegs.insert(std::make_pair(Idx, SR)).second)
+ if (!SubRegs.insert(std::pair(Idx, SR)).second)
PrintFatalError(TheDef->getLoc(), "SubRegIndex " + Idx->getName() +
" appears twice in Register " +
getName());
// Map explicit sub-registers first, so the names take precedence.
// The inherited sub-registers are mapped below.
- SubReg2Idx.insert(std::make_pair(SR, Idx));
+ SubReg2Idx.insert(std::pair(SR, Idx));
}
// Keep track of inherited subregs and how they can be reached.
@@ -327,7 +327,7 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) {
if (SubRegs.count(Comp.second) || !Orphans.erase(SRI->second))
continue;
// We found a new name for the orphaned sub-register.
- SubRegs.insert(std::make_pair(Comp.second, SRI->second));
+ SubRegs.insert(std::pair(Comp.second, SRI->second));
Indices.push_back(Comp.second);
}
}
@@ -374,7 +374,7 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) {
// Ensure that every sub-register has a unique name.
DenseMap<const CodeGenRegister *, CodeGenSubRegIndex *>::iterator Ins =
- SubReg2Idx.insert(std::make_pair(SubReg.second, SubReg.first)).first;
+ SubReg2Idx.insert(std::pair(SubReg.second, SubReg.first)).first;
if (Ins->second == SubReg.first)
continue;
// Trouble: Two different names for SubReg.second.
@@ -520,7 +520,7 @@ void CodeGenRegister::computeSecondarySubRegs(CodeGenRegBank &RegBank) {
// a sub-register with a concatenated sub-register index.
CodeGenSubRegIndex *Concat = RegBank.getConcatSubRegIndex(Parts);
std::pair<CodeGenSubRegIndex *, CodeGenRegister *> NewSubReg =
- std::make_pair(Concat, Cand);
+ std::pair(Concat, Cand);
if (!SubRegs.insert(NewSubReg).second)
continue;
@@ -528,7 +528,7 @@ void CodeGenRegister::computeSecondarySubRegs(CodeGenRegBank &RegBank) {
// We inserted a new subregister.
NewSubRegs.push_back(NewSubReg);
SubRegQueue.push(NewSubReg);
- SubReg2Idx.insert(std::make_pair(Cand, Concat));
+ SubReg2Idx.insert(std::pair(Cand, Concat));
}
}
@@ -1074,7 +1074,7 @@ CodeGenRegisterClass::getMatchingSubClassWithSubRegs(
...
[truncated]
|
|
@llvm/pr-subscribers-backend-x86 Author: Jay Foad (jayfoad) ChangesThese are unnecessary since C++17. Patch is 51.04 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/81730.diff 34 Files Affected:
diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
index 2c2c39a3ef54ff..3fcf2d87cc36ae 100644
--- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
@@ -1277,7 +1277,7 @@ void AsmMatcherInfo::buildRegisterClasses(
if (!ContainingSet.empty()) {
RegisterSets.insert(ContainingSet);
- RegisterMap.insert(std::make_pair(CGR.TheDef, ContainingSet));
+ RegisterMap.insert(std::pair(CGR.TheDef, ContainingSet));
}
}
@@ -1298,7 +1298,7 @@ void AsmMatcherInfo::buildRegisterClasses(
CI->DiagnosticType = "";
CI->IsOptional = false;
CI->DefaultMethod = ""; // unused
- RegisterSetClasses.insert(std::make_pair(RS, CI));
+ RegisterSetClasses.insert(std::pair(RS, CI));
++Index;
}
@@ -1340,7 +1340,7 @@ void AsmMatcherInfo::buildRegisterClasses(
if (!CI->DiagnosticString.empty() && CI->DiagnosticType.empty())
CI->DiagnosticType = RC.getName();
- RegisterClassClasses.insert(std::make_pair(Def, CI));
+ RegisterClassClasses.insert(std::pair(Def, CI));
}
// Populate the map for individual registers.
@@ -2193,7 +2193,7 @@ emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
ConversionRow.push_back(SrcOp2);
// Also create an 'enum' for this combination of tied operands.
- auto Key = std::make_tuple(TiedOp, SrcOp1, SrcOp2);
+ auto Key = std::tuple(TiedOp, SrcOp1, SrcOp2);
TiedOperandsEnumMap.emplace(Key, TiedTupleName);
break;
}
@@ -2342,9 +2342,9 @@ emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
// For a tied operand, emit a reference to the TiedAsmOperandTable
// that contains the operand to copy, and the parsed operands to
// check for their tied constraints.
- auto Key = std::make_tuple((uint8_t)ConversionTable[Row][i + 1],
- (uint8_t)ConversionTable[Row][i + 2],
- (uint8_t)ConversionTable[Row][i + 3]);
+ auto Key = std::tuple((uint8_t)ConversionTable[Row][i + 1],
+ (uint8_t)ConversionTable[Row][i + 2],
+ (uint8_t)ConversionTable[Row][i + 3]);
auto TiedOpndEnum = TiedOperandsEnumMap.find(Key);
assert(TiedOpndEnum != TiedOperandsEnumMap.end() &&
"No record for tied operand pair");
@@ -2812,7 +2812,7 @@ emitMnemonicAliasVariant(raw_ostream &OS, const AsmMatcherInfo &Info,
MatchCode += "return;";
- Cases.push_back(std::make_pair(AliasEntry.first, MatchCode));
+ Cases.push_back(std::pair(AliasEntry.first, MatchCode));
}
StringMatcher("Mnemonic", Cases, OS).Emit(Indent);
}
@@ -2979,7 +2979,7 @@ emitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target,
"std::end(OperandMatchTable),\n";
OS << " Mnemonic, LessOpcodeOperand());\n\n";
} else {
- OS << " auto MnemonicRange = std::make_pair(std::begin(OperandMatchTable),"
+ OS << " auto MnemonicRange = std::pair(std::begin(OperandMatchTable),"
" std::end(OperandMatchTable));\n";
OS << " if (!Mnemonic.empty())\n";
OS << " MnemonicRange =\n";
@@ -3154,7 +3154,7 @@ static void emitMnemonicChecker(raw_ostream &OS, CodeGenTarget &Target,
OS << " auto MnemonicRange = "
"std::equal_range(Start, End, Mnemonic, LessOpcode());\n\n";
} else {
- OS << " auto MnemonicRange = std::make_pair(Start, End);\n";
+ OS << " auto MnemonicRange = std::pair(Start, End);\n";
OS << " unsigned SIndex = Mnemonic.empty() ? 0 : 1;\n";
OS << " if (!Mnemonic.empty())\n";
OS << " MnemonicRange = "
@@ -3629,7 +3629,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
OS << " auto MnemonicRange = "
"std::equal_range(Start, End, Mnemonic, LessOpcode());\n\n";
} else {
- OS << " auto MnemonicRange = std::make_pair(Start, End);\n";
+ OS << " auto MnemonicRange = std::pair(Start, End);\n";
OS << " unsigned SIndex = Mnemonic.empty() ? 0 : 1;\n";
OS << " if (!Mnemonic.empty())\n";
OS << " MnemonicRange = "
diff --git a/llvm/utils/TableGen/AsmWriterEmitter.cpp b/llvm/utils/TableGen/AsmWriterEmitter.cpp
index c05991fdbb1667..a27061ee585a59 100644
--- a/llvm/utils/TableGen/AsmWriterEmitter.cpp
+++ b/llvm/utils/TableGen/AsmWriterEmitter.cpp
@@ -144,13 +144,12 @@ static void EmitInstructions(std::vector<AsmWriterInst> &Insts, raw_ostream &O,
O << " switch (MI->getOpcode()) {\n";
O << " default: llvm_unreachable(\"Unexpected opcode.\");\n";
std::vector<std::pair<std::string, AsmWriterOperand>> OpsToPrint;
- OpsToPrint.push_back(
- std::make_pair(FirstInst.CGI->Namespace.str() +
- "::" + FirstInst.CGI->TheDef->getName().str(),
- FirstInst.Operands[i]));
+ OpsToPrint.push_back(std::pair(FirstInst.CGI->Namespace.str() + "::" +
+ FirstInst.CGI->TheDef->getName().str(),
+ FirstInst.Operands[i]));
for (const AsmWriterInst &AWI : SimilarInsts) {
- OpsToPrint.push_back(std::make_pair(
+ OpsToPrint.push_back(std::pair(
AWI.CGI->Namespace.str() + "::" + AWI.CGI->TheDef->getName().str(),
AWI.Operands[i]));
}
@@ -722,7 +721,7 @@ class IAPrinter {
void addOperand(StringRef Op, int OpIdx, int PrintMethodIdx = -1) {
assert(OpIdx >= 0 && OpIdx < 0xFE && "Idx out of range");
assert(PrintMethodIdx >= -1 && PrintMethodIdx < 0xFF && "Idx out of range");
- OpMap[Op] = std::make_pair(OpIdx, PrintMethodIdx);
+ OpMap[Op] = std::pair(OpIdx, PrintMethodIdx);
}
unsigned getNumMIOps() { return NumMIOps; }
@@ -753,7 +752,7 @@ class IAPrinter {
Next = I;
}
- return std::make_pair(StringRef(Start, I - Start), Next);
+ return std::pair(StringRef(Start, I - Start), Next);
}
std::string formatAliasString(uint32_t &UnescapedSize) {
@@ -858,7 +857,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
const DagInit *DI = R->getValueAsDag("ResultInst");
AliasMap[getQualifiedName(DI->getOperatorAsDef(R->getLoc()))].insert(
- std::make_pair(CodeGenInstAlias(R, Target), Priority));
+ std::pair(CodeGenInstAlias(R, Target), Priority));
}
// A map of which conditions need to be met for each instruction operand
diff --git a/llvm/utils/TableGen/CTagsEmitter.cpp b/llvm/utils/TableGen/CTagsEmitter.cpp
index bda18936dc771d..e21dc36a6e959a 100644
--- a/llvm/utils/TableGen/CTagsEmitter.cpp
+++ b/llvm/utils/TableGen/CTagsEmitter.cpp
@@ -40,8 +40,8 @@ class Tag {
Line = LineAndColumn.first;
}
int operator<(const Tag &B) const {
- return std::make_tuple(Id, BufferIdentifier, Line) <
- std::make_tuple(B.Id, B.BufferIdentifier, B.Line);
+ return std::tuple(Id, BufferIdentifier, Line) <
+ std::tuple(B.Id, B.BufferIdentifier, B.Line);
}
void emit(raw_ostream &OS) const {
OS << Id << "\t" << BufferIdentifier << "\t" << Line << "\n";
diff --git a/llvm/utils/TableGen/CodeEmitterGen.cpp b/llvm/utils/TableGen/CodeEmitterGen.cpp
index d7020d1d78b0aa..d80761d5fe35d2 100644
--- a/llvm/utils/TableGen/CodeEmitterGen.cpp
+++ b/llvm/utils/TableGen/CodeEmitterGen.cpp
@@ -300,11 +300,11 @@ CodeEmitterGen::getInstructionCases(Record *R, CodeGenTarget &Target) {
append(" }\n");
}
append(" }\n");
- return std::make_pair(std::move(Case), std::move(BitOffsetCase));
+ return std::pair(std::move(Case), std::move(BitOffsetCase));
}
}
addInstructionCasesForEncoding(R, R, Target, Case, BitOffsetCase);
- return std::make_pair(std::move(Case), std::move(BitOffsetCase));
+ return std::pair(std::move(Case), std::move(BitOffsetCase));
}
void CodeEmitterGen::addInstructionCasesForEncoding(
diff --git a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
index a9046e09a62976..ca6aa4b251e9b2 100644
--- a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
+++ b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
@@ -530,24 +530,24 @@ bool TypeInfer::EnforceSmallerThan(TypeSetByHwMode &Small, TypeSetByHwMode &Big,
auto LT = [](MVT A, MVT B) -> bool {
// Always treat non-scalable MVTs as smaller than scalable MVTs for the
// purposes of ordering.
- auto ASize = std::make_tuple(A.isScalableVector(), A.getScalarSizeInBits(),
- A.getSizeInBits().getKnownMinValue());
- auto BSize = std::make_tuple(B.isScalableVector(), B.getScalarSizeInBits(),
- B.getSizeInBits().getKnownMinValue());
+ auto ASize = std::tuple(A.isScalableVector(), A.getScalarSizeInBits(),
+ A.getSizeInBits().getKnownMinValue());
+ auto BSize = std::tuple(B.isScalableVector(), B.getScalarSizeInBits(),
+ B.getSizeInBits().getKnownMinValue());
return ASize < BSize;
};
auto SameKindLE = [](MVT A, MVT B) -> bool {
// This function is used when removing elements: when a vector is compared
// to a non-vector or a scalable vector to any non-scalable MVT, it should
// return false (to avoid removal).
- if (std::make_tuple(A.isVector(), A.isScalableVector()) !=
- std::make_tuple(B.isVector(), B.isScalableVector()))
+ if (std::tuple(A.isVector(), A.isScalableVector()) !=
+ std::tuple(B.isVector(), B.isScalableVector()))
return false;
- return std::make_tuple(A.getScalarSizeInBits(),
- A.getSizeInBits().getKnownMinValue()) <=
- std::make_tuple(B.getScalarSizeInBits(),
- B.getSizeInBits().getKnownMinValue());
+ return std::tuple(A.getScalarSizeInBits(),
+ A.getSizeInBits().getKnownMinValue()) <=
+ std::tuple(B.getScalarSizeInBits(),
+ B.getSizeInBits().getKnownMinValue());
};
for (unsigned M : Modes) {
@@ -751,8 +751,8 @@ bool TypeInfer::EnforceSameNumElts(TypeSetByHwMode &V, TypeSetByHwMode &W) {
namespace {
struct TypeSizeComparator {
bool operator()(const TypeSize &LHS, const TypeSize &RHS) const {
- return std::make_tuple(LHS.isScalable(), LHS.getKnownMinValue()) <
- std::make_tuple(RHS.isScalable(), RHS.getKnownMinValue());
+ return std::tuple(LHS.isScalable(), LHS.getKnownMinValue()) <
+ std::tuple(RHS.isScalable(), RHS.getKnownMinValue());
}
};
} // end anonymous namespace
@@ -2988,7 +2988,7 @@ TreePatternNodePtr TreePattern::ParseTreePattern(Init *TheInit,
// Check that the ComplexPattern uses are consistent: "(MY_PAT $a, $b)"
// and "(MY_PAT $b, $a)" should not be allowed in the same pattern;
// neither should "(MY_PAT_1 $a, $b)" and "(MY_PAT_2 $a, $b)".
- auto OperandId = std::make_pair(Operator, i);
+ auto OperandId = std::pair(Operator, i);
auto PrevOp = ComplexPatternOperands.find(Child->getName());
if (PrevOp != ComplexPatternOperands.end()) {
if (PrevOp->getValue() != OperandId)
@@ -3197,7 +3197,7 @@ void CodeGenDAGPatterns::ParseNodeInfo() {
while (!Nodes.empty()) {
Record *R = Nodes.back();
- SDNodes.insert(std::make_pair(R, SDNodeInfo(R, CGH)));
+ SDNodes.insert(std::pair(R, SDNodeInfo(R, CGH)));
Nodes.pop_back();
}
@@ -3217,7 +3217,7 @@ void CodeGenDAGPatterns::ParseNodeTransforms() {
Record *SDNode = XFormNode->getValueAsDef("Opcode");
StringRef Code = XFormNode->getValueAsString("XFormFunction");
SDNodeXForms.insert(
- std::make_pair(XFormNode, NodeXForm(SDNode, std::string(Code))));
+ std::pair(XFormNode, NodeXForm(SDNode, std::string(Code))));
Xforms.pop_back();
}
@@ -3227,7 +3227,7 @@ void CodeGenDAGPatterns::ParseComplexPatterns() {
std::vector<Record *> AMs =
Records.getAllDerivedDefinitions("ComplexPattern");
while (!AMs.empty()) {
- ComplexPatterns.insert(std::make_pair(AMs.back(), AMs.back()));
+ ComplexPatterns.insert(std::pair(AMs.back(), AMs.back()));
AMs.pop_back();
}
}
@@ -3340,7 +3340,7 @@ void CodeGenDAGPatterns::ParseDefaultOperands() {
std::vector<std::pair<Init *, StringInit *>> Ops;
for (unsigned op = 0, e = DefaultInfo->getNumArgs(); op != e; ++op)
Ops.push_back(
- std::make_pair(DefaultInfo->getArg(op), DefaultInfo->getArgName(op)));
+ std::pair(DefaultInfo->getArg(op), DefaultInfo->getArgName(op)));
DagInit *DI = DagInit::get(SomeSDNode, nullptr, Ops);
// Create a TreePattern to parse this.
diff --git a/llvm/utils/TableGen/CodeGenHwModes.cpp b/llvm/utils/TableGen/CodeGenHwModes.cpp
index 7c08c7516054ec..fec74d29c8bbbd 100644
--- a/llvm/utils/TableGen/CodeGenHwModes.cpp
+++ b/llvm/utils/TableGen/CodeGenHwModes.cpp
@@ -52,7 +52,7 @@ HwModeSelect::HwModeSelect(Record *R, CodeGenHwModes &CGH) {
}
for (unsigned i = 0, e = Modes.size(); i != e; ++i) {
unsigned ModeId = CGH.getHwModeId(Modes[i]);
- Items.push_back(std::make_pair(ModeId, Objects[i]));
+ Items.push_back(std::pair(ModeId, Objects[i]));
}
}
@@ -71,11 +71,11 @@ CodeGenHwModes::CodeGenHwModes(RecordKeeper &RK) : Records(RK) {
if (R->getName() == DefaultModeName)
continue;
Modes.emplace_back(R);
- ModeIds.insert(std::make_pair(R, Modes.size()));
+ ModeIds.insert(std::pair(R, Modes.size()));
}
for (Record *R : Records.getAllDerivedDefinitions("HwModeSelect")) {
- auto P = ModeSelects.emplace(std::make_pair(R, HwModeSelect(R, *this)));
+ auto P = ModeSelects.emplace(std::pair(R, HwModeSelect(R, *this)));
assert(P.second);
(void)P;
}
diff --git a/llvm/utils/TableGen/CodeGenInstAlias.cpp b/llvm/utils/TableGen/CodeGenInstAlias.cpp
index 8634d45eafc707..d217059542b1ad 100644
--- a/llvm/utils/TableGen/CodeGenInstAlias.cpp
+++ b/llvm/utils/TableGen/CodeGenInstAlias.cpp
@@ -227,7 +227,7 @@ CodeGenInstAlias::CodeGenInstAlias(Record *R, CodeGenTarget &T) : TheDef(R) {
InstOpRec->getValueAsDef("ParserMatchClass")
->getValueAsString("Name") != "Imm")) {
ResultOperands.push_back(ResOp);
- ResultInstOperandIndex.push_back(std::make_pair(i, -1));
+ ResultInstOperandIndex.push_back(std::pair(i, -1));
++AliasOpNo;
// Otherwise, we need to match each of the suboperands individually.
@@ -242,7 +242,7 @@ CodeGenInstAlias::CodeGenInstAlias(Record *R, CodeGenTarget &T) : TheDef(R) {
Result->getArgName(AliasOpNo)->getAsUnquotedString() + "." +
MIOI->getArgName(SubOp)->getAsUnquotedString(),
SubRec);
- ResultInstOperandIndex.push_back(std::make_pair(i, SubOp));
+ ResultInstOperandIndex.push_back(std::pair(i, SubOp));
}
++AliasOpNo;
}
@@ -260,7 +260,7 @@ CodeGenInstAlias::CodeGenInstAlias(Record *R, CodeGenTarget &T) : TheDef(R) {
if (tryAliasOpMatch(Result, AliasOpNo, SubRec, false, R->getLoc(), T,
ResOp)) {
ResultOperands.push_back(ResOp);
- ResultInstOperandIndex.push_back(std::make_pair(i, SubOp));
+ ResultInstOperandIndex.push_back(std::pair(i, SubOp));
++AliasOpNo;
} else {
PrintFatalError(
diff --git a/llvm/utils/TableGen/CodeGenInstruction.cpp b/llvm/utils/TableGen/CodeGenInstruction.cpp
index a569194ef23cbc..b00b95da5fc276 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.cpp
+++ b/llvm/utils/TableGen/CodeGenInstruction.cpp
@@ -175,7 +175,7 @@ CGIOperandList::CGIOperandList(Record *R) : TheDef(R) {
}
OpInfo.SubOpNames[j] = SubArgName;
- SubOpAliases[SubArgName] = std::make_pair(i, j);
+ SubOpAliases[SubArgName] = std::pair(i, j);
}
} else if (!EncoderMethod.empty()) {
// If we have no explicit sub-op dag, but have an top-level encoder
@@ -276,7 +276,7 @@ CGIOperandList::ParseOperandName(StringRef Op, bool AllowWholeOp) {
Op + "'");
// Otherwise, return the operand.
- return std::make_pair(OpIdx, 0U);
+ return std::pair(OpIdx, 0U);
}
// Find the suboperand number involved.
@@ -289,13 +289,13 @@ CGIOperandList::ParseOperandName(StringRef Op, bool AllowWholeOp) {
// Find the operand with the right name.
for (unsigned i = 0, e = MIOpInfo->getNumArgs(); i != e; ++i)
if (MIOpInfo->getArgNameStr(i) == SubOpName)
- return std::make_pair(OpIdx, i);
+ return std::pair(OpIdx, i);
// Otherwise, didn't find it!
PrintFatalError(TheDef->getLoc(), TheDef->getName() +
": unknown suboperand name in '" + Op +
"'");
- return std::make_pair(0U, 0U);
+ return std::pair(0U, 0U);
}
static void ParseConstraint(StringRef CStr, CGIOperandList &Ops, Record *Rec) {
diff --git a/llvm/utils/TableGen/CodeGenInstruction.h b/llvm/utils/TableGen/CodeGenInstruction.h
index ca7b1e9f7f4a4f..11a3acd8e72335 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.h
+++ b/llvm/utils/TableGen/CodeGenInstruction.h
@@ -205,7 +205,7 @@ class CGIOperandList {
for (unsigned i = 0;; ++i) {
assert(i < OperandList.size() && "Invalid flat operand #");
if (OperandList[i].MIOperandNo + OperandList[i].MINumOperands > Op)
- return std::make_pair(i, Op - OperandList[i].MIOperandNo);
+ return std::pair(i, Op - OperandList[i].MIOperandNo);
}
}
diff --git a/llvm/utils/TableGen/CodeGenRegisters.cpp b/llvm/utils/TableGen/CodeGenRegisters.cpp
index 7d266c8896d8e3..5890f0f40e4059 100644
--- a/llvm/utils/TableGen/CodeGenRegisters.cpp
+++ b/llvm/utils/TableGen/CodeGenRegisters.cpp
@@ -281,13 +281,13 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) {
CodeGenSubRegIndex *Idx = ExplicitSubRegIndices[i];
if (!SR->Artificial)
Idx->Artificial = false;
- if (!SubRegs.insert(std::make_pair(Idx, SR)).second)
+ if (!SubRegs.insert(std::pair(Idx, SR)).second)
PrintFatalError(TheDef->getLoc(), "SubRegIndex " + Idx->getName() +
" appears twice in Register " +
getName());
// Map explicit sub-registers first, so the names take precedence.
// The inherited sub-registers are mapped below.
- SubReg2Idx.insert(std::make_pair(SR, Idx));
+ SubReg2Idx.insert(std::pair(SR, Idx));
}
// Keep track of inherited subregs and how they can be reached.
@@ -327,7 +327,7 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) {
if (SubRegs.count(Comp.second) || !Orphans.erase(SRI->second))
continue;
// We found a new name for the orphaned sub-register.
- SubRegs.insert(std::make_pair(Comp.second, SRI->second));
+ SubRegs.insert(std::pair(Comp.second, SRI->second));
Indices.push_back(Comp.second);
}
}
@@ -374,7 +374,7 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) {
// Ensure that every sub-register has a unique name.
DenseMap<const CodeGenRegister *, CodeGenSubRegIndex *>::iterator Ins =
- SubReg2Idx.insert(std::make_pair(SubReg.second, SubReg.first)).first;
+ SubReg2Idx.insert(std::pair(SubReg.second, SubReg.first)).first;
if (Ins->second == SubReg.first)
continue;
// Trouble: Two different names for SubReg.second.
@@ -520,7 +520,7 @@ void CodeGenRegister::computeSecondarySubRegs(CodeGenRegBank &RegBank) {
// a sub-register with a concatenated sub-register index.
CodeGenSubRegIndex *Concat = RegBank.getConcatSubRegIndex(Parts);
std::pair<CodeGenSubRegIndex *, CodeGenRegister *> NewSubReg =
- std::make_pair(Concat, Cand);
+ std::pair(Concat, Cand);
if (!SubRegs.insert(NewSubReg).second)
continue;
@@ -528,7 +528,7 @@ void CodeGenRegister::computeSecondarySubRegs(CodeGenRegBank &RegBank) {
// We inserted a new subregister.
NewSubRegs.push_back(NewSubReg);
SubRegQueue.push(NewSubReg);
- SubReg2Idx.insert(std::make_pair(Cand, Concat));
+ SubReg2Idx.insert(std::pair(Cand, Concat));
}
}
@@ -1074,7 +1074,7 @@ CodeGenRegisterClass::getMatchingSubClassWithSubRegs(
...
[truncated]
|
|
@llvm/pr-subscribers-backend-directx Author: Jay Foad (jayfoad) ChangesThese are unnecessary since C++17. Patch is 51.04 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/81730.diff 34 Files Affected:
diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
index 2c2c39a3ef54ff..3fcf2d87cc36ae 100644
--- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
@@ -1277,7 +1277,7 @@ void AsmMatcherInfo::buildRegisterClasses(
if (!ContainingSet.empty()) {
RegisterSets.insert(ContainingSet);
- RegisterMap.insert(std::make_pair(CGR.TheDef, ContainingSet));
+ RegisterMap.insert(std::pair(CGR.TheDef, ContainingSet));
}
}
@@ -1298,7 +1298,7 @@ void AsmMatcherInfo::buildRegisterClasses(
CI->DiagnosticType = "";
CI->IsOptional = false;
CI->DefaultMethod = ""; // unused
- RegisterSetClasses.insert(std::make_pair(RS, CI));
+ RegisterSetClasses.insert(std::pair(RS, CI));
++Index;
}
@@ -1340,7 +1340,7 @@ void AsmMatcherInfo::buildRegisterClasses(
if (!CI->DiagnosticString.empty() && CI->DiagnosticType.empty())
CI->DiagnosticType = RC.getName();
- RegisterClassClasses.insert(std::make_pair(Def, CI));
+ RegisterClassClasses.insert(std::pair(Def, CI));
}
// Populate the map for individual registers.
@@ -2193,7 +2193,7 @@ emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
ConversionRow.push_back(SrcOp2);
// Also create an 'enum' for this combination of tied operands.
- auto Key = std::make_tuple(TiedOp, SrcOp1, SrcOp2);
+ auto Key = std::tuple(TiedOp, SrcOp1, SrcOp2);
TiedOperandsEnumMap.emplace(Key, TiedTupleName);
break;
}
@@ -2342,9 +2342,9 @@ emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
// For a tied operand, emit a reference to the TiedAsmOperandTable
// that contains the operand to copy, and the parsed operands to
// check for their tied constraints.
- auto Key = std::make_tuple((uint8_t)ConversionTable[Row][i + 1],
- (uint8_t)ConversionTable[Row][i + 2],
- (uint8_t)ConversionTable[Row][i + 3]);
+ auto Key = std::tuple((uint8_t)ConversionTable[Row][i + 1],
+ (uint8_t)ConversionTable[Row][i + 2],
+ (uint8_t)ConversionTable[Row][i + 3]);
auto TiedOpndEnum = TiedOperandsEnumMap.find(Key);
assert(TiedOpndEnum != TiedOperandsEnumMap.end() &&
"No record for tied operand pair");
@@ -2812,7 +2812,7 @@ emitMnemonicAliasVariant(raw_ostream &OS, const AsmMatcherInfo &Info,
MatchCode += "return;";
- Cases.push_back(std::make_pair(AliasEntry.first, MatchCode));
+ Cases.push_back(std::pair(AliasEntry.first, MatchCode));
}
StringMatcher("Mnemonic", Cases, OS).Emit(Indent);
}
@@ -2979,7 +2979,7 @@ emitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target,
"std::end(OperandMatchTable),\n";
OS << " Mnemonic, LessOpcodeOperand());\n\n";
} else {
- OS << " auto MnemonicRange = std::make_pair(std::begin(OperandMatchTable),"
+ OS << " auto MnemonicRange = std::pair(std::begin(OperandMatchTable),"
" std::end(OperandMatchTable));\n";
OS << " if (!Mnemonic.empty())\n";
OS << " MnemonicRange =\n";
@@ -3154,7 +3154,7 @@ static void emitMnemonicChecker(raw_ostream &OS, CodeGenTarget &Target,
OS << " auto MnemonicRange = "
"std::equal_range(Start, End, Mnemonic, LessOpcode());\n\n";
} else {
- OS << " auto MnemonicRange = std::make_pair(Start, End);\n";
+ OS << " auto MnemonicRange = std::pair(Start, End);\n";
OS << " unsigned SIndex = Mnemonic.empty() ? 0 : 1;\n";
OS << " if (!Mnemonic.empty())\n";
OS << " MnemonicRange = "
@@ -3629,7 +3629,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
OS << " auto MnemonicRange = "
"std::equal_range(Start, End, Mnemonic, LessOpcode());\n\n";
} else {
- OS << " auto MnemonicRange = std::make_pair(Start, End);\n";
+ OS << " auto MnemonicRange = std::pair(Start, End);\n";
OS << " unsigned SIndex = Mnemonic.empty() ? 0 : 1;\n";
OS << " if (!Mnemonic.empty())\n";
OS << " MnemonicRange = "
diff --git a/llvm/utils/TableGen/AsmWriterEmitter.cpp b/llvm/utils/TableGen/AsmWriterEmitter.cpp
index c05991fdbb1667..a27061ee585a59 100644
--- a/llvm/utils/TableGen/AsmWriterEmitter.cpp
+++ b/llvm/utils/TableGen/AsmWriterEmitter.cpp
@@ -144,13 +144,12 @@ static void EmitInstructions(std::vector<AsmWriterInst> &Insts, raw_ostream &O,
O << " switch (MI->getOpcode()) {\n";
O << " default: llvm_unreachable(\"Unexpected opcode.\");\n";
std::vector<std::pair<std::string, AsmWriterOperand>> OpsToPrint;
- OpsToPrint.push_back(
- std::make_pair(FirstInst.CGI->Namespace.str() +
- "::" + FirstInst.CGI->TheDef->getName().str(),
- FirstInst.Operands[i]));
+ OpsToPrint.push_back(std::pair(FirstInst.CGI->Namespace.str() + "::" +
+ FirstInst.CGI->TheDef->getName().str(),
+ FirstInst.Operands[i]));
for (const AsmWriterInst &AWI : SimilarInsts) {
- OpsToPrint.push_back(std::make_pair(
+ OpsToPrint.push_back(std::pair(
AWI.CGI->Namespace.str() + "::" + AWI.CGI->TheDef->getName().str(),
AWI.Operands[i]));
}
@@ -722,7 +721,7 @@ class IAPrinter {
void addOperand(StringRef Op, int OpIdx, int PrintMethodIdx = -1) {
assert(OpIdx >= 0 && OpIdx < 0xFE && "Idx out of range");
assert(PrintMethodIdx >= -1 && PrintMethodIdx < 0xFF && "Idx out of range");
- OpMap[Op] = std::make_pair(OpIdx, PrintMethodIdx);
+ OpMap[Op] = std::pair(OpIdx, PrintMethodIdx);
}
unsigned getNumMIOps() { return NumMIOps; }
@@ -753,7 +752,7 @@ class IAPrinter {
Next = I;
}
- return std::make_pair(StringRef(Start, I - Start), Next);
+ return std::pair(StringRef(Start, I - Start), Next);
}
std::string formatAliasString(uint32_t &UnescapedSize) {
@@ -858,7 +857,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
const DagInit *DI = R->getValueAsDag("ResultInst");
AliasMap[getQualifiedName(DI->getOperatorAsDef(R->getLoc()))].insert(
- std::make_pair(CodeGenInstAlias(R, Target), Priority));
+ std::pair(CodeGenInstAlias(R, Target), Priority));
}
// A map of which conditions need to be met for each instruction operand
diff --git a/llvm/utils/TableGen/CTagsEmitter.cpp b/llvm/utils/TableGen/CTagsEmitter.cpp
index bda18936dc771d..e21dc36a6e959a 100644
--- a/llvm/utils/TableGen/CTagsEmitter.cpp
+++ b/llvm/utils/TableGen/CTagsEmitter.cpp
@@ -40,8 +40,8 @@ class Tag {
Line = LineAndColumn.first;
}
int operator<(const Tag &B) const {
- return std::make_tuple(Id, BufferIdentifier, Line) <
- std::make_tuple(B.Id, B.BufferIdentifier, B.Line);
+ return std::tuple(Id, BufferIdentifier, Line) <
+ std::tuple(B.Id, B.BufferIdentifier, B.Line);
}
void emit(raw_ostream &OS) const {
OS << Id << "\t" << BufferIdentifier << "\t" << Line << "\n";
diff --git a/llvm/utils/TableGen/CodeEmitterGen.cpp b/llvm/utils/TableGen/CodeEmitterGen.cpp
index d7020d1d78b0aa..d80761d5fe35d2 100644
--- a/llvm/utils/TableGen/CodeEmitterGen.cpp
+++ b/llvm/utils/TableGen/CodeEmitterGen.cpp
@@ -300,11 +300,11 @@ CodeEmitterGen::getInstructionCases(Record *R, CodeGenTarget &Target) {
append(" }\n");
}
append(" }\n");
- return std::make_pair(std::move(Case), std::move(BitOffsetCase));
+ return std::pair(std::move(Case), std::move(BitOffsetCase));
}
}
addInstructionCasesForEncoding(R, R, Target, Case, BitOffsetCase);
- return std::make_pair(std::move(Case), std::move(BitOffsetCase));
+ return std::pair(std::move(Case), std::move(BitOffsetCase));
}
void CodeEmitterGen::addInstructionCasesForEncoding(
diff --git a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
index a9046e09a62976..ca6aa4b251e9b2 100644
--- a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
+++ b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
@@ -530,24 +530,24 @@ bool TypeInfer::EnforceSmallerThan(TypeSetByHwMode &Small, TypeSetByHwMode &Big,
auto LT = [](MVT A, MVT B) -> bool {
// Always treat non-scalable MVTs as smaller than scalable MVTs for the
// purposes of ordering.
- auto ASize = std::make_tuple(A.isScalableVector(), A.getScalarSizeInBits(),
- A.getSizeInBits().getKnownMinValue());
- auto BSize = std::make_tuple(B.isScalableVector(), B.getScalarSizeInBits(),
- B.getSizeInBits().getKnownMinValue());
+ auto ASize = std::tuple(A.isScalableVector(), A.getScalarSizeInBits(),
+ A.getSizeInBits().getKnownMinValue());
+ auto BSize = std::tuple(B.isScalableVector(), B.getScalarSizeInBits(),
+ B.getSizeInBits().getKnownMinValue());
return ASize < BSize;
};
auto SameKindLE = [](MVT A, MVT B) -> bool {
// This function is used when removing elements: when a vector is compared
// to a non-vector or a scalable vector to any non-scalable MVT, it should
// return false (to avoid removal).
- if (std::make_tuple(A.isVector(), A.isScalableVector()) !=
- std::make_tuple(B.isVector(), B.isScalableVector()))
+ if (std::tuple(A.isVector(), A.isScalableVector()) !=
+ std::tuple(B.isVector(), B.isScalableVector()))
return false;
- return std::make_tuple(A.getScalarSizeInBits(),
- A.getSizeInBits().getKnownMinValue()) <=
- std::make_tuple(B.getScalarSizeInBits(),
- B.getSizeInBits().getKnownMinValue());
+ return std::tuple(A.getScalarSizeInBits(),
+ A.getSizeInBits().getKnownMinValue()) <=
+ std::tuple(B.getScalarSizeInBits(),
+ B.getSizeInBits().getKnownMinValue());
};
for (unsigned M : Modes) {
@@ -751,8 +751,8 @@ bool TypeInfer::EnforceSameNumElts(TypeSetByHwMode &V, TypeSetByHwMode &W) {
namespace {
struct TypeSizeComparator {
bool operator()(const TypeSize &LHS, const TypeSize &RHS) const {
- return std::make_tuple(LHS.isScalable(), LHS.getKnownMinValue()) <
- std::make_tuple(RHS.isScalable(), RHS.getKnownMinValue());
+ return std::tuple(LHS.isScalable(), LHS.getKnownMinValue()) <
+ std::tuple(RHS.isScalable(), RHS.getKnownMinValue());
}
};
} // end anonymous namespace
@@ -2988,7 +2988,7 @@ TreePatternNodePtr TreePattern::ParseTreePattern(Init *TheInit,
// Check that the ComplexPattern uses are consistent: "(MY_PAT $a, $b)"
// and "(MY_PAT $b, $a)" should not be allowed in the same pattern;
// neither should "(MY_PAT_1 $a, $b)" and "(MY_PAT_2 $a, $b)".
- auto OperandId = std::make_pair(Operator, i);
+ auto OperandId = std::pair(Operator, i);
auto PrevOp = ComplexPatternOperands.find(Child->getName());
if (PrevOp != ComplexPatternOperands.end()) {
if (PrevOp->getValue() != OperandId)
@@ -3197,7 +3197,7 @@ void CodeGenDAGPatterns::ParseNodeInfo() {
while (!Nodes.empty()) {
Record *R = Nodes.back();
- SDNodes.insert(std::make_pair(R, SDNodeInfo(R, CGH)));
+ SDNodes.insert(std::pair(R, SDNodeInfo(R, CGH)));
Nodes.pop_back();
}
@@ -3217,7 +3217,7 @@ void CodeGenDAGPatterns::ParseNodeTransforms() {
Record *SDNode = XFormNode->getValueAsDef("Opcode");
StringRef Code = XFormNode->getValueAsString("XFormFunction");
SDNodeXForms.insert(
- std::make_pair(XFormNode, NodeXForm(SDNode, std::string(Code))));
+ std::pair(XFormNode, NodeXForm(SDNode, std::string(Code))));
Xforms.pop_back();
}
@@ -3227,7 +3227,7 @@ void CodeGenDAGPatterns::ParseComplexPatterns() {
std::vector<Record *> AMs =
Records.getAllDerivedDefinitions("ComplexPattern");
while (!AMs.empty()) {
- ComplexPatterns.insert(std::make_pair(AMs.back(), AMs.back()));
+ ComplexPatterns.insert(std::pair(AMs.back(), AMs.back()));
AMs.pop_back();
}
}
@@ -3340,7 +3340,7 @@ void CodeGenDAGPatterns::ParseDefaultOperands() {
std::vector<std::pair<Init *, StringInit *>> Ops;
for (unsigned op = 0, e = DefaultInfo->getNumArgs(); op != e; ++op)
Ops.push_back(
- std::make_pair(DefaultInfo->getArg(op), DefaultInfo->getArgName(op)));
+ std::pair(DefaultInfo->getArg(op), DefaultInfo->getArgName(op)));
DagInit *DI = DagInit::get(SomeSDNode, nullptr, Ops);
// Create a TreePattern to parse this.
diff --git a/llvm/utils/TableGen/CodeGenHwModes.cpp b/llvm/utils/TableGen/CodeGenHwModes.cpp
index 7c08c7516054ec..fec74d29c8bbbd 100644
--- a/llvm/utils/TableGen/CodeGenHwModes.cpp
+++ b/llvm/utils/TableGen/CodeGenHwModes.cpp
@@ -52,7 +52,7 @@ HwModeSelect::HwModeSelect(Record *R, CodeGenHwModes &CGH) {
}
for (unsigned i = 0, e = Modes.size(); i != e; ++i) {
unsigned ModeId = CGH.getHwModeId(Modes[i]);
- Items.push_back(std::make_pair(ModeId, Objects[i]));
+ Items.push_back(std::pair(ModeId, Objects[i]));
}
}
@@ -71,11 +71,11 @@ CodeGenHwModes::CodeGenHwModes(RecordKeeper &RK) : Records(RK) {
if (R->getName() == DefaultModeName)
continue;
Modes.emplace_back(R);
- ModeIds.insert(std::make_pair(R, Modes.size()));
+ ModeIds.insert(std::pair(R, Modes.size()));
}
for (Record *R : Records.getAllDerivedDefinitions("HwModeSelect")) {
- auto P = ModeSelects.emplace(std::make_pair(R, HwModeSelect(R, *this)));
+ auto P = ModeSelects.emplace(std::pair(R, HwModeSelect(R, *this)));
assert(P.second);
(void)P;
}
diff --git a/llvm/utils/TableGen/CodeGenInstAlias.cpp b/llvm/utils/TableGen/CodeGenInstAlias.cpp
index 8634d45eafc707..d217059542b1ad 100644
--- a/llvm/utils/TableGen/CodeGenInstAlias.cpp
+++ b/llvm/utils/TableGen/CodeGenInstAlias.cpp
@@ -227,7 +227,7 @@ CodeGenInstAlias::CodeGenInstAlias(Record *R, CodeGenTarget &T) : TheDef(R) {
InstOpRec->getValueAsDef("ParserMatchClass")
->getValueAsString("Name") != "Imm")) {
ResultOperands.push_back(ResOp);
- ResultInstOperandIndex.push_back(std::make_pair(i, -1));
+ ResultInstOperandIndex.push_back(std::pair(i, -1));
++AliasOpNo;
// Otherwise, we need to match each of the suboperands individually.
@@ -242,7 +242,7 @@ CodeGenInstAlias::CodeGenInstAlias(Record *R, CodeGenTarget &T) : TheDef(R) {
Result->getArgName(AliasOpNo)->getAsUnquotedString() + "." +
MIOI->getArgName(SubOp)->getAsUnquotedString(),
SubRec);
- ResultInstOperandIndex.push_back(std::make_pair(i, SubOp));
+ ResultInstOperandIndex.push_back(std::pair(i, SubOp));
}
++AliasOpNo;
}
@@ -260,7 +260,7 @@ CodeGenInstAlias::CodeGenInstAlias(Record *R, CodeGenTarget &T) : TheDef(R) {
if (tryAliasOpMatch(Result, AliasOpNo, SubRec, false, R->getLoc(), T,
ResOp)) {
ResultOperands.push_back(ResOp);
- ResultInstOperandIndex.push_back(std::make_pair(i, SubOp));
+ ResultInstOperandIndex.push_back(std::pair(i, SubOp));
++AliasOpNo;
} else {
PrintFatalError(
diff --git a/llvm/utils/TableGen/CodeGenInstruction.cpp b/llvm/utils/TableGen/CodeGenInstruction.cpp
index a569194ef23cbc..b00b95da5fc276 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.cpp
+++ b/llvm/utils/TableGen/CodeGenInstruction.cpp
@@ -175,7 +175,7 @@ CGIOperandList::CGIOperandList(Record *R) : TheDef(R) {
}
OpInfo.SubOpNames[j] = SubArgName;
- SubOpAliases[SubArgName] = std::make_pair(i, j);
+ SubOpAliases[SubArgName] = std::pair(i, j);
}
} else if (!EncoderMethod.empty()) {
// If we have no explicit sub-op dag, but have an top-level encoder
@@ -276,7 +276,7 @@ CGIOperandList::ParseOperandName(StringRef Op, bool AllowWholeOp) {
Op + "'");
// Otherwise, return the operand.
- return std::make_pair(OpIdx, 0U);
+ return std::pair(OpIdx, 0U);
}
// Find the suboperand number involved.
@@ -289,13 +289,13 @@ CGIOperandList::ParseOperandName(StringRef Op, bool AllowWholeOp) {
// Find the operand with the right name.
for (unsigned i = 0, e = MIOpInfo->getNumArgs(); i != e; ++i)
if (MIOpInfo->getArgNameStr(i) == SubOpName)
- return std::make_pair(OpIdx, i);
+ return std::pair(OpIdx, i);
// Otherwise, didn't find it!
PrintFatalError(TheDef->getLoc(), TheDef->getName() +
": unknown suboperand name in '" + Op +
"'");
- return std::make_pair(0U, 0U);
+ return std::pair(0U, 0U);
}
static void ParseConstraint(StringRef CStr, CGIOperandList &Ops, Record *Rec) {
diff --git a/llvm/utils/TableGen/CodeGenInstruction.h b/llvm/utils/TableGen/CodeGenInstruction.h
index ca7b1e9f7f4a4f..11a3acd8e72335 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.h
+++ b/llvm/utils/TableGen/CodeGenInstruction.h
@@ -205,7 +205,7 @@ class CGIOperandList {
for (unsigned i = 0;; ++i) {
assert(i < OperandList.size() && "Invalid flat operand #");
if (OperandList[i].MIOperandNo + OperandList[i].MINumOperands > Op)
- return std::make_pair(i, Op - OperandList[i].MIOperandNo);
+ return std::pair(i, Op - OperandList[i].MIOperandNo);
}
}
diff --git a/llvm/utils/TableGen/CodeGenRegisters.cpp b/llvm/utils/TableGen/CodeGenRegisters.cpp
index 7d266c8896d8e3..5890f0f40e4059 100644
--- a/llvm/utils/TableGen/CodeGenRegisters.cpp
+++ b/llvm/utils/TableGen/CodeGenRegisters.cpp
@@ -281,13 +281,13 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) {
CodeGenSubRegIndex *Idx = ExplicitSubRegIndices[i];
if (!SR->Artificial)
Idx->Artificial = false;
- if (!SubRegs.insert(std::make_pair(Idx, SR)).second)
+ if (!SubRegs.insert(std::pair(Idx, SR)).second)
PrintFatalError(TheDef->getLoc(), "SubRegIndex " + Idx->getName() +
" appears twice in Register " +
getName());
// Map explicit sub-registers first, so the names take precedence.
// The inherited sub-registers are mapped below.
- SubReg2Idx.insert(std::make_pair(SR, Idx));
+ SubReg2Idx.insert(std::pair(SR, Idx));
}
// Keep track of inherited subregs and how they can be reached.
@@ -327,7 +327,7 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) {
if (SubRegs.count(Comp.second) || !Orphans.erase(SRI->second))
continue;
// We found a new name for the orphaned sub-register.
- SubRegs.insert(std::make_pair(Comp.second, SRI->second));
+ SubRegs.insert(std::pair(Comp.second, SRI->second));
Indices.push_back(Comp.second);
}
}
@@ -374,7 +374,7 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) {
// Ensure that every sub-register has a unique name.
DenseMap<const CodeGenRegister *, CodeGenSubRegIndex *>::iterator Ins =
- SubReg2Idx.insert(std::make_pair(SubReg.second, SubReg.first)).first;
+ SubReg2Idx.insert(std::pair(SubReg.second, SubReg.first)).first;
if (Ins->second == SubReg.first)
continue;
// Trouble: Two different names for SubReg.second.
@@ -520,7 +520,7 @@ void CodeGenRegister::computeSecondarySubRegs(CodeGenRegBank &RegBank) {
// a sub-register with a concatenated sub-register index.
CodeGenSubRegIndex *Concat = RegBank.getConcatSubRegIndex(Parts);
std::pair<CodeGenSubRegIndex *, CodeGenRegister *> NewSubReg =
- std::make_pair(Concat, Cand);
+ std::pair(Concat, Cand);
if (!SubRegs.insert(NewSubReg).second)
continue;
@@ -528,7 +528,7 @@ void CodeGenRegister::computeSecondarySubRegs(CodeGenRegBank &RegBank) {
// We inserted a new subregister.
NewSubRegs.push_back(NewSubReg);
SubRegQueue.push(NewSubReg);
- SubReg2Idx.insert(std::make_pair(Cand, Concat));
+ SubReg2Idx.insert(std::pair(Cand, Concat));
}
}
@@ -1074,7 +1074,7 @@ CodeGenRegisterClass::getMatchingSubClassWithSubRegs(
...
[truncated]
|
arsenm
approved these changes
Feb 14, 2024
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These are unnecessary since C++17.