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[Thumb] Resolve FIXME: Transform "(and (shl x, c2), c1)" into "(shl (and x, c1>>c2), c2)" #82120

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merged 1 commit into from
May 26, 2024

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AtariDreams
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@AtariDreams AtariDreams commented Feb 17, 2024

Transform "(and (shl x, c2), c1)" into "(shl (and x, c1>>c2), c2)" if "c1 >> c2" is a cheaper immediate than "c1" using HasLowerConstantMaterializationCost.

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llvmbot commented Feb 17, 2024

@llvm/pr-subscribers-backend-arm

Author: AtariDreams (AtariDreams)

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Transform "(and (shl x, c2) c1)" into "(shl (and x, c1>>c2), c2)" if "c1 >> c2" is a cheaper immediate than "c1" using HasLowerConstantMaterializationCost.


Full diff: https://github.com/llvm/llvm-project/pull/82120.diff

1 Files Affected:

  • (modified) llvm/lib/Target/ARM/ARMISelLowering.cpp (+10-3)
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index b98006ed0cb3f4..4d92add3738e29 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -14388,9 +14388,16 @@ static SDValue CombineANDShift(SDNode *N,
     }
   }
 
-  // FIXME: Transform "(and (shl x, c2) c1)" ->
-  // "(shl (and x, c1>>c2), c2)" if "c1 >> c2" is a cheaper immediate than
-  // c1.
+  // Transform "(and (shl x, c2) c1)" into "(shl (and x, c1>>c2), c2)"
+  // if "c1 >> c2" is a cheaper immediate than "c1"
+  if (HasLowerConstantMaterializationCost(C1 >> C2, C1, Subtarget)) {
+
+    SDValue And = DAG.getNode(ISD::AND, DL, MVT::i32, N0->getOperand(0),
+                              DAG.getConstant(C1 >> C2, DL, MVT::i32));
+    return DAG.getNode(ISD::SHL, DL, MVT::i32, And,
+                       DAG.getConstant(C2, DL, MVT::i32));
+  }
+
   return SDValue();
 }
 

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@AtariDreams AtariDreams changed the title [ARM] Resolve FIXME: Transform "(and (shl x, c2) c1)" into "(shl (and x, c1>>c2), c2)" [ARM] Resolve FIXME: Transform "(and (shl x, c2), c1)" into "(shl (and x, c1>>c2), c2)" Feb 19, 2024
@AtariDreams
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@topperc Thoughts?

@AtariDreams
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@topperc Thoughts?

@AtariDreams AtariDreams changed the title [ARM] Resolve FIXME: Transform "(and (shl x, c2), c1)" into "(shl (and x, c1>>c2), c2)" [Thumb] Resolve FIXME: Transform "(and (shl x, c2), c1)" into "(shl (and x, c1>>c2), c2)" Apr 2, 2024
@TNorthover
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I think this one looks reasonable to me. Logic seems to check out and it looks for benefits before proceeding.

@TNorthover TNorthover self-requested a review May 23, 2024 10:01
@AtariDreams
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@RKSimon what do you think about merging this?

…and x, c1>>c2), c2)"

Transform "(and (shl x, c2), c1)" into "(shl (and x, c1>>c2), c2)" if "c1 >> c2" is a cheaper immediate than "c1" using HasLowerConstantMaterializationCost.
@AtariDreams AtariDreams merged commit 1d3329c into llvm:main May 26, 2024
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@AtariDreams AtariDreams deleted the shl branch May 26, 2024 18:58
@RKSimon
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RKSimon commented May 27, 2024

@RKSimon what do you think about merging this?

I don't think its necessary - we're up top 18.1.6 now and this is a perf improvement, not a critical bugfix for a recent issue.

Better to focus on getting trunk ready for 19.X in a couple of months time.

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AtariDreams commented May 27, 2024

This wasn't proposed for 18.x @RKSimon.

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RKSimon commented May 27, 2024

Sorry, misunderstood your question

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4 participants