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[clang] Define SwiftInfo for RISCVTargetCodeGenInfo #82152
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@llvm/pr-subscribers-clang @llvm/pr-subscribers-clang-codegen Author: Kuba (Brecka) Mracek (kubamracek) ChangesFor Embedded Swift, let's unblock building for RISC-V boards (e.g. ESP32-C6). This isn't trying to add full RISC-V support to Swift / Embedded Swift, it's just fixing the immediate blocker (not having SwiftInfo defined blocks all compilations). Full diff: https://github.com/llvm/llvm-project/pull/82152.diff 1 Files Affected:
diff --git a/clang/lib/CodeGen/Targets/RISCV.cpp b/clang/lib/CodeGen/Targets/RISCV.cpp
index dec6540230a60f..9a79424c4612ce 100644
--- a/clang/lib/CodeGen/Targets/RISCV.cpp
+++ b/clang/lib/CodeGen/Targets/RISCV.cpp
@@ -529,7 +529,10 @@ class RISCVTargetCodeGenInfo : public TargetCodeGenInfo {
RISCVTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, unsigned XLen,
unsigned FLen, bool EABI)
: TargetCodeGenInfo(
- std::make_unique<RISCVABIInfo>(CGT, XLen, FLen, EABI)) {}
+ std::make_unique<RISCVABIInfo>(CGT, XLen, FLen, EABI)) {
+ SwiftInfo =
+ std::make_unique<SwiftABIInfo>(CGT, /*SwiftErrorInRegister=*/false);
+ }
void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule &CGM) const override {
|
Can this be tested? I don't know what the affects are. |
Might be as simple as adding another |
Yes, please add a trivial test if at all possible. |
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LGTM.
For Embedded Swift, let's unblock building for RISC-V boards (e.g. ESP32-C6). This isn't trying to add full RISC-V support to Swift / Embedded Swift, it's just fixing the immediate blocker (not having SwiftInfo defined blocks all compilations).
What purpose does this serve if swiftcall doesn't work? Given the tests only test that you can produce IR from Clang, that suggests that it doesn't actually do anything useful?.. (And if it does do something useful, that should be being tested) |
For Embedded Swift, let's unblock building for RISC-V boards (e.g. ESP32-C6). This isn't trying to add full RISC-V support to Swift / Embedded Swift, it's just fixing the immediate blocker (not having SwiftInfo defined blocks all compilations).
For Embedded Swift, let's unblock building for RISC-V boards (e.g. ESP32-C6). This isn't trying to add full RISC-V support to Swift / Embedded Swift, it's just fixing the immediate blocker (not having SwiftInfo defined blocks all compilations).