[RISCV] Add scheduling info for Zcmp

[francisvm]

The order of the entries in the list is:

outs, ins, Defs, Uses, implicit-defs, implicit uses, where the last two are added programatically during codegen depending on the registers saved/restored and are not described in the TD files.

[llvmbot]

@llvm/pr-subscribers-backend-risc-v

Author: Visoiu Mistrih Francis (francisvm)

Changes

The order of the entries in the list is:

outs, ins, Defs, Uses, implicit-defs, implicit uses, where the last two are added programatically during codegen depending on the registers saved/restored and are not described in the TD files.

---

Full diff: https://github.com/llvm/llvm-project/pull/82719.diff

1 Files Affected:

• (modified) llvm/lib/Target/RISCV/RISCVInstrInfoZc.td (+23-6)

diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
index a3ec2e5667ee58..5a1bca41c9cb4e 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
@@ -183,27 +183,44 @@ def C_SH : CStoreH_rri<0b100011, 0b0, "c.sh">,
 let DecoderNamespace = "RVZcmp", Predicates = [HasStdExtZcmp],
     Defs = [X10, X11], hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
 def CM_MVA01S : RVInst16CA<0b101011, 0b11, 0b10, (outs),
-                            (ins SR07:$rs1, SR07:$rs2), "cm.mva01s", "$rs1, $rs2">;
+                            (ins SR07:$rs1, SR07:$rs2), "cm.mva01s", "$rs1, $rs2">,
+                Sched<[ReadIALU, ReadIALU, WriteIALU, WriteIALU]>;
 
 def CM_MVSA01 : RVInst16CA<0b101011, 0b01, 0b10, (outs SR07:$rs1, SR07:$rs2),
-                            (ins), "cm.mvsa01", "$rs1, $rs2">;
+                            (ins), "cm.mvsa01", "$rs1, $rs2">,
+                Sched<[WriteIALU, WriteIALU, WriteIALU, WriteIALU]>;
 } // DecoderNamespace = "RVZcmp", Predicates = [HasStdExtZcmp]...
 
 let DecoderNamespace = "RVZcmp", Predicates = [HasStdExtZcmp] in {
 let hasSideEffects = 0, mayLoad = 0, mayStore = 1, Uses = [X2], Defs = [X2] in
-def CM_PUSH : RVInstZcCPPP<0b11000, "cm.push">;
+def CM_PUSH : RVInstZcCPPP<0b11000, "cm.push">,
+              Sched<[WriteIALU, ReadIALU, ReadStoreData, ReadStoreData,
+                     ReadStoreData, ReadStoreData, ReadStoreData, ReadStoreData,
+                     ReadStoreData, ReadStoreData, ReadStoreData, ReadStoreData,
+                     ReadStoreData, ReadStoreData, ReadStoreData]>;
 
 let hasSideEffects = 0, mayLoad = 1, mayStore = 0, isReturn = 1,
     Uses = [X2], Defs = [X2] in
-def CM_POPRET : RVInstZcCPPP<0b11110, "cm.popret">;
+def CM_POPRET : RVInstZcCPPP<0b11110, "cm.popret">,
+                Sched<[WriteIALU, ReadIALU, WriteLDW, WriteLDW,
+                       WriteLDW, WriteLDW, WriteLDW, WriteLDW, WriteLDW,
+                       WriteLDW, WriteLDW, WriteLDW, WriteLDW, WriteLDW,
+                       WriteLDW]>;
 
 let hasSideEffects = 0, mayLoad = 1, mayStore = 0, isReturn = 1,
     Uses = [X2], Defs = [X2, X10] in
-def CM_POPRETZ : RVInstZcCPPP<0b11100, "cm.popretz">;
+def CM_POPRETZ : RVInstZcCPPP<0b11100, "cm.popretz">,
+                 Sched<[WriteIALU, WriteIALU, ReadIALU, WriteLDW, WriteLDW,
+                        WriteLDW, WriteLDW, WriteLDW, WriteLDW, WriteLDW,
+                        WriteLDW, WriteLDW, WriteLDW, WriteLDW, WriteLDW,
+                        WriteLDW]>;
 
 let hasSideEffects = 0, mayLoad = 1, mayStore = 0,
     Uses = [X2], Defs = [X2] in
-def CM_POP : RVInstZcCPPP<0b11010, "cm.pop">;
+def CM_POP : RVInstZcCPPP<0b11010, "cm.pop">,
+             Sched<[WriteIALU, ReadIALU, WriteLDW, WriteLDW, WriteLDW,
+                    WriteLDW, WriteLDW, WriteLDW, WriteLDW, WriteLDW,
+                    WriteLDW, WriteLDW, WriteLDW, WriteLDW, WriteLDW]>;
 } // DecoderNamespace = "RVZcmp", Predicates = [HasStdExtZcmp]...
 
 let DecoderNamespace = "RVZcmt", Predicates = [HasStdExtZcmt],

[topperc]

LGTM

[michaelmaitland]

LGTM!