[SLP] Collect candidate VFs in vector in vectorizeStores (NFC). #82793
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This is in preparation for #77790 and makes it easy to add other, non-power-of-2 VFs for processing.
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@llvm/pr-subscribers-llvm-transforms Author: Florian Hahn (fhahn) ChangesThis is in preparation for Full diff: https://github.com/llvm/llvm-project/pull/82793.diff 1 Files Affected:
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index de4e56ff80659a..8ee840e97e94b7 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -13918,10 +13918,14 @@ bool SLPVectorizerPass::vectorizeStores(ArrayRef<StoreInst *> Stores,
<< "MinVF (" << MinVF << ")\n");
}
- // FIXME: Is division-by-2 the correct step? Should we assert that the
- // register size is a power-of-2?
- unsigned StartIdx = 0;
+ SmallVector<unsigned> CandidateVFs;
for (unsigned Size = MaxVF; Size >= MinVF; Size /= 2) {
+ // FIXME: Is division-by-2 the correct step? Should we assert that the
+ // register size is a power-of-2?
+ CandidateVFs.push_back(Size);
+ }
+ unsigned StartIdx = 0;
+ for (unsigned Size : CandidateVFs) {
for (unsigned Cnt = StartIdx, E = Operands.size(); Cnt + Size <= E;) {
ArrayRef<Value *> Slice = ArrayRef(Operands).slice(Cnt, Size);
assert(
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Comment on lines
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| // register size is a power-of-2? | ||
| unsigned StartIdx = 0; | ||
| SmallVector<unsigned> CandidateVFs; | ||
| for (unsigned Size = MaxVF; Size >= MinVF; Size /= 2) { | ||
| // FIXME: Is division-by-2 the correct step? Should we assert that the | ||
| // register size is a power-of-2? | ||
| CandidateVFs.push_back(Size); | ||
| } |
There was a problem hiding this comment.
Suggested change
| // register size is a power-of-2? | |
| unsigned StartIdx = 0; | |
| SmallVector<unsigned> CandidateVFs; | |
| for (unsigned Size = MaxVF; Size >= MinVF; Size /= 2) { | |
| // FIXME: Is division-by-2 the correct step? Should we assert that the | |
| // register size is a power-of-2? | |
| CandidateVFs.push_back(Size); | |
| } | |
| unsigned Sz = MaxVF / MinVF; | |
| SmallVector<unsigned> CandidateVFs(Sz); | |
| // FIXME: Is division-by-2 the correct step? Should we assert that the | |
| // register size is a power-of-2? | |
| unsigned Size = MaxVF; | |
| for_each(Candidate, [&](unsigned &VF) { VF = Size; Size /= 2; }); |
There was a problem hiding this comment.
Adjusted, but needed to use unsigned Sz = 1 + Log2_32(MaxVF) - Log2_32(MinVF); and introduce early exit #83283 so we don't need to handle the case where. MaxVF < MinVF.
Exit early if MaxVF < MinVF. In that case, the loop body below will never get entered. Note that this adjusts the condition from MaxVF <= MinVF. If MaxVF == MinVF, vectorization may still be feasible (and the loop below gets entered).
… users/fhahn/slp-store-vfs-in-vector
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This is in preparation for
#77790 and makes it easy to add other, non-power-of-2 VFs for processing.