Refactoring changes to support emitting call graph section #83176
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Argument-register pairs in CallSiteInfo is only needed when EmitCallSiteInfo is on. Currently, the pairs are always pushed to the vector but only used when EmitCallSiteInfo is on. Don't fill the CallSiteInfo vector unless used. Reviewed By: morehouse Differential Revision: https://reviews.llvm.org/D107108
CallSiteInfo is originally used only for argument - register pairs. Make it struct, in which we can store additional data for call sites. Also, the variables/methods used for CallSiteInfo are named for its original use case, e.g., CallFwdRegsInfo. Refactor these for the upcoming use, e.g. addCallArgsForwardingRegs() -> addCallSiteInfo(). An upcoming patch will add type ids for indirect calls to propogate them from middle-end to the back-end. The type ids will be then used to emit the call graph section. Original RFC: https://lists.llvm.org/pipermail/llvm-dev/2021-June/151044.html Updated RFC: https://lists.llvm.org/pipermail/llvm-dev/2021-July/151739.html Reviewed By: morehouse Differential Revision: https://reviews.llvm.org/D107109
llvmbot
added
backend:ARM
backend:AArch64
backend:X86
debuginfo
llvm:SelectionDAG
|
@llvm/pr-subscribers-llvm-selectiondag @llvm/pr-subscribers-backend-arm Author: Prabhuk (Prabhuk) ChangesThese refactoring changes are created as part of the changes needed for emitting call graph section. Original RFC: https://lists.llvm.org/pipermail/llvm-dev/2021-June/151044.html Full diff: https://github.com/llvm/llvm-project/pull/83176.diff 10 Files Affected:
diff --git a/llvm/include/llvm/CodeGen/MachineFunction.h b/llvm/include/llvm/CodeGen/MachineFunction.h
index a2c90c9f42f38f..cc45f10350dd7d 100644
--- a/llvm/include/llvm/CodeGen/MachineFunction.h
+++ b/llvm/include/llvm/CodeGen/MachineFunction.h
@@ -481,9 +481,11 @@ class LLVM_EXTERNAL_VISIBILITY MachineFunction {
assert(Arg < (1 << 16) && "Arg out of range");
}
};
- /// Vector of call argument and its forwarding register.
- using CallSiteInfo = SmallVector<ArgRegPair, 1>;
- using CallSiteInfoImpl = SmallVectorImpl<ArgRegPair>;
+
+ struct CallSiteInfo {
+ /// Vector of call argument and its forwarding register.
+ SmallVector<ArgRegPair, 1> ArgRegPairs;
+ };
private:
Delegate *TheDelegate = nullptr;
@@ -1323,8 +1325,7 @@ class LLVM_EXTERNAL_VISIBILITY MachineFunction {
}
/// Start tracking the arguments passed to the call \p CallI.
- void addCallArgsForwardingRegs(const MachineInstr *CallI,
- CallSiteInfoImpl &&CallInfo) {
+ void addCallSiteInfo(const MachineInstr *CallI, CallSiteInfo &&CallInfo) {
assert(CallI->isCandidateForCallSiteEntry());
bool Inserted =
CallSitesInfo.try_emplace(CallI, std::move(CallInfo)).second;
diff --git a/llvm/include/llvm/CodeGen/SelectionDAG.h b/llvm/include/llvm/CodeGen/SelectionDAG.h
index 2fc1ceafa927fd..1be16dfa66053c 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAG.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAG.h
@@ -279,7 +279,6 @@ class SelectionDAG {
SDDbgInfo *DbgInfo;
using CallSiteInfo = MachineFunction::CallSiteInfo;
- using CallSiteInfoImpl = MachineFunction::CallSiteInfoImpl;
struct NodeExtraInfo {
CallSiteInfo CSInfo;
@@ -2265,7 +2264,7 @@ class SelectionDAG {
}
/// Set CallSiteInfo to be associated with Node.
- void addCallSiteInfo(const SDNode *Node, CallSiteInfoImpl &&CallInfo) {
+ void addCallSiteInfo(const SDNode *Node, CallSiteInfo &&CallInfo) {
SDEI[Node].CSInfo = std::move(CallInfo);
}
/// Return CallSiteInfo associated with Node, or a default if none exists.
diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
index 6b5ad62e083e3b..a85a8e04666aa9 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
@@ -798,10 +798,10 @@ static void collectCallSiteParameters(const MachineInstr *CallMI,
ParamSet &Params) {
const MachineFunction *MF = CallMI->getMF();
const auto &CalleesMap = MF->getCallSitesInfo();
- auto CallFwdRegsInfo = CalleesMap.find(CallMI);
+ auto CSInfo = CalleesMap.find(CallMI);
// There is no information for the call instruction.
- if (CallFwdRegsInfo == CalleesMap.end())
+ if (CSInfo == CalleesMap.end())
return;
const MachineBasicBlock *MBB = CallMI->getParent();
@@ -815,7 +815,7 @@ static void collectCallSiteParameters(const MachineInstr *CallMI,
DIExpression::get(MF->getFunction().getContext(), {});
// Add all the forwarding registers into the ForwardedRegWorklist.
- for (const auto &ArgReg : CallFwdRegsInfo->second) {
+ for (const auto &ArgReg : CSInfo->second.ArgRegPairs) {
bool InsertedReg =
ForwardedRegWorklist.insert({ArgReg.Reg, {{ArgReg.Reg, EmptyExpr}}})
.second;
diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
index 54f55623131b35..6fb9eea50a29a5 100644
--- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -425,11 +425,11 @@ bool MIRParserImpl::initializeCallSiteInfo(
Register Reg;
if (parseNamedRegisterReference(PFS, Reg, ArgRegPair.Reg.Value, Error))
return error(Error, ArgRegPair.Reg.SourceRange);
- CSInfo.emplace_back(Reg, ArgRegPair.ArgNo);
+ CSInfo.ArgRegPairs.emplace_back(Reg, ArgRegPair.ArgNo);
}
if (TM.Options.EmitCallSiteInfo)
- MF.addCallArgsForwardingRegs(&*CallI, std::move(CSInfo));
+ MF.addCallSiteInfo(&*CallI, std::move(CSInfo));
}
if (YamlMF.CallSitesInfo.size() && !TM.Options.EmitCallSiteInfo)
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index 4ed44d1c06f48c..2c37908d20db96 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -540,7 +540,7 @@ void MIRPrinter::convertCallSiteObjects(yaml::MachineFunction &YMF,
std::distance(CallI->getParent()->instr_begin(), CallI);
YmlCS.CallLocation = CallLocation;
// Construct call arguments and theirs forwarding register info.
- for (auto ArgReg : CSInfo.second) {
+ for (auto ArgReg : CSInfo.second.ArgRegPairs) {
yaml::CallSiteInfo::ArgRegPair YmlArgReg;
YmlArgReg.ArgNo = ArgReg.ArgNo;
printRegMIR(ArgReg.Reg, YmlArgReg.Reg, TRI);
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
index c9e2745f00c958..e8089497e28149 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
@@ -888,8 +888,10 @@ EmitSchedule(MachineBasicBlock::iterator &InsertPos) {
}
if (MI->isCandidateForCallSiteEntry() &&
- DAG->getTarget().Options.EmitCallSiteInfo)
- MF.addCallArgsForwardingRegs(MI, DAG->getCallSiteInfo(Node));
+ DAG->getTarget().Options.EmitCallSiteInfo) {
+ // MF.addCallArgsForwardingRegs(MI, DAG->getCallSiteInfo(Node));
+ MF.addCallSiteInfo(MI, DAG->getCallSiteInfo(Node));
+ }
if (DAG->getNoMergeSiteInfo(Node)) {
MI->setFlag(MachineInstr::MIFlag::NoMerge);
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 3b92e95d7c2876..6bcd357cad6d5a 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -7927,9 +7927,10 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
// Call site info is used for function's parameter entry value
// tracking. For now we track only simple cases when parameter
// is transferred through whole register.
- llvm::erase_if(CSInfo, [&VA](MachineFunction::ArgRegPair ArgReg) {
- return ArgReg.Reg == VA.getLocReg();
- });
+ llvm::erase_if(CSInfo.ArgRegPairs,
+ [&VA](MachineFunction::ArgRegPair ArgReg) {
+ return ArgReg.Reg == VA.getLocReg();
+ });
} else {
// Add an extra level of indirection for streaming mode changes by
// using a pseudo copy node that cannot be rematerialised between a
@@ -7941,7 +7942,7 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
RegsUsed.insert(VA.getLocReg());
const TargetOptions &Options = DAG.getTarget().Options;
if (Options.EmitCallSiteInfo)
- CSInfo.emplace_back(VA.getLocReg(), i);
+ CSInfo.ArgRegPairs.emplace_back(VA.getLocReg(), i);
}
} else {
assert(VA.isMemLoc());
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index b98006ed0cb3f4..f209f1da46815c 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -2571,7 +2571,7 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
}
const TargetOptions &Options = DAG.getTarget().Options;
if (Options.EmitCallSiteInfo)
- CSInfo.emplace_back(VA.getLocReg(), i);
+ CSInfo.ArgRegPairs.emplace_back(VA.getLocReg(), i);
RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
} else if (isByVal) {
assert(VA.isMemLoc());
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index 97e830cec27cad..a60a17395d7f7c 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -3369,8 +3369,8 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
// Collect CSInfo about which register passes which parameter.
const TargetOptions &Options = DAG.getTarget().Options;
- if (Options.SupportsDebugEntryValues)
- CSInfo.emplace_back(VA.getLocReg(), i);
+ if (Options.EmitCallSiteInfo && Options.SupportsDebugEntryValues)
+ CSInfo.ArgRegPairs.emplace_back(VA.getLocReg(), i);
continue;
}
diff --git a/llvm/lib/Target/X86/X86ISelLoweringCall.cpp b/llvm/lib/Target/X86/X86ISelLoweringCall.cpp
index be8275c92e11ae..3e3996947def19 100644
--- a/llvm/lib/Target/X86/X86ISelLoweringCall.cpp
+++ b/llvm/lib/Target/X86/X86ISelLoweringCall.cpp
@@ -2226,7 +2226,7 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
const TargetOptions &Options = DAG.getTarget().Options;
if (Options.EmitCallSiteInfo)
- CSInfo.emplace_back(VA.getLocReg(), I);
+ CSInfo.ArgRegPairs.emplace_back(VA.getLocReg(), I);
if (isVarArg && IsWin64) {
// Win64 ABI requires argument XMM reg to be copied to the corresponding
// shadow reg if callee is a varargs function.
|
|
@llvm/pr-subscribers-backend-x86 Author: Prabhuk (Prabhuk) ChangesThese refactoring changes are created as part of the changes needed for emitting call graph section. Original RFC: https://lists.llvm.org/pipermail/llvm-dev/2021-June/151044.html Full diff: https://github.com/llvm/llvm-project/pull/83176.diff 10 Files Affected:
diff --git a/llvm/include/llvm/CodeGen/MachineFunction.h b/llvm/include/llvm/CodeGen/MachineFunction.h
index a2c90c9f42f38f..cc45f10350dd7d 100644
--- a/llvm/include/llvm/CodeGen/MachineFunction.h
+++ b/llvm/include/llvm/CodeGen/MachineFunction.h
@@ -481,9 +481,11 @@ class LLVM_EXTERNAL_VISIBILITY MachineFunction {
assert(Arg < (1 << 16) && "Arg out of range");
}
};
- /// Vector of call argument and its forwarding register.
- using CallSiteInfo = SmallVector<ArgRegPair, 1>;
- using CallSiteInfoImpl = SmallVectorImpl<ArgRegPair>;
+
+ struct CallSiteInfo {
+ /// Vector of call argument and its forwarding register.
+ SmallVector<ArgRegPair, 1> ArgRegPairs;
+ };
private:
Delegate *TheDelegate = nullptr;
@@ -1323,8 +1325,7 @@ class LLVM_EXTERNAL_VISIBILITY MachineFunction {
}
/// Start tracking the arguments passed to the call \p CallI.
- void addCallArgsForwardingRegs(const MachineInstr *CallI,
- CallSiteInfoImpl &&CallInfo) {
+ void addCallSiteInfo(const MachineInstr *CallI, CallSiteInfo &&CallInfo) {
assert(CallI->isCandidateForCallSiteEntry());
bool Inserted =
CallSitesInfo.try_emplace(CallI, std::move(CallInfo)).second;
diff --git a/llvm/include/llvm/CodeGen/SelectionDAG.h b/llvm/include/llvm/CodeGen/SelectionDAG.h
index 2fc1ceafa927fd..1be16dfa66053c 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAG.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAG.h
@@ -279,7 +279,6 @@ class SelectionDAG {
SDDbgInfo *DbgInfo;
using CallSiteInfo = MachineFunction::CallSiteInfo;
- using CallSiteInfoImpl = MachineFunction::CallSiteInfoImpl;
struct NodeExtraInfo {
CallSiteInfo CSInfo;
@@ -2265,7 +2264,7 @@ class SelectionDAG {
}
/// Set CallSiteInfo to be associated with Node.
- void addCallSiteInfo(const SDNode *Node, CallSiteInfoImpl &&CallInfo) {
+ void addCallSiteInfo(const SDNode *Node, CallSiteInfo &&CallInfo) {
SDEI[Node].CSInfo = std::move(CallInfo);
}
/// Return CallSiteInfo associated with Node, or a default if none exists.
diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
index 6b5ad62e083e3b..a85a8e04666aa9 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
@@ -798,10 +798,10 @@ static void collectCallSiteParameters(const MachineInstr *CallMI,
ParamSet &Params) {
const MachineFunction *MF = CallMI->getMF();
const auto &CalleesMap = MF->getCallSitesInfo();
- auto CallFwdRegsInfo = CalleesMap.find(CallMI);
+ auto CSInfo = CalleesMap.find(CallMI);
// There is no information for the call instruction.
- if (CallFwdRegsInfo == CalleesMap.end())
+ if (CSInfo == CalleesMap.end())
return;
const MachineBasicBlock *MBB = CallMI->getParent();
@@ -815,7 +815,7 @@ static void collectCallSiteParameters(const MachineInstr *CallMI,
DIExpression::get(MF->getFunction().getContext(), {});
// Add all the forwarding registers into the ForwardedRegWorklist.
- for (const auto &ArgReg : CallFwdRegsInfo->second) {
+ for (const auto &ArgReg : CSInfo->second.ArgRegPairs) {
bool InsertedReg =
ForwardedRegWorklist.insert({ArgReg.Reg, {{ArgReg.Reg, EmptyExpr}}})
.second;
diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
index 54f55623131b35..6fb9eea50a29a5 100644
--- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -425,11 +425,11 @@ bool MIRParserImpl::initializeCallSiteInfo(
Register Reg;
if (parseNamedRegisterReference(PFS, Reg, ArgRegPair.Reg.Value, Error))
return error(Error, ArgRegPair.Reg.SourceRange);
- CSInfo.emplace_back(Reg, ArgRegPair.ArgNo);
+ CSInfo.ArgRegPairs.emplace_back(Reg, ArgRegPair.ArgNo);
}
if (TM.Options.EmitCallSiteInfo)
- MF.addCallArgsForwardingRegs(&*CallI, std::move(CSInfo));
+ MF.addCallSiteInfo(&*CallI, std::move(CSInfo));
}
if (YamlMF.CallSitesInfo.size() && !TM.Options.EmitCallSiteInfo)
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index 4ed44d1c06f48c..2c37908d20db96 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -540,7 +540,7 @@ void MIRPrinter::convertCallSiteObjects(yaml::MachineFunction &YMF,
std::distance(CallI->getParent()->instr_begin(), CallI);
YmlCS.CallLocation = CallLocation;
// Construct call arguments and theirs forwarding register info.
- for (auto ArgReg : CSInfo.second) {
+ for (auto ArgReg : CSInfo.second.ArgRegPairs) {
yaml::CallSiteInfo::ArgRegPair YmlArgReg;
YmlArgReg.ArgNo = ArgReg.ArgNo;
printRegMIR(ArgReg.Reg, YmlArgReg.Reg, TRI);
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
index c9e2745f00c958..e8089497e28149 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
@@ -888,8 +888,10 @@ EmitSchedule(MachineBasicBlock::iterator &InsertPos) {
}
if (MI->isCandidateForCallSiteEntry() &&
- DAG->getTarget().Options.EmitCallSiteInfo)
- MF.addCallArgsForwardingRegs(MI, DAG->getCallSiteInfo(Node));
+ DAG->getTarget().Options.EmitCallSiteInfo) {
+ // MF.addCallArgsForwardingRegs(MI, DAG->getCallSiteInfo(Node));
+ MF.addCallSiteInfo(MI, DAG->getCallSiteInfo(Node));
+ }
if (DAG->getNoMergeSiteInfo(Node)) {
MI->setFlag(MachineInstr::MIFlag::NoMerge);
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 3b92e95d7c2876..6bcd357cad6d5a 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -7927,9 +7927,10 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
// Call site info is used for function's parameter entry value
// tracking. For now we track only simple cases when parameter
// is transferred through whole register.
- llvm::erase_if(CSInfo, [&VA](MachineFunction::ArgRegPair ArgReg) {
- return ArgReg.Reg == VA.getLocReg();
- });
+ llvm::erase_if(CSInfo.ArgRegPairs,
+ [&VA](MachineFunction::ArgRegPair ArgReg) {
+ return ArgReg.Reg == VA.getLocReg();
+ });
} else {
// Add an extra level of indirection for streaming mode changes by
// using a pseudo copy node that cannot be rematerialised between a
@@ -7941,7 +7942,7 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
RegsUsed.insert(VA.getLocReg());
const TargetOptions &Options = DAG.getTarget().Options;
if (Options.EmitCallSiteInfo)
- CSInfo.emplace_back(VA.getLocReg(), i);
+ CSInfo.ArgRegPairs.emplace_back(VA.getLocReg(), i);
}
} else {
assert(VA.isMemLoc());
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index b98006ed0cb3f4..f209f1da46815c 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -2571,7 +2571,7 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
}
const TargetOptions &Options = DAG.getTarget().Options;
if (Options.EmitCallSiteInfo)
- CSInfo.emplace_back(VA.getLocReg(), i);
+ CSInfo.ArgRegPairs.emplace_back(VA.getLocReg(), i);
RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
} else if (isByVal) {
assert(VA.isMemLoc());
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index 97e830cec27cad..a60a17395d7f7c 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -3369,8 +3369,8 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
// Collect CSInfo about which register passes which parameter.
const TargetOptions &Options = DAG.getTarget().Options;
- if (Options.SupportsDebugEntryValues)
- CSInfo.emplace_back(VA.getLocReg(), i);
+ if (Options.EmitCallSiteInfo && Options.SupportsDebugEntryValues)
+ CSInfo.ArgRegPairs.emplace_back(VA.getLocReg(), i);
continue;
}
diff --git a/llvm/lib/Target/X86/X86ISelLoweringCall.cpp b/llvm/lib/Target/X86/X86ISelLoweringCall.cpp
index be8275c92e11ae..3e3996947def19 100644
--- a/llvm/lib/Target/X86/X86ISelLoweringCall.cpp
+++ b/llvm/lib/Target/X86/X86ISelLoweringCall.cpp
@@ -2226,7 +2226,7 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
const TargetOptions &Options = DAG.getTarget().Options;
if (Options.EmitCallSiteInfo)
- CSInfo.emplace_back(VA.getLocReg(), I);
+ CSInfo.ArgRegPairs.emplace_back(VA.getLocReg(), I);
if (isVarArg && IsWin64) {
// Win64 ABI requires argument XMM reg to be copied to the corresponding
// shadow reg if callee is a varargs function.
|
Prabhuk
changed the title
ilovepi
reviewed
Feb 27, 2024
Comment on lines
+891
to
+894
| DAG->getTarget().Options.EmitCallSiteInfo) { | ||
| // MF.addCallArgsForwardingRegs(MI, DAG->getCallSiteInfo(Node)); | ||
| MF.addCallSiteInfo(MI, DAG->getCallSiteInfo(Node)); | ||
| } |
There was a problem hiding this comment.
nit: you don't need the braces. It will be clear if you just remove the commented out line.
There was a problem hiding this comment.
yup, more generally we should not commit commented out code.
I also agree this deserves to be split as two PRs and merged independently.
ilovepi
reviewed
Feb 27, 2024
There was a problem hiding this comment.
The message in these commits seems to refer to an unrelated phabricator review.
In particular [MIPS][CallSiteInfo][NFC] Fill CallSiteInfo only when needed doesn't seem to be related https://reviews.llvm.org/D107108 at all.
| @@ -3369,7 +3369,7 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, | |||
|
|
|||
| // Collect CSInfo about which register passes which parameter. | |||
| const TargetOptions &Options = DAG.getTarget().Options; | |||
| if (Options.SupportsDebugEntryValues) | |||
| if (Options.EmitCallSiteInfo && Options.SupportsDebugEntryValues) | |||
There was a problem hiding this comment.
Does this not affect any tests?
|
Abandoning this PR and uploading two separate PRs for each of the commit involved as suggested. |
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These refactoring changes are created as part of the changes needed for emitting call graph section.
Original RFC: https://lists.llvm.org/pipermail/llvm-dev/2021-June/151044.html
Updated RFC: https://lists.llvm.org/pipermail/llvm-dev/2021-July/151739.html