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Apply the AdjustICmpImmAndPred
optimization when it results in a one-instruction immediate materialization over a two-instruction materialization.
#83218
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a one-instruction immediate materialization over a two-instruction materialization. llvm#76460
@llvm/pr-subscribers-llvm-globalisel @llvm/pr-subscribers-backend-aarch64 Author: Owen Anderson (resistor) ChangesFull diff: https://github.com/llvm/llvm-project/pull/83218.diff 2 Files Affected:
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
index 9bc5815ae05371..96c97cb4706d55 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
@@ -588,7 +588,8 @@ tryAdjustICmpImmAndPred(Register RHS, CmpInst::Predicate P,
auto ValAndVReg = getIConstantVRegValWithLookThrough(RHS, MRI);
if (!ValAndVReg)
return std::nullopt;
- uint64_t C = ValAndVReg->Value.getZExtValue();
+ uint64_t OriginalC = ValAndVReg->Value.getZExtValue();
+ uint64_t C = OriginalC;
if (isLegalArithImmed(C))
return std::nullopt;
@@ -658,9 +659,12 @@ tryAdjustICmpImmAndPred(Register RHS, CmpInst::Predicate P,
// predicate if it is.
if (Size == 32)
C = static_cast<uint32_t>(C);
- if (!isLegalArithImmed(C))
- return std::nullopt;
- return {{C, P}};
+ if (isLegalArithImmed(C))
+ return {{C, P}};
+ if (AArch64_AM::isLogicalImmediate(C, Size) &&
+ !AArch64_AM::isLogicalImmediate(OriginalC, Size))
+ return {{C, P}};
+ return std::nullopt;
}
/// Determine whether or not it is possible to update the RHS and predicate of
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/icmp-cst.ll b/llvm/test/CodeGen/AArch64/GlobalISel/icmp-cst.ll
new file mode 100644
index 00000000000000..e6b27943372a83
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/icmp-cst.ll
@@ -0,0 +1,185 @@
+; RUN: llc -mtriple=aarch64-linux-gnu -global-isel=1 < %s | FileCheck %s
+
+; CHECK-NOT: movk
+
+define dso_local noundef i1 @ule_11111111(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, 286331154
+ ret i1 %2
+}
+
+define dso_local noundef i1 @ule_22222222(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, 572662307
+ ret i1 %2
+}
+
+define dso_local noundef i1 @ule_33333333(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, 858993460
+ ret i1 %2
+}
+
+define dso_local noundef i1 @ule_44444444(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, 1145324613
+ ret i1 %2
+}
+
+define dso_local noundef i1 @ule_55555555(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, 1431655766
+ ret i1 %2
+}
+
+define dso_local noundef i1 @ule_66666666(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, 1717986919
+ ret i1 %2
+}
+
+define dso_local noundef i1 @ule_77777777(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, 2004318072
+ ret i1 %2
+}
+
+define dso_local noundef i1 @ule_88888888(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, -2004318071
+ ret i1 %2
+}
+
+define dso_local noundef i1 @ule_99999999(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, -1717986918
+ ret i1 %2
+}
+
+define dso_local noundef i1 @uge_11111111(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, 286331152
+ ret i1 %2
+}
+
+define dso_local noundef i1 @uge_22222222(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, 572662305
+ ret i1 %2
+}
+
+define dso_local noundef i1 @uge_33333333(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, 858993458
+ ret i1 %2
+}
+
+define dso_local noundef i1 @uge_44444444(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, 1145324611
+ ret i1 %2
+}
+
+define dso_local noundef i1 @uge_55555555(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, 1431655764
+ ret i1 %2
+}
+
+define dso_local noundef i1 @uge_66666666(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, 1717986917
+ ret i1 %2
+}
+
+define dso_local noundef i1 @uge_77777777(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, 2004318070
+ ret i1 %2
+}
+
+define dso_local noundef i1 @uge_88888888(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, -2004318073
+ ret i1 %2
+}
+
+define dso_local noundef i1 @uge_99999999(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, -1717986920
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sle_11111111(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp slt i32 %0, 286331154
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sle_22222222(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp slt i32 %0, 572662307
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sle_33333333(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp slt i32 %0, 858993460
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sle_44444444(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp slt i32 %0, 1145324613
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sle_55555555(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp slt i32 %0, 1431655766
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sle_66666666(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp slt i32 %0, 1717986919
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sle_77777777(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp slt i32 %0, 2004318072
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sle_88888888(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, -2004318071
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sle_99999999(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, -1717986918
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sge_11111111(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp sgt i32 %0, 286331152
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sge_22222222(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp sgt i32 %0, 572662305
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sge_33333333(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp sgt i32 %0, 858993458
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sge_44444444(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp sgt i32 %0, 1145324611
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sge_55555555(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp sgt i32 %0, 1431655764
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sge_66666666(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp sgt i32 %0, 1717986917
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sge_77777777(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp sgt i32 %0, 2004318070
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sge_88888888(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, -2004318073
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sge_99999999(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, -1717986920
+ ret i1 %2
+}
+
+attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "frame-pointer"="non-leaf" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+fp-armv8,+neon,+outline-atomics,+v8a,-fmv" }
\ No newline at end of file
|
if (isLegalArithImmed(C)) | ||
return {{C, P}}; | ||
if (AArch64_AM::isLogicalImmediate(C, Size) && | ||
!AArch64_AM::isLogicalImmediate(OriginalC, Size)) |
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It would be a bit more code, but could this all use AArch64_IMM::expandMOVImm(Imm, BitSize, Insn); Insn.size() == 1
? I believe that is what this is trying to achieve, and it would be more general to capture all the different ways for the immediate to be a single instruction.
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ping on this comment? @resistor
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I've long since lost the context on this one, but feel free to adopt it if you want.
It would be good if the title had [AArch64][GlobalISel] too, to keep in consistent with all the other commits. The title might be a bit long too for a standard git commit. Some of it might fit better as the message. |
#76460