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AMDGPI: Rename HasExpOrExportInsts to HasExportInsts. NFC #84252
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@llvm/pr-subscribers-backend-amdgpu Author: Changpeng Fang (changpeng) ChangesFull diff: https://github.com/llvm/llvm-project/pull/84252.diff 4 Files Affected:
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td
index 3942354767691b..5d905f5cadc00b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.td
@@ -1881,7 +1881,7 @@ def D16PreservesUnusedBits :
def LDSRequiresM0Init : Predicate<"Subtarget->ldsRequiresM0Init()">;
def NotLDSRequiresM0Init : Predicate<"!Subtarget->ldsRequiresM0Init()">;
-def HasExpOrExportInsts : Predicate<"Subtarget->hasExpOrExportInsts()">,
+def HasExportInsts : Predicate<"Subtarget->hasExportInsts()">,
AssemblerPredicate<(all_of (not FeatureGFX90AInsts))>;
def HasInterpInsts : Predicate<"Subtarget->hasInterpInsts()">,
diff --git a/llvm/lib/Target/AMDGPU/EXPInstructions.td b/llvm/lib/Target/AMDGPU/EXPInstructions.td
index 5e3f555e441168..cce8734b72d4a9 100644
--- a/llvm/lib/Target/AMDGPU/EXPInstructions.td
+++ b/llvm/lib/Target/AMDGPU/EXPInstructions.td
@@ -58,12 +58,12 @@ class EXP_Real_Row<string pseudo, int subtarget, string name = "exp", EXP_Pseudo
// DONE variants have mayLoad = 1.
// ROW variants have an implicit use of M0.
-let SubtargetPredicate = HasExpOrExportInsts in {
+let SubtargetPredicate = HasExportInsts in {
def EXP : EXP_Pseudo<0, 0>;
def EXP_DONE : EXP_Pseudo<0, 1>;
def EXP_ROW : EXP_Pseudo<1, 0>;
def EXP_ROW_DONE : EXP_Pseudo<1, 1>;
-} // let SubtargetPredicate = HasExpOrExportInsts
+} // let SubtargetPredicate = HasExportInsts
//===----------------------------------------------------------------------===//
// SI, VI, GFX10.
@@ -117,7 +117,7 @@ multiclass EXP_Real_gfx11 {
multiclass VEXPORT_Real_gfx12 {
defvar ps = !cast<EXP_Pseudo>(NAME);
def _gfx12 : EXP_Real_Row<NAME, SIEncodingFamily.GFX12, "export">,
- EXPe_Row, MnemonicAlias<"exp", "export">, Requires<[isGFX12Plus, HasExpOrExportInsts]> {
+ EXPe_Row, MnemonicAlias<"exp", "export">, Requires<[isGFX12Plus, HasExportInsts]> {
let AssemblerPredicate = isGFX12Only;
let DecoderNamespace = "GFX12";
let row = ps.row;
diff --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.h b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
index b6c01da7d98eb5..afe3af07dc3714 100644
--- a/llvm/lib/Target/AMDGPU/GCNSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
@@ -648,7 +648,7 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
// BUFFER/FLAT/GLOBAL_ATOMIC_ADD/MIN/MAX_F64
bool hasBufferFlatGlobalAtomicsF64() const { return hasGFX90AInsts(); }
- bool hasExpOrExportInsts() const {
+ bool hasExportInsts() const {
return !hasGFX940Insts();
}
diff --git a/llvm/lib/Target/AMDGPU/SOPInstructions.td b/llvm/lib/Target/AMDGPU/SOPInstructions.td
index e14f7f95d467a1..bccdf4b5ca6374 100644
--- a/llvm/lib/Target/AMDGPU/SOPInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SOPInstructions.td
@@ -1705,7 +1705,7 @@ let SubtargetPredicate = isGFX10Plus in {
} // End SubtargetPredicate = isGFX10Plus
let SubtargetPredicate = isGFX11Plus in {
-let OtherPredicates = [HasExpOrExportInsts] in
+let OtherPredicates = [HasExportInsts] in
def S_WAIT_EVENT : SOPP_Pseudo<"s_wait_event", (ins s16imm:$simm16),
"$simm16"> {
let hasSideEffects = 1;
@@ -1738,7 +1738,7 @@ let OtherPredicates = [HasImageInsts] in {
SOPP_Pseudo<"s_wait_bvhcnt", (ins s16imm:$simm16), "$simm16",
[(int_amdgcn_s_wait_bvhcnt timm:$simm16)]>;
} // End OtherPredicates = [HasImageInsts].
-let OtherPredicates = [HasExpOrExportInsts] in
+let OtherPredicates = [HasExportInsts] in
def S_WAIT_EXPCNT :
SOPP_Pseudo<"s_wait_expcnt", (ins s16imm:$simm16), "$simm16",
[(int_amdgcn_s_wait_expcnt timm:$simm16)]>;
|
rampitec
approved these changes
Mar 6, 2024
You can test this locally with the following command:git-clang-format --diff 96813de52d09d983d14a30ef5e2b4b8658f8e952 38597209bf26d1584ab661b9c0a8ee36b71d9ef6 -- llvm/lib/Target/AMDGPU/GCNSubtarget.h View the diff from clang-format here.diff --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.h b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
index afe3af07dc..d5b95d0f3b 100644
--- a/llvm/lib/Target/AMDGPU/GCNSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
@@ -648,9 +648,7 @@ public:
// BUFFER/FLAT/GLOBAL_ATOMIC_ADD/MIN/MAX_F64
bool hasBufferFlatGlobalAtomicsF64() const { return hasGFX90AInsts(); }
- bool hasExportInsts() const {
- return !hasGFX940Insts();
- }
+ bool hasExportInsts() const { return !hasGFX940Insts(); }
bool hasInterpInsts() const {
return GFX11Insts;
|
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