[Spirv][HLSL] Add OpAll lowering and float vec support

[farzonl]

The main point of this change was to add support for HLSL's all intrinsic.
In the process of doing that I found a few issues around creating an OpConstantComposite via buildZerosVal.

First the current code didn't support floats so the process of adding buildZerosValF meant I needed a
float version of getOrCreateIntConstVector. After doing so I renamed both versions to getOrCreateConstVector. That meant I needed to create a float type version of getOrCreateIntCompositeOrNull. Luckily the type information was low for this function so was able to split it out into a helpwe and rename getOrCreateIntCompositeOrNull to getOrCreateCompositeOrNull With the exception of type handling differences of the code and Null vs 0 Constant Op codes these functions should be identical.

To handle scalar floats I could not use buildConstantFP like this PR did: 0a2aaab5aba46#diff-733a189c5a8c3211f3a04fd6e719952a3fa231eadd8a7f11e6ecf1e584d57411R1603 because that would create too many superfluous registers (that causes problems in the validator), I had to create a float version of getOrCreateConstInt which I called getOrCreateConstFP.
similar problems with doing it like this: https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp#L1540.

buildZerosValF also has a use of a function getZeroFP. This is because half, float, and double scalar values of 0 would collide in SPIRVDuplicatesTracker<Constant> CT if you use APFloat(0.0f).

getORCreateConstFP needed its own version of getOrCreateConstIntReg which I called getOrCreateConstFloatReg The one difference in this function is getOrCreateConstFloatReg returns a bit width so we don't have to call getScalarOrVectorBitWidth twice ie when it is used again in getOrCreateConstFP for OpConstantF addNumImm.

getOrCreateConstFloatReg needed an assignFloatTypeToVReg helper which called a getOrCreateSPIRVFloatType helper. There was no equivalent IntegerType::get for floats so I handled this with a switch statement on bit widths to get the right LLVM float type.

Finally, there is the use of bool ZeroAsNull = STI.isOpenCLEnv(); This is partly a cosmetic change. When Zeros are treated as nulls, we don't create OpConstantComposite vectors which is something we do in the DXCs SPIRV backend. The DXC SPIRV backend also does not use OpConstantNull. Finally, I needed a means to test the behavior of the OpConstantNull and OpConstantComposite changes and this was one way I could do that via the same tests.

[VyacheslavLevytskyy]

LGTM, thank you @farzonl

[coopp]

Looks good to me. I am still getting used to seeing 'unsigned' being used without a type being specified.