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[InstCombine] Propagate exact flags in shift-combine transforms #88340

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@AtariDreams AtariDreams commented Apr 11, 2024

There were a couple of places where we could propagate exact flags but did not.
This patch addresses some of those places.

Alive 2 Proofs:
https://alive2.llvm.org/ce/z/vmoZrX
https://alive2.llvm.org/ce/z/9zxKKA
https://alive2.llvm.org/ce/z/HJebVu
https://alive2.llvm.org/ce/z/96ez9n

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llvmbot commented Apr 11, 2024

@llvm/pr-subscribers-llvm-transforms

Author: AtariDreams (AtariDreams)

Changes

Full diff: https://github.com/llvm/llvm-project/pull/88340.diff

1 Files Affected:

  • (modified) llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp (+12-5)
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
index 95aa2119e2d88b..4c3f8b474745fd 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
@@ -1332,7 +1332,7 @@ Instruction *InstCombinerImpl::visitLShr(BinaryOperator &I) {
     if (match(Op0,
               m_OneUse(m_c_Add(m_OneUse(m_Shl(m_Value(X), m_Specific(Op1))),
                                m_Value(Y))))) {
-      Value *NewLshr = Builder.CreateLShr(Y, Op1);
+      Value *NewLshr = Builder.CreateLShr(Y, Op1, "", I.isExact());
       Value *NewAdd = Builder.CreateAdd(NewLshr, X);
       unsigned Op1Val = C->getLimitedValue(BitWidth);
       APInt Bits = APInt::getLowBitsSet(BitWidth, BitWidth - Op1Val);
@@ -1395,11 +1395,17 @@ Instruction *InstCombinerImpl::visitLShr(BinaryOperator &I) {
     }
 
     // (X >>u C1) >>u C --> X >>u (C1 + C)
-    if (match(Op0, m_LShr(m_Value(X), m_APInt(C1)))) {
+    Instruction *Inst;
+    if (match(Op0, m_Instruction(Inst)) &&
+        match(Inst, m_LShr(m_Value(X), m_APInt(C1)))) {
       // Oversized shifts are simplified to zero in InstSimplify.
       unsigned AmtSum = ShAmtC + C1->getZExtValue();
-      if (AmtSum < BitWidth)
-        return BinaryOperator::CreateLShr(X, ConstantInt::get(Ty, AmtSum));
+      if (AmtSum < BitWidth) {
+        auto *NewLShr =
+            BinaryOperator::CreateLShr(X, ConstantInt::get(Ty, AmtSum));
+        NewLShr->setIsExact(I.isExact() && Inst->isExact());
+        return NewLShr;
+      }
     }
 
     Instruction *TruncSrc;
@@ -1415,7 +1421,8 @@ Instruction *InstCombinerImpl::visitLShr(BinaryOperator &I) {
       // mask instruction is eliminated (and so the use check is relaxed).
       if (AmtSum < SrcWidth &&
           (TruncSrc->hasOneUse() || C1->uge(SrcWidth - BitWidth))) {
-        Value *SumShift = Builder.CreateLShr(X, AmtSum, "sum.shift");
+        Value *SumShift = Builder.CreateLShr(
+            X, AmtSum, "sum.shift", TruncSrc->isExact() && I.isExact());
         Value *Trunc = Builder.CreateTrunc(SumShift, Ty, I.getName());
 
         // If the first shift does not cover the number of bits truncated, then

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XChy commented Apr 11, 2024

Could you please please add alive2 proof for it?

@AtariDreams AtariDreams force-pushed the isExact branch 2 times, most recently from e643b35 to 75b0cab Compare April 11, 2024 02:41
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nikic commented Apr 11, 2024

@AtariDreams Your contribution behavior continues to be unacceptable, to the point that I am this close to requesting a ban from the LLVM organization for you.

Please, do not submit pull requests until you both have adequate test coverage and proofs. See https://llvm.org/docs/InstCombineContributorGuide.html for our contribution guidelines. If you want to submit a PR without these things, submit it as a draft pull request, and only mark it as ready for review when it is actually ready.

@AtariDreams AtariDreams force-pushed the isExact branch 2 times, most recently from 3e3807d to e77caf4 Compare April 11, 2024 02:54
@AtariDreams
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Could you please please add alive2 proof for it?

https://alive2.llvm.org/ce/z/kspgi5

@AtariDreams Your contribution behavior continues to be unacceptable, to the point that I am this close to requesting a ban from the LLVM organization for you.

Please, do not submit pull requests until you both have adequate test coverage and proofs. See https://llvm.org/docs/InstCombineContributorGuide.html for our contribution guidelines. If you want to submit a PR without these things, submit it as a draft pull request, and only mark it as ready for review when it is actually ready.

I apologize. I will ensure moving forward to ensure all PRs have proofs and tests.

@AtariDreams AtariDreams changed the title [InstCombine] Propagate exact flags in transformation [InstCombine] Propagate exact flags in shift-combines Apr 11, 2024
@AtariDreams AtariDreams force-pushed the isExact branch 2 times, most recently from f9c25f0 to 0c49762 Compare April 11, 2024 03:27
@goldsteinn
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NB: you duplicate your message in commit 2

@AtariDreams AtariDreams force-pushed the isExact branch 3 times, most recently from 19add43 to e5d042d Compare April 11, 2024 14:06
@AtariDreams AtariDreams changed the title [InstCombine] Propagate exact flags in shift-combines [InstCombine] Propagate exact flags in shift-combine passes Apr 11, 2024
@AtariDreams AtariDreams changed the title [InstCombine] Propagate exact flags in shift-combine passes [InstCombine] Propagate exact flags in shift-combine transforms Apr 11, 2024
@goldsteinn
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LGTM. Please wait for one more approval before pushing.

dtcxzyw added a commit to dtcxzyw/llvm-opt-benchmark that referenced this pull request Apr 11, 2024
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LGTM.

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dtcxzyw commented Apr 11, 2024

Failed Tests (1):
LLVM :: Transforms/InstCombine/shift.ll

Please update the test.

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Failed Tests (1):
LLVM :: Transforms/InstCombine/shift.ll

Please update the test.

Done!

@AtariDreams AtariDreams requested a review from nikic April 13, 2024 13:57
@AtariDreams AtariDreams force-pushed the isExact branch 4 times, most recently from 8b6c1f0 to 7d977f1 Compare April 15, 2024 20:15
%l = lshr exact i8 %x, 2
%r = lshr exact i8 %l, %y
ret i8 %r
}
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This test (and the next two) are useless in that the pattern only works if both shift amounts are constants. This does not actually trigger the fold.

llvm/test/Transforms/InstCombine/lshr.ll Show resolved Hide resolved
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github-actions bot commented Apr 19, 2024

✅ With the latest revision this PR passed the C/C++ code formatter.

@AtariDreams
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@nikic I found the cause. turns out this particular fold is entirely redundant

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I will just remove the test for this particular case because for that particular transform there needs to be some more things done.

@AtariDreams AtariDreams force-pushed the isExact branch 2 times, most recently from 40654ff to 0bd1f1c Compare April 20, 2024 23:07
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dtcxzyw commented May 11, 2024

Failed Tests (2):
LLVM :: Transforms/InstCombine/lshr.ll
LLVM :: Transforms/InstCombine/shift.ll

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6 participants