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[TableGen] New tblgen Pattern bit to disable DAG pattern imports during GISel #88382

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merged 12 commits into from
Apr 25, 2024

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@jofrn jofrn commented Apr 11, 2024

Added a new DAGISelShouldIgnore property to class Instruction in Target.td, similar to FastISelShouldIgnore. This allows one to avoid a record's DAGISel .td implementation and .inc generation.

Added a new DAGISelShouldIgnore property to class Instruction in Target.td, similar to FastISelShouldIgnore. This allows one to avoid a record's DAGISel .td implementation and .inc generation.
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@llvmbot llvmbot added the llvm:SelectionDAG SelectionDAGISel as well label Apr 11, 2024
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llvmbot commented Apr 11, 2024

@llvm/pr-subscribers-llvm-globalisel

@llvm/pr-subscribers-llvm-selectiondag

Author: None (jofrn)

Changes

Added a new DAGISelShouldIgnore property to class Instruction in Target.td, similar to FastISelShouldIgnore. This allows one to avoid a record's DAGISel .td implementation and .inc generation.


Full diff: https://github.com/llvm/llvm-project/pull/88382.diff

4 Files Affected:

  • (modified) llvm/include/llvm/Target/Target.td (+4)
  • (modified) llvm/utils/TableGen/Common/CodeGenInstruction.cpp (+1)
  • (modified) llvm/utils/TableGen/Common/CodeGenInstruction.h (+1)
  • (modified) llvm/utils/TableGen/DAGISelEmitter.cpp (+14-1)
diff --git a/llvm/include/llvm/Target/Target.td b/llvm/include/llvm/Target/Target.td
index 1f7dc6922f13e4..61dc04595b62b9 100644
--- a/llvm/include/llvm/Target/Target.td
+++ b/llvm/include/llvm/Target/Target.td
@@ -777,6 +777,10 @@ class Instruction : InstructionEncoding {
   /// SelectionDAG can.
   bit FastISelShouldIgnore = false;
 
+  /// Should DAGISel ignore this instruction. In cases where lowering may
+  /// be done elsewhere or is unneeded, DAGISel may skip over them.
+  bit DAGISelShouldIgnore = false;
+
   /// HasPositionOrder: Indicate tablegen to sort the instructions by record
   /// ID, so that instruction that is defined earlier can be sorted earlier
   /// in the assembly matching table.
diff --git a/llvm/utils/TableGen/Common/CodeGenInstruction.cpp b/llvm/utils/TableGen/Common/CodeGenInstruction.cpp
index 18a4e7b0f18b23..a76efb76bfc319 100644
--- a/llvm/utils/TableGen/Common/CodeGenInstruction.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenInstruction.cpp
@@ -465,6 +465,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R)
   isConvergent = R->getValueAsBit("isConvergent");
   hasNoSchedulingInfo = R->getValueAsBit("hasNoSchedulingInfo");
   FastISelShouldIgnore = R->getValueAsBit("FastISelShouldIgnore");
+  DAGISelShouldIgnore = R->getValueAsBit("DAGISelShouldIgnore");
   variadicOpsAreDefs = R->getValueAsBit("variadicOpsAreDefs");
   isAuthenticated = R->getValueAsBit("isAuthenticated");
 
diff --git a/llvm/utils/TableGen/Common/CodeGenInstruction.h b/llvm/utils/TableGen/Common/CodeGenInstruction.h
index b658259b4892ee..c36bfba245f66b 100644
--- a/llvm/utils/TableGen/Common/CodeGenInstruction.h
+++ b/llvm/utils/TableGen/Common/CodeGenInstruction.h
@@ -282,6 +282,7 @@ class CodeGenInstruction {
   bool isConvergent : 1;
   bool hasNoSchedulingInfo : 1;
   bool FastISelShouldIgnore : 1;
+  bool DAGISelShouldIgnore : 1;
   bool hasChain : 1;
   bool hasChain_Inferred : 1;
   bool variadicOpsAreDefs : 1;
diff --git a/llvm/utils/TableGen/DAGISelEmitter.cpp b/llvm/utils/TableGen/DAGISelEmitter.cpp
index b43a8e659dd9c5..4fbeafdc2355fb 100644
--- a/llvm/utils/TableGen/DAGISelEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelEmitter.cpp
@@ -165,8 +165,21 @@ void DAGISelEmitter::run(raw_ostream &OS) {
   // Add all the patterns to a temporary list so we can sort them.
   Records.startTimer("Sort patterns");
   std::vector<const PatternToMatch *> Patterns;
-  for (const PatternToMatch &PTM : CGP.ptms())
+  for (const PatternToMatch &PTM : CGP.ptms()) {
+
+    // Disable import of patterns marked as ignore.
+    const TreePatternNode &Dst = PTM.getDstPattern();
+    if (!Dst.isLeaf()) {
+      const Record *Op = Dst.getOperator();
+      const bool shouldIgnore =
+          Op->isSubClassOf("Instruction") &&
+          CGP.getTargetInfo().getInstruction(Op).DAGISelShouldIgnore;
+      if (shouldIgnore)
+        continue;
+    }
+
     Patterns.push_back(&PTM);
+  }
 
   // We want to process the matches in order of minimal cost.  Sort the patterns
   // so the least cost one is at the start.

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could you add a test?

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Should add a test that a warning isn't produced on the use

This test ensures no .inc code is generated in the MatcherTable for the corresponding marked .td record.
llvm/utils/TableGen/DAGISelEmitter.cpp Outdated Show resolved Hide resolved
llvm/include/llvm/Target/Target.td Outdated Show resolved Hide resolved
…ble pattern imports in GISel

Via `let ISelShouldIgnore = 1`, a Pattern record can be disabled to skip pattern warnings in GlobalISel.
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github-actions bot commented Apr 18, 2024

✅ With the latest revision this PR passed the C/C++ code formatter.

@jofrn jofrn changed the title [TableGen] New tblgen Instruction bit to disable DAGISel pattern imports [TableGen] New tblgen Pattern bit to disable DAGISel pattern imports Apr 18, 2024
@jofrn jofrn force-pushed the dagisel-shouldignore branch 2 times, most recently from 4a727fb to ea98c36 Compare April 19, 2024 01:03
llvm/utils/TableGen/GlobalISelEmitter.cpp Outdated Show resolved Hide resolved
llvm/utils/TableGen/DAGISelEmitter.cpp Outdated Show resolved Hide resolved
@jofrn jofrn changed the title [TableGen] New tblgen Pattern bit to disable DAGISel pattern imports [TableGen] New tblgen Pattern bit to disable GISel pattern imports Apr 19, 2024
This test ensures the MatchTable has no patterns marked with GISelShouldIgnore.
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LGTM with one nit. I'd wait to see if @arsenm and @Pierre-vh have more comments.

@@ -1979,6 +1979,7 @@ class Pattern<dag patternToMatch, list<dag> resultInstrs> {
list<dag> ResultInstrs = resultInstrs;
list<Predicate> Predicates = []; // See class Instruction in Target.td.
int AddedComplexity = 0; // See class Instruction in Target.td.
bit GISelShouldIgnore = 0;
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alignment

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It is aligned around the '=', rather than shifting everyone over.

@jofrn jofrn force-pushed the dagisel-shouldignore branch 3 times, most recently from 735d803 to 393073f Compare April 19, 2024 15:58
@jofrn jofrn changed the title [TableGen] New tblgen Pattern bit to disable GISel pattern imports [TableGen] New tblgen Pattern bit to disable DAG pattern imports during GISel Apr 19, 2024
The intended usage of ShouldIgnore is to disable warnings. This test
checks the .inc Emitter output of GISel only. So we can remove it here.
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One nit but I also have a concern with how the bit is handled

llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp Outdated Show resolved Hide resolved
llvm/test/TableGen/GlobalISelEmitterSkippedPatterns.td Outdated Show resolved Hide resolved
@jofrn jofrn merged commit eae7554 into llvm:main Apr 25, 2024
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