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[TableGen] New tblgen Pattern bit to disable DAG pattern imports during GISel #88382
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Added a new DAGISelShouldIgnore property to class Instruction in Target.td, similar to FastISelShouldIgnore. This allows one to avoid a record's DAGISel .td implementation and .inc generation.
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@llvm/pr-subscribers-llvm-globalisel @llvm/pr-subscribers-llvm-selectiondag Author: None (jofrn) ChangesAdded a new DAGISelShouldIgnore property to class Instruction in Target.td, similar to FastISelShouldIgnore. This allows one to avoid a record's DAGISel .td implementation and .inc generation. Full diff: https://github.com/llvm/llvm-project/pull/88382.diff 4 Files Affected:
diff --git a/llvm/include/llvm/Target/Target.td b/llvm/include/llvm/Target/Target.td
index 1f7dc6922f13e4..61dc04595b62b9 100644
--- a/llvm/include/llvm/Target/Target.td
+++ b/llvm/include/llvm/Target/Target.td
@@ -777,6 +777,10 @@ class Instruction : InstructionEncoding {
/// SelectionDAG can.
bit FastISelShouldIgnore = false;
+ /// Should DAGISel ignore this instruction. In cases where lowering may
+ /// be done elsewhere or is unneeded, DAGISel may skip over them.
+ bit DAGISelShouldIgnore = false;
+
/// HasPositionOrder: Indicate tablegen to sort the instructions by record
/// ID, so that instruction that is defined earlier can be sorted earlier
/// in the assembly matching table.
diff --git a/llvm/utils/TableGen/Common/CodeGenInstruction.cpp b/llvm/utils/TableGen/Common/CodeGenInstruction.cpp
index 18a4e7b0f18b23..a76efb76bfc319 100644
--- a/llvm/utils/TableGen/Common/CodeGenInstruction.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenInstruction.cpp
@@ -465,6 +465,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R)
isConvergent = R->getValueAsBit("isConvergent");
hasNoSchedulingInfo = R->getValueAsBit("hasNoSchedulingInfo");
FastISelShouldIgnore = R->getValueAsBit("FastISelShouldIgnore");
+ DAGISelShouldIgnore = R->getValueAsBit("DAGISelShouldIgnore");
variadicOpsAreDefs = R->getValueAsBit("variadicOpsAreDefs");
isAuthenticated = R->getValueAsBit("isAuthenticated");
diff --git a/llvm/utils/TableGen/Common/CodeGenInstruction.h b/llvm/utils/TableGen/Common/CodeGenInstruction.h
index b658259b4892ee..c36bfba245f66b 100644
--- a/llvm/utils/TableGen/Common/CodeGenInstruction.h
+++ b/llvm/utils/TableGen/Common/CodeGenInstruction.h
@@ -282,6 +282,7 @@ class CodeGenInstruction {
bool isConvergent : 1;
bool hasNoSchedulingInfo : 1;
bool FastISelShouldIgnore : 1;
+ bool DAGISelShouldIgnore : 1;
bool hasChain : 1;
bool hasChain_Inferred : 1;
bool variadicOpsAreDefs : 1;
diff --git a/llvm/utils/TableGen/DAGISelEmitter.cpp b/llvm/utils/TableGen/DAGISelEmitter.cpp
index b43a8e659dd9c5..4fbeafdc2355fb 100644
--- a/llvm/utils/TableGen/DAGISelEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelEmitter.cpp
@@ -165,8 +165,21 @@ void DAGISelEmitter::run(raw_ostream &OS) {
// Add all the patterns to a temporary list so we can sort them.
Records.startTimer("Sort patterns");
std::vector<const PatternToMatch *> Patterns;
- for (const PatternToMatch &PTM : CGP.ptms())
+ for (const PatternToMatch &PTM : CGP.ptms()) {
+
+ // Disable import of patterns marked as ignore.
+ const TreePatternNode &Dst = PTM.getDstPattern();
+ if (!Dst.isLeaf()) {
+ const Record *Op = Dst.getOperator();
+ const bool shouldIgnore =
+ Op->isSubClassOf("Instruction") &&
+ CGP.getTargetInfo().getInstruction(Op).DAGISelShouldIgnore;
+ if (shouldIgnore)
+ continue;
+ }
+
Patterns.push_back(&PTM);
+ }
// We want to process the matches in order of minimal cost. Sort the patterns
// so the least cost one is at the start.
|
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could you add a test?
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Should add a test that a warning isn't produced on the use
This test ensures no .inc code is generated in the MatcherTable for the corresponding marked .td record.
…ble pattern imports in GISel Via `let ISelShouldIgnore = 1`, a Pattern record can be disabled to skip pattern warnings in GlobalISel.
✅ With the latest revision this PR passed the C/C++ code formatter. |
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This test ensures the MatchTable has no patterns marked with GISelShouldIgnore.
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LGTM with one nit. I'd wait to see if @arsenm and @Pierre-vh have more comments.
@@ -1979,6 +1979,7 @@ class Pattern<dag patternToMatch, list<dag> resultInstrs> { | |||
list<dag> ResultInstrs = resultInstrs; | |||
list<Predicate> Predicates = []; // See class Instruction in Target.td. | |||
int AddedComplexity = 0; // See class Instruction in Target.td. | |||
bit GISelShouldIgnore = 0; |
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alignment
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It is aligned around the '=', rather than shifting everyone over.
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The intended usage of ShouldIgnore is to disable warnings. This test checks the .inc Emitter output of GISel only. So we can remove it here.
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One nit but I also have a concern with how the bit is handled
@jofrn Congratulations on having your first Pull Request (PR) merged into the LLVM Project! Your changes will be combined with recent changes from other authors, then tested Please check whether problems have been caused by your change specifically, as How to do this, and the rest of the post-merge process, is covered in detail here. If your change does cause a problem, it may be reverted, or you can revert it yourself. If you don't get any reports, no action is required from you. Your changes are working as expected, well done! |
Added a new DAGISelShouldIgnore property to class Instruction in Target.td, similar to FastISelShouldIgnore. This allows one to avoid a record's DAGISel .td implementation and .inc generation.