AMDGPU: Pre-commit test to verify mode change in fp constrained operations

[abhigargrepo]

This test will check the mode register in case of constrained floating point operations.

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[llvmbot]

@llvm/pr-subscribers-backend-amdgpu

Author: Abhinav Garg (abhigargrepo)

Changes

This test will check the mode register in case of constrained floating point operations.

---

Full diff: https://github.com/llvm/llvm-project/pull/88858.diff

1 Files Affected:

• (added) llvm/test/CodeGen/AMDGPU/mode-register-fpconstrain.mir (+36)

diff --git a/llvm/test/CodeGen/AMDGPU/mode-register-fpconstrain.mir b/llvm/test/CodeGen/AMDGPU/mode-register-fpconstrain.mir
new file mode 100644
index 00000000000000..fe4912c2e84cf6
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/mode-register-fpconstrain.mir
@@ -0,0 +1,36 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=si-mode-register -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s
+
+# The si-mode-register pass is changing the default mode for FP constrained  operations.
+# It must ignore strictfp functions.
+
+--- |
+  define void @ignoreStrictFpFns() #0 {
+    ret void
+  }
+
+  attributes #0 = { strictfp }
+
+...
+---
+name:            ignoreStrictFpFns
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
+    ; GCN-LABEL: name: ignoreStrictFpFns
+    ; GCN: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
+    ; GCN-NEXT: {{  $}}
+    ; GCN-NEXT: S_WAITCNT 0
+    ; GCN-NEXT: S_SETREG_IMM32_B32_mode 1, 2177, implicit-def dead $mode, implicit $mode
+    ; GCN-NEXT: S_SETREG_IMM32_B32 0, 129, implicit-def $mode, implicit $mode
+    ; GCN-NEXT: renamable $vgpr0_vgpr1 = nofpexcept V_ADD_F64_e64 0, killed $vgpr0_vgpr1, 0, killed $vgpr2_vgpr3, 0, 0, implicit $mode, implicit $exec
+    ; GCN-NEXT: S_SETREG_IMM32_B32_mode 0, 2177, implicit-def dead $mode, implicit $mode
+    ; GCN-NEXT: S_SETPC_B64_return undef $sgpr30_sgpr31, implicit killed $vgpr0, implicit killed $vgpr1
+    S_WAITCNT 0
+    S_SETREG_IMM32_B32_mode 1, 2177, implicit-def dead $mode, implicit $mode
+    renamable $vgpr0_vgpr1 = nofpexcept V_ADD_F64_e64 0, killed $vgpr0_vgpr1, 0, killed $vgpr2_vgpr3, 0, 0, implicit $mode, implicit $exec
+    S_SETREG_IMM32_B32_mode 0, 2177, implicit-def dead $mode, implicit $mode
+    S_SETPC_B64_return undef $sgpr30_sgpr31, implicit killed $vgpr0, implicit killed $vgpr1
+
+...

[arsenm]

This can be an IR test. Commit message should also be more specific

[arsenm]

Patch title should be made more specific for what this is a test for

[arsenm]

Not the most realistic source value but ok

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