[PowerPC] ANDI_rec_1_* should define CR0

[bzEq]

These pseudo instructions finally copy the result to CR0 so they should define CR0 in their definitions.

[llvmbot]

@llvm/pr-subscribers-backend-powerpc

Author: Kai Luo (bzEq)

Changes

These pseudo instructions finally copy the result to CR0 so they should define CR0 in their definitions.

---

Full diff: https://github.com/llvm/llvm-project/pull/89034.diff

1 Files Affected:

• (modified) llvm/lib/Target/PowerPC/PPCInstrInfo.td (+2)

diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
index 6423e692d88c37..454428e83084b9 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -4189,6 +4189,7 @@ def : Pat<(v4i32 (selectcc i1:$lhs, i1:$rhs, v4i32:$tval, v4i32:$fval, SETUGT)),
 def : Pat<(v4i32 (selectcc i1:$lhs, i1:$rhs, v4i32:$tval, v4i32:$fval, SETNE)),
           (SELECT_VRRC (CRXOR $lhs, $rhs), $tval, $fval)>;
 
+let Defs = [CR0] in {
 def ANDI_rec_1_EQ_BIT : PPCCustomInserterPseudo<(outs crbitrc:$dst), (ins gprc:$in),
                              "#ANDI_rec_1_EQ_BIT",
                              [(set i1:$dst, (trunc (not i32:$in)))]>;
@@ -4202,6 +4203,7 @@ def ANDI_rec_1_EQ_BIT8 : PPCCustomInserterPseudo<(outs crbitrc:$dst), (ins g8rc:
 def ANDI_rec_1_GT_BIT8 : PPCCustomInserterPseudo<(outs crbitrc:$dst), (ins g8rc:$in),
                               "#ANDI_rec_1_GT_BIT8",
                               [(set i1:$dst, (trunc i64:$in))]>;
+}
 
 def : Pat<(i1 (not (trunc i32:$in))),
            (ANDI_rec_1_EQ_BIT $in)>;

[chenzheng1030]

LGTM. Thanks for catching this.

Maybe we can also check the lines here https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/PowerPC/PPCISelLowering.h#L256-L261