Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[Hexagon] Add Hexagon Copy Hoisting pass #89313

Merged
merged 5 commits into from
Apr 27, 2024
Merged

[Hexagon] Add Hexagon Copy Hoisting pass #89313

merged 5 commits into from
Apr 27, 2024

Conversation

quic-pmacmurr
Copy link
Contributor

Adds the HexagonCopyHoisting pass, which moves a common copy instruction into a basic block if it is present in all successor basic blocks.

The purpose of this pass is to move the common copy instructions that
are present in all the successor of a basic block (BB) to the end of BB.

Co-authored-by: Jyotsna Verma <jverma@quicinc.com>
Copy link

Thank you for submitting a Pull Request (PR) to the LLVM Project!

This PR will be automatically labeled and the relevant teams will be
notified.

If you wish to, you can add reviewers by using the "Reviewers" section on this page.

If this is not working for you, it is probably because you do not have write
permissions for the repository. In which case you can instead tag reviewers by
name in a comment by using @ followed by their GitHub username.

If you have received no comments on your PR for a week, you can request a review
by "ping"ing the PR by adding a comment “Ping”. The common courtesy "ping" rate
is once a week. Please remember that you are asking for valuable time from other developers.

If you have further questions, they may be answered by the LLVM GitHub User Guide.

You can also ask questions in a comment on this PR, on the LLVM Discord or on the forums.

Copy link

github-actions bot commented Apr 19, 2024

✅ With the latest revision this PR passed the C/C++ code formatter.

I was running an outdated version
Copy link
Contributor

@kparzysz kparzysz left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

The comments are primarily about modernizing this code. Please use range-for loops wherever possible.


public:
static char ID;
HexagonCopyHoisting() : MachineFunctionPass(ID), MFN(0), MRI(0) {
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Use nullptr instead of 0.

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Done


// Traverse through the basic blocks again and move the COPY instructions
// that are present in all the successors of BB to BB.
bool changed = false;
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Throughout this file variable names start with a capital letter. Please keep it consistent.

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Fixed

// Traverse through the basic blocks again and move the COPY instructions
// that are present in all the successors of BB to BB.
bool changed = false;
for (auto I = po_begin(&Fn), E = po_end(&Fn); I != E; ++I) {
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Prefer to use range-for loops over iterator based loops. Most things in LLVM that have begin/end iterators also have an iterator range that you can use in a range-for loop.

Here specifically that would be for (MachineBasicBlock *BB : post_order(&Fn)), then you'd need to use BB-> instead of BB. in the body.

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Fixed

MachineFunction *MFN;
MachineRegisterInfo *MRI;
StringMap<MachineInstr *> CopyMI;
std::vector<StringMap<MachineInstr *>> CopyMIList;
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

It would be more efficient to use a DenseMap with the key being a pair of registers:

DenseMap<std::pair<Register, Register>, MachineInstr *>

but it's up to you.

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I agree; done

Comment on lines 127 to 128
for (auto BI = MFN->begin(), BE = MFN->end(); BI != BE; ++BI) {
MachineBasicBlock *BB = &*BI;
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Range-for:

for (MachineBasicBlock &BB : *MFN)

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Fixed

Comment on lines 254 to 257
MachineInstr *otherMI = &*MII;
for (MachineInstr::mop_iterator Mo = otherMI->operands_begin(),
E = otherMI->operands_end();
Mo != E; ++Mo)
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Same as above.

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Fixed

}

void HexagonCopyHoisting::moveCopyInstr(MachineBasicBlock *DestBB,
StringRef key, MachineInstr *MI) {
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Key

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Fixed


addMItoCopyList(MI);
auto I = ++(DestBB->succ_begin()), E = DestBB->succ_end();
for (; I != E; ++I) {
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

for (auto I = std::next(DestBB->succ_begin()), E = DestBB->end(); ++I)

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Fixed

Comment on lines 146 to 147
unsigned DstReg = MI->getOperand(0).getReg();
unsigned SrcReg = MI->getOperand(1).getReg();
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

MachineOperand::getReg() now returns Register, not unsigned. Please see llvm/include/llvm/CodeGen/Register.h.

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Fixed

MRI->getRegClass(SrcReg) != &Hexagon::IntRegsRegClass)
return;

StringRef key;
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Key

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Fixed

Copy link
Contributor

@kparzysz kparzysz left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

LGTM with a few final comments.

Comment on lines 153 to 157
StringRef Key;
SmallString<256> TmpData("");
(void)Twine(Register::virtReg2Index(DstReg)).toStringRef(TmpData);
TmpData += '=';
Key = Twine(Register::virtReg2Index(SrcReg)).toStringRef(TmpData);
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

This is no longer needed.

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Removed

#include "HexagonTargetMachine.h"
#include "llvm/ADT/PostOrderIterator.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/StringMap.h"
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I think this include can be removed (replaced with include of DenseMap.h). DenseMap.h seems to be included indirectly by some other header file, but it's a good idea to include it directly (in case something changes in that other header file).

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Fixed


MachineFunction *MFN;
MachineRegisterInfo *MRI;
StringMap<MachineInstr *> CopyMI;
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

This seems unused now.

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Removed

@iajbar iajbar merged commit cb508a0 into llvm:main Apr 27, 2024
3 checks passed
Copy link

@quic-pmacmurr Congratulations on having your first Pull Request (PR) merged into the LLVM Project!

Your changes will be combined with recent changes from other authors, then tested
by our build bots. If there is a problem with a build, you may receive a report in an email or a comment on this PR.

Please check whether problems have been caused by your change specifically, as
the builds can include changes from many authors. It is not uncommon for your
change to be included in a build that fails due to someone else's changes, or
infrastructure issues.

How to do this, and the rest of the post-merge process, is covered in detail here.

If your change does cause a problem, it may be reverted, or you can revert it yourself.
This is a normal part of LLVM development. You can fix your changes and open a new PR to merge them again.

If you don't get any reports, no action is required from you. Your changes are working as expected, well done!

@mikaelholmen
Copy link
Collaborator

Hello @quic-pmacmurr @iajbar and others,

If you run the new testcase

 test/CodeGen/Hexagon/hexagon-copy-hoisting.mir

with verifiers on like:

llc -verify-machineinstrs -march=hexagon -run-pass hexagon-move-phicopy -o - test/CodeGen/Hexagon/hexagon-copy-hoisting.mir

then you get a whole bunch of complaints:

# After Hexagon Copy Hoisting
********** INTERVALS **********
R0 [0B,32r:0) 0@0B-phi
R1 [0B,16r:0)[144r,144d:2)[208r,208d:1) 0@0B-phi 1@208r 2@144r
%0 [32r,128B:0)[176B,192r:0) 0@32r  weight:0.000000e+00
%1 [16r,80r:0) 0@16r  weight:0.000000e+00
%2 [48r,64r:0) 0@48r  weight:0.000000e+00
%3 [64r,96r:0) 0@64r  weight:0.000000e+00
%4 [80r,144r:0)[176B,208r:0) 0@80r  weight:0.000000e+00
%5 [192r,192d:0) 0@192r  weight:0.000000e+00
RegMasks:
********** MACHINEINSTRS **********
# Machine code for function f0: NoPHIs, TracksLiveness
Frame Objects:
  fi#0: size=4, align=8, at location [SP]
Function Live Ins: $r0 in %0, $r1 in %1

0B	bb.0:
	; predecessors: %bb.1, %bb.2
	  successors: %bb.1(0x40000000), %bb.2(0x40000000); %bb.1(50.00%), %bb.2(50.00%)
	  liveins: $r0, $r1
16B	  %1:intregs = COPY $r1
32B	  %0:intregs = COPY $r0
48B	  %2:predregs = C2_cmpgt %0:intregs, %1:intregs
64B	  %3:predregs = C2_not %2:predregs
80B	  %4:intregs = COPY %1:intregs
96B	  J2_jumpt %3:predregs, %bb.2, implicit-def dead $pc
112B	  J2_jump %bb.1, implicit-def dead $pc

128B	bb.1:
	; predecessors: %bb.0
	  successors: %bb.0(0x80000000); %bb.0(100.00%)

144B	  $r1 = COPY %4:intregs
160B	  J2_jump %bb.0, implicit-def dead $pc

176B	bb.2:
	; predecessors: %bb.0
	  successors: %bb.0(0x80000000); %bb.0(100.00%)

192B	  dead %5:intregs = COPY %0:intregs
208B	  $r1 = COPY %4:intregs
224B	  J2_jump %bb.0, implicit-def dead $pc

# End machine code for function f0.

*** Bad machine code: Register not marked live out of predecessor ***
- function:    f0
- basic block: %bb.1  (0x56371f809550) [128B;176B)
- liverange:   [0B,32r:0) 0@0B-phi
- regunit:     R0
- ValNo:       0 (def 0B)
 live into %bb.0@0B, not live before 176B

*** Bad machine code: Register not marked live out of predecessor ***
- function:    f0
- basic block: %bb.2  (0x56371f809650) [176B;240B)
- liverange:   [0B,32r:0) 0@0B-phi
- regunit:     R0
- ValNo:       0 (def 0B)
 live into %bb.0@0B, not live before 240B

*** Bad machine code: Register not marked live out of predecessor ***
- function:    f0
- basic block: %bb.1  (0x56371f809550) [128B;176B)
- liverange:   [0B,16r:0)[144r,144d:2)[208r,208d:1) 0@0B-phi 1@208r 2@144r
- regunit:     R1
- ValNo:       0 (def 0B)
 live into %bb.0@0B, not live before 176B

*** Bad machine code: Register not marked live out of predecessor ***
- function:    f0
- basic block: %bb.2  (0x56371f809650) [176B;240B)
- liverange:   [0B,16r:0)[144r,144d:2)[208r,208d:1) 0@0B-phi 1@208r 2@144r
- regunit:     R1
- ValNo:       0 (def 0B)
 live into %bb.0@0B, not live before 240B
LLVM ERROR: Found 4 machine code errors.

(I noticed this when I ran lit tests after compiling with EXPENSIVE_CHECKS on. But as you see above you can reproduce just by adding -verify-machineinstrs to the llc command)

@quic-pmacmurr
Copy link
Contributor Author

Hi @mikaelholmen, thank you for bringing this to my attention. I have fixed the test case in a new PR: #90740

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

None yet

4 participants