Revert "[MC] Rename temporary symbols of empty name to ".L0 "" #90002
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This reverts commit 96c45a7.
joker-eph
added
the
skip-precommit-approval
joker-eph
deleted the
revert-89693-users/MaskRay/spr/mc-rename-temporary-symbols-of-empty-name-to-l0
branch
llvmbot
added
lld
backend:RISC-V
debuginfo
mc
|
@llvm/pr-subscribers-lld-elf @llvm/pr-subscribers-mc Author: Mehdi Amini (joker-eph) ChangesReverts llvm/llvm-project#89693 This broke the premerge bot (bolt tests failing) Full diff: https://github.com/llvm/llvm-project/pull/90002.diff 13 Files Affected:
diff --git a/lld/test/ELF/mips-eh_frame-pic.s b/lld/test/ELF/mips-eh_frame-pic.s
index c04dbdf57b08ad..a84c36b0e5ecdb 100644
--- a/lld/test/ELF/mips-eh_frame-pic.s
+++ b/lld/test/ELF/mips-eh_frame-pic.s
@@ -36,8 +36,8 @@
# RELOCS: .rel{{a?}}.eh_frame {
# ABS32-RELOCS-NEXT: 0x1C R_MIPS_32 .text
# ABS64-RELOCS-NEXT: 0x1C R_MIPS_64/R_MIPS_NONE/R_MIPS_NONE .text
-# PIC64-RELOCS-NEXT: 0x1C R_MIPS_PC32/R_MIPS_NONE/R_MIPS_NONE .L0
-# PIC32-RELOCS-NEXT: 0x1C R_MIPS_PC32 .L0
+# PIC64-RELOCS-NEXT: 0x1C R_MIPS_PC32/R_MIPS_NONE/R_MIPS_NONE <null>
+# PIC32-RELOCS-NEXT: 0x1C R_MIPS_PC32 <null>
# RELOCS-NEXT: }
# ABS64-EH-FRAME: Augmentation data: 0C
diff --git a/llvm/include/llvm/Object/ELFObjectFile.h b/llvm/include/llvm/Object/ELFObjectFile.h
index 4494d9b96189bc..1d457be93741f2 100644
--- a/llvm/include/llvm/Object/ELFObjectFile.h
+++ b/llvm/include/llvm/Object/ELFObjectFile.h
@@ -801,8 +801,9 @@ Expected<uint32_t> ELFObjectFile<ELFT>::getSymbolFlags(DataRefImpl Sym) const {
} else if (EF.getHeader().e_machine == ELF::EM_RISCV) {
if (Expected<StringRef> NameOrErr = getSymbolName(Sym)) {
StringRef Name = *NameOrErr;
- // Mark fake labels (used for label differences) and mapping symbols.
- if (Name == ".L0 " || Name.starts_with("$d") || Name.starts_with("$x"))
+ // Mark empty name symbols (used for label differences) and mapping
+ // symbols.
+ if (Name.empty() || Name.starts_with("$d") || Name.starts_with("$x"))
Result |= SymbolRef::SF_FormatSpecific;
} else {
// TODO: Actually report errors helpfully.
diff --git a/llvm/lib/MC/ELFObjectWriter.cpp b/llvm/lib/MC/ELFObjectWriter.cpp
index b8ef2654ed6e3b..005521bad6e014 100644
--- a/llvm/lib/MC/ELFObjectWriter.cpp
+++ b/llvm/lib/MC/ELFObjectWriter.cpp
@@ -725,13 +725,7 @@ void ELFWriter::computeSymbolTable(
HasLargeSectionIndex = true;
}
- // Temporary symbols generated for certain assembler features (.eh_frame,
- // .debug_line) of an empty name may be referenced by relocations due to
- // linker relaxation. Rename them to ".L0 " to match the gas fake label name
- // and allow ld/objcopy --discard-locals to discard such symbols.
StringRef Name = Symbol.getName();
- if (Name.empty())
- Name = ".L0 ";
// Sections have their own string table
if (Symbol.getType() != ELF::STT_SECTION) {
diff --git a/llvm/test/CodeGen/RISCV/fixups-diff.ll b/llvm/test/CodeGen/RISCV/fixups-diff.ll
index 84a7d18ed15068..cc1c87b1fe377f 100644
--- a/llvm/test/CodeGen/RISCV/fixups-diff.ll
+++ b/llvm/test/CodeGen/RISCV/fixups-diff.ll
@@ -27,7 +27,7 @@ entry:
; CHECK: }
; CHECK: Section {{.*}} .rela.eh_frame {
-; CHECK-NEXT: 0x1C R_RISCV_32_PCREL .L0 0x0
+; CHECK-NEXT: 0x1C R_RISCV_32_PCREL <null> 0x0
; CHECK-NEXT: }
!llvm.dbg.cu = !{!0}
diff --git a/llvm/test/DebugInfo/LoongArch/dwarf-loongarch-relocs.ll b/llvm/test/DebugInfo/LoongArch/dwarf-loongarch-relocs.ll
index d28836d560377e..d6a1d8d6e1366f 100644
--- a/llvm/test/DebugInfo/LoongArch/dwarf-loongarch-relocs.ll
+++ b/llvm/test/DebugInfo/LoongArch/dwarf-loongarch-relocs.ll
@@ -18,21 +18,21 @@
; RELOCS-BOTH: Section ({{.*}}) .rela.debug_frame {
; RELOCS-NORL-NEXT: 0x1C R_LARCH_32 .debug_frame 0x0
; RELOCS-NORL-NEXT: 0x20 R_LARCH_64 .text 0x0
-; RELOCS-ENRL-NEXT: 0x1C R_LARCH_32 .L0 0x0
-; RELOCS-ENRL-NEXT: 0x20 R_LARCH_64 .L0 0x0
-; RELOCS-ENRL-NEXT: 0x28 R_LARCH_ADD64 .L0 0x0
-; RELOCS-ENRL-NEXT: 0x28 R_LARCH_SUB64 .L0 0x0
-; RELOCS-ENRL-NEXT: 0x3F R_LARCH_ADD6 .L0 0x0
-; RELOCS-ENRL-NEXT: 0x3F R_LARCH_SUB6 .L0 0x0
+; RELOCS-ENRL-NEXT: 0x1C R_LARCH_32 <null> 0x0
+; RELOCS-ENRL-NEXT: 0x20 R_LARCH_64 <null> 0x0
+; RELOCS-ENRL-NEXT: 0x28 R_LARCH_ADD64 <null> 0x0
+; RELOCS-ENRL-NEXT: 0x28 R_LARCH_SUB64 <null> 0x0
+; RELOCS-ENRL-NEXT: 0x3F R_LARCH_ADD6 <null> 0x0
+; RELOCS-ENRL-NEXT: 0x3F R_LARCH_SUB6 <null> 0x0
; RELOCS-BOTH-NEXT: }
; RELOCS-BOTH: Section ({{.*}}) .rela.debug_line {
; RELOCS-BOTH-NEXT: 0x22 R_LARCH_32 .debug_line_str 0x0
; RELOCS-BOTH-NEXT: 0x31 R_LARCH_32 .debug_line_str 0x2
; RELOCS-BOTH-NEXT: 0x46 R_LARCH_32 .debug_line_str 0x1B
; RELOCS-NORL-NEXT: 0x4F R_LARCH_64 .text 0x0
-; RELOCS-ENRL-NEXT: 0x4F R_LARCH_64 .L0 0x0
-; RELOCS-ENRL-NEXT: 0x5F R_LARCH_ADD16 .L0 0x0
-; RELOCS-ENRL-NEXT: 0x5F R_LARCH_SUB16 .L0 0x0
+; RELOCS-ENRL-NEXT: 0x4F R_LARCH_64 <null> 0x0
+; RELOCS-ENRL-NEXT: 0x5F R_LARCH_ADD16 <null> 0x0
+; RELOCS-ENRL-NEXT: 0x5F R_LARCH_SUB16 <null> 0x0
; RELOCS-BOTH-NEXT: }
; RELOCS-BOTH-NEXT: ]
diff --git a/llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll b/llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
index 99594b5e01e955..e5de1713f4e00d 100644
--- a/llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
+++ b/llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
@@ -6,14 +6,14 @@
; Check that we actually have relocations, otherwise this is kind of pointless.
; READOBJ-RELOCS: Section ({{.*}}) .rela.debug_info {
-; READOBJ-RELOCS: 0x1B R_RISCV_ADD32 .L0 0x0
-; READOBJ-RELOCS-NEXT: 0x1B R_RISCV_SUB32 .L0 0x0
+; READOBJ-RELOCS: 0x1B R_RISCV_ADD32 <null> 0x0
+; READOBJ-RELOCS-NEXT: 0x1B R_RISCV_SUB32 <null> 0x0
; READOBJ-RELOCS: Section ({{.*}}) .rela.debug_frame {
-; READOBJ-RELOCS: 0x20 R_RISCV_ADD32 .L0 0x0
-; READOBJ-RELOCS-NEXT: 0x20 R_RISCV_SUB32 .L0 0x0
+; READOBJ-RELOCS: 0x20 R_RISCV_ADD32 <null> 0x0
+; READOBJ-RELOCS-NEXT: 0x20 R_RISCV_SUB32 <null> 0x0
; READOBJ-RELOCS: Section ({{.*}}) .rela.debug_line {
-; READOBJ-RELOCS: 0x5A R_RISCV_ADD16 .L0 0x0
-; READOBJ-RELOCS-NEXT: 0x5A R_RISCV_SUB16 .L0 0x0
+; READOBJ-RELOCS: 0x5A R_RISCV_ADD16 <null> 0x0
+; READOBJ-RELOCS-NEXT: 0x5A R_RISCV_SUB16 <null> 0x0
; Check that we can print the source, even with relocations.
; OBJDUMP-SOURCE: Disassembly of section .text:
diff --git a/llvm/test/DebugInfo/RISCV/relax-debug-frame.ll b/llvm/test/DebugInfo/RISCV/relax-debug-frame.ll
index ffef0ec2340684..f655a7c0a7ef42 100644
--- a/llvm/test/DebugInfo/RISCV/relax-debug-frame.ll
+++ b/llvm/test/DebugInfo/RISCV/relax-debug-frame.ll
@@ -4,11 +4,11 @@
; RUN: | FileCheck -check-prefix=RELAX-DWARFDUMP %s
;
; RELAX: Section ({{.*}}) .rela.eh_frame {
-; RELAX-NEXT: 0x1C R_RISCV_32_PCREL .L0 0x0
-; RELAX-NEXT: 0x30 R_RISCV_32_PCREL .L0 0x0
-; RELAX-NEXT: 0x44 R_RISCV_32_PCREL .L0 0x0
-; RELAX-NEXT: 0x48 R_RISCV_ADD32 .L0 0x0
-; RELAX-NEXT: 0x48 R_RISCV_SUB32 .L0 0x0
+; RELAX-NEXT: 0x1C R_RISCV_32_PCREL <null> 0x0
+; RELAX-NEXT: 0x30 R_RISCV_32_PCREL <null> 0x0
+; RELAX-NEXT: 0x44 R_RISCV_32_PCREL <null> 0x0
+; RELAX-NEXT: 0x48 R_RISCV_ADD32 <null> 0x0
+; RELAX-NEXT: 0x48 R_RISCV_SUB32 <null> 0x0
; RELAX-NEXT: }
; RELAX-DWARFDUMP-NOT: error: failed to compute relocation
diff --git a/llvm/test/DebugInfo/Symbolize/ELF/riscv-temporary-symbol.s b/llvm/test/DebugInfo/Symbolize/ELF/riscv-empty-name-symbol.s
similarity index 71%
rename from llvm/test/DebugInfo/Symbolize/ELF/riscv-temporary-symbol.s
rename to llvm/test/DebugInfo/Symbolize/ELF/riscv-empty-name-symbol.s
index 0b54f104ab953e..1e0fa8a3061830 100644
--- a/llvm/test/DebugInfo/Symbolize/ELF/riscv-temporary-symbol.s
+++ b/llvm/test/DebugInfo/Symbolize/ELF/riscv-empty-name-symbol.s
@@ -1,11 +1,10 @@
# REQUIRES: riscv-registered-target
-## Ignore .L0 symbols that are generated by LLVM integrated assembler and GNU
-## assembler for .debug_line/.eh_frame related assembler directives.
+## Ignore empty name symbols.
# RUN: llvm-mc -filetype=obj -triple=riscv64 %s -o %t
# RUN: llvm-readelf -s %t | FileCheck %s --check-prefix=SYM
-# SYM: 0000000000000004 0 NOTYPE LOCAL DEFAULT [[#]] .L0 {{$}}
+# SYM: 0000000000000004 0 NOTYPE LOCAL DEFAULT [[#]] {{$}}
# SYM: 0000000000000000 0 NOTYPE GLOBAL DEFAULT [[#]] foo
## Make sure we test at an address larger than or equal to an empty name symbol.
diff --git a/llvm/test/ExecutionEngine/JITLink/RISCV/anonymous_symbol.s b/llvm/test/ExecutionEngine/JITLink/RISCV/anonymous_symbol.s
index e7114e4d643c6f..a5038022dfe0c3 100644
--- a/llvm/test/ExecutionEngine/JITLink/RISCV/anonymous_symbol.s
+++ b/llvm/test/ExecutionEngine/JITLink/RISCV/anonymous_symbol.s
@@ -7,7 +7,7 @@
# the section start and section end. So that by relocating these symbol, the section length
# can be calculated.
#
-# CHECK: Creating defined graph symbol for ELF symbol ".L0 "
+# CHECK: Creating defined graph symbol for ELF symbol ""
# CHECK: Creating defined graph symbol for ELF symbol "main"
.text
.globl main
diff --git a/llvm/test/MC/ELF/RISCV/gen-dwarf.s b/llvm/test/MC/ELF/RISCV/gen-dwarf.s
index 34d02f5da44f29..342ed1cc0e7ef9 100644
--- a/llvm/test/MC/ELF/RISCV/gen-dwarf.s
+++ b/llvm/test/MC/ELF/RISCV/gen-dwarf.s
@@ -40,28 +40,28 @@
# CHECK-NEXT: 0x00000020: [DW_RLE_end_of_list ]
# RELOC: Section ([[#]]) .rela.eh_frame {
-# RELOC-NEXT: 0x1C R_RISCV_32_PCREL .L0 0x0
-# RELOC-NEXT: 0x20 R_RISCV_ADD32 .L0 0x0
-# RELOC-NEXT: 0x20 R_RISCV_SUB32 .L0 0x0
-# RELOC-NEXT: 0x25 R_RISCV_SET6 .L0 0x0
-# RELOC-NEXT: 0x25 R_RISCV_SUB6 .L0 0x0
-# RELOC-NEXT: 0x34 R_RISCV_32_PCREL .L0 0x0
+# RELOC-NEXT: 0x1C R_RISCV_32_PCREL <null> 0x0
+# RELOC-NEXT: 0x20 R_RISCV_ADD32 <null> 0x0
+# RELOC-NEXT: 0x20 R_RISCV_SUB32 <null> 0x0
+# RELOC-NEXT: 0x25 R_RISCV_SET6 <null> 0x0
+# RELOC-NEXT: 0x25 R_RISCV_SUB6 <null> 0x0
+# RELOC-NEXT: 0x34 R_RISCV_32_PCREL <null> 0x0
# RELOC-NEXT: }
# RELOC: Section ([[#]]) .rela.debug_rnglists {
# RELOC-NEXT: 0xD R_RISCV_64 .text.foo 0x0
-# RELOC-NEXT: 0x15 R_RISCV_SET_ULEB128 .L0 0x0
+# RELOC-NEXT: 0x15 R_RISCV_SET_ULEB128 <null> 0x0
# RELOC-NEXT: 0x15 R_RISCV_SUB_ULEB128 .text.foo 0x0
# RELOC-NEXT: 0x17 R_RISCV_64 .text.bar 0x0
# RELOC-NEXT: }
# RELOC: Section ([[#]]) .rela.debug_line {
-# RELOC: R_RISCV_ADD16 .L0 0x0
-# RELOC-NEXT: R_RISCV_SUB16 .L0 0x0
-# RELOC-NEXT: R_RISCV_ADD16 .L0 0x0
-# RELOC-NEXT: R_RISCV_SUB16 .L0 0x0
-# RELOC-NEXT: R_RISCV_ADD16 .L0 0x0
-# RELOC-NEXT: R_RISCV_SUB16 .L0 0x0
+# RELOC: R_RISCV_ADD16 <null> 0x0
+# RELOC-NEXT: R_RISCV_SUB16 <null> 0x0
+# RELOC-NEXT: R_RISCV_ADD16 <null> 0x0
+# RELOC-NEXT: R_RISCV_SUB16 <null> 0x0
+# RELOC-NEXT: R_RISCV_ADD16 <null> 0x0
+# RELOC-NEXT: R_RISCV_SUB16 <null> 0x0
# RELOC: }
# RELOC: Hex dump of section '.eh_frame':
diff --git a/llvm/test/MC/RISCV/cfi-advance.s b/llvm/test/MC/RISCV/cfi-advance.s
index b99af38f553aa0..c4af390be757da 100644
--- a/llvm/test/MC/RISCV/cfi-advance.s
+++ b/llvm/test/MC/RISCV/cfi-advance.s
@@ -1,27 +1,13 @@
# RUN: llvm-mc -filetype=obj -triple riscv32 %s -o %t.o
-# RUN: llvm-readelf -sr %t.o | FileCheck %s
+# RUN: llvm-readobj -r %t.o | FileCheck -check-prefix=CHECK %s
# RUN: llvm-dwarfdump --debug-frame %t.o 2>&1 \
# RUN: | FileCheck -check-prefix=CHECK-DWARFDUMP %s
-
-# CHECK: Relocation section '.rela.text1' at offset {{.*}} contains 1 entries:
-# CHECK-NEXT: Offset Info Type Sym. Value Symbol's Name + Addend
-# CHECK-NEXT: 00000000 00000313 R_RISCV_CALL_PLT 00000004 .L0 + 0
-# CHECK-EMPTY:
-# CHECK-NEXT: Relocation section '.rela.eh_frame' at offset {{.*}} contains 3 entries:
-# CHECK: Offset Info Type Sym. Value Symbol's Name + Addend
-# CHECK-NEXT: 0000001c 00000139 R_RISCV_32_PCREL 00000000 .L0 + 0
-# CHECK-NEXT: 00000035 00000b35 R_RISCV_SET6 00010178 .L0 + 0
-# CHECK-NEXT: 00000035 00000934 R_RISCV_SUB6 0001016e .L0 + 0
-# CHECK-EMPTY:
-# CHECK: Symbol table '.symtab' contains 15 entries:
-# CHECK-NEXT: Num: Value Size Type Bind Vis Ndx Name
-# CHECK-NEXT: 0: 00000000 0 NOTYPE LOCAL DEFAULT UND
-# CHECK-NEXT: 1: 00000000 0 NOTYPE LOCAL DEFAULT 2 .L0 {{$}}
-# CHECK: 3: 00000004 0 NOTYPE LOCAL DEFAULT 2 .L0{{$}}
-# CHECK: 9: 0001016e 0 NOTYPE LOCAL DEFAULT 2 .L0 {{$}}
-# CHECK: 11: 00010178 0 NOTYPE LOCAL DEFAULT 2 .L0 {{$}}
-
+# CHECK: .rela.eh_frame {
+# CHECK-NEXT: 0x1C R_RISCV_32_PCREL <null> 0x0
+# CHECK-NEXT: 0x35 R_RISCV_SET6 <null> 0x0
+# CHECK-NEXT: 0x35 R_RISCV_SUB6 <null> 0x0
+# CHECK-NEXT: }
# CHECK-DWARFDUMP: DW_CFA_advance_loc1: 104
# CHECK-DWARFDUMP-NEXT: DW_CFA_def_cfa_offset: +8
# CHECK-DWARFDUMP-NEXT: DW_CFA_advance_loc2: 259
@@ -37,9 +23,6 @@
test:
.cfi_startproc
nop
-## This looks similar to fake label names ".L0 ". Even if this is ".L0 ",
-## the assembler will not conflate it with fake labels.
-.L0:
.zero 100, 0x90
.cfi_def_cfa_offset 8
nop
@@ -53,6 +36,3 @@ test:
.cfi_def_cfa_offset 8
nop
.cfi_endproc
-
-.section .text1,"ax"
-call .L0
diff --git a/llvm/test/MC/RISCV/fde-reloc.s b/llvm/test/MC/RISCV/fde-reloc.s
index 81ec426c8b6165..1db8929e074703 100644
--- a/llvm/test/MC/RISCV/fde-reloc.s
+++ b/llvm/test/MC/RISCV/fde-reloc.s
@@ -12,7 +12,7 @@ func:
.cfi_endproc
# CHECK: Section (4) .rela.eh_frame {
-# CHECK-NEXT: 0x1C R_RISCV_32_PCREL .L0 0x0
+# CHECK-NEXT: 0x1C R_RISCV_32_PCREL <null> 0x0
# CHECK-NEXT: }
# CHECK: Hex dump of section '.eh_frame':
# CHECK-NEXT: 0x00000000 10000000 00000000 017a5200 017c0101
diff --git a/llvm/test/MC/RISCV/scoped-relaxation.s b/llvm/test/MC/RISCV/scoped-relaxation.s
index 56394fd8053282..0b797ee5aca5eb 100644
--- a/llvm/test/MC/RISCV/scoped-relaxation.s
+++ b/llvm/test/MC/RISCV/scoped-relaxation.s
@@ -9,7 +9,7 @@
.dword function - .
# CHECK: 0x0 R_RISCV_ADD64 function 0x0
-# CHECK-NEXT: 0x0 R_RISCV_SUB64 .L0 0x0
+# CHECK-NEXT: 0x0 R_RISCV_SUB64 <null> 0x0
# Relaxed reference, this will resolve to a pair of `RISCV_ADD64` and
# `RISCV_SUB64` relocation.
@@ -19,7 +19,7 @@
.option pop
# CHECK: 0x8 R_RISCV_ADD64 function 0x0
-# CHECK-NEXT: 0x8 R_RISCV_SUB64 .L0 0x0
+# CHECK-NEXT: 0x8 R_RISCV_SUB64 <null> 0x0
# Unrelaxed reference, this will resolve to a pair of `RISCV_ADD64` and
# `RISCV_SUB64` relocation due to relaxation being sticky to the file.
@@ -29,6 +29,6 @@
.option pop
# CHECK: 0x10 R_RISCV_ADD64 function 0x0
-# CHECK-NEXT: 0x10 R_RISCV_SUB64 .L0 0x0
+# CHECK-NEXT: 0x10 R_RISCV_SUB64 <null> 0x0
# CHECK: }
|
|
@llvm/pr-subscribers-backend-risc-v Author: Mehdi Amini (joker-eph) ChangesReverts llvm/llvm-project#89693 This broke the premerge bot (bolt tests failing) Full diff: https://github.com/llvm/llvm-project/pull/90002.diff 13 Files Affected:
diff --git a/lld/test/ELF/mips-eh_frame-pic.s b/lld/test/ELF/mips-eh_frame-pic.s
index c04dbdf57b08ad..a84c36b0e5ecdb 100644
--- a/lld/test/ELF/mips-eh_frame-pic.s
+++ b/lld/test/ELF/mips-eh_frame-pic.s
@@ -36,8 +36,8 @@
# RELOCS: .rel{{a?}}.eh_frame {
# ABS32-RELOCS-NEXT: 0x1C R_MIPS_32 .text
# ABS64-RELOCS-NEXT: 0x1C R_MIPS_64/R_MIPS_NONE/R_MIPS_NONE .text
-# PIC64-RELOCS-NEXT: 0x1C R_MIPS_PC32/R_MIPS_NONE/R_MIPS_NONE .L0
-# PIC32-RELOCS-NEXT: 0x1C R_MIPS_PC32 .L0
+# PIC64-RELOCS-NEXT: 0x1C R_MIPS_PC32/R_MIPS_NONE/R_MIPS_NONE <null>
+# PIC32-RELOCS-NEXT: 0x1C R_MIPS_PC32 <null>
# RELOCS-NEXT: }
# ABS64-EH-FRAME: Augmentation data: 0C
diff --git a/llvm/include/llvm/Object/ELFObjectFile.h b/llvm/include/llvm/Object/ELFObjectFile.h
index 4494d9b96189bc..1d457be93741f2 100644
--- a/llvm/include/llvm/Object/ELFObjectFile.h
+++ b/llvm/include/llvm/Object/ELFObjectFile.h
@@ -801,8 +801,9 @@ Expected<uint32_t> ELFObjectFile<ELFT>::getSymbolFlags(DataRefImpl Sym) const {
} else if (EF.getHeader().e_machine == ELF::EM_RISCV) {
if (Expected<StringRef> NameOrErr = getSymbolName(Sym)) {
StringRef Name = *NameOrErr;
- // Mark fake labels (used for label differences) and mapping symbols.
- if (Name == ".L0 " || Name.starts_with("$d") || Name.starts_with("$x"))
+ // Mark empty name symbols (used for label differences) and mapping
+ // symbols.
+ if (Name.empty() || Name.starts_with("$d") || Name.starts_with("$x"))
Result |= SymbolRef::SF_FormatSpecific;
} else {
// TODO: Actually report errors helpfully.
diff --git a/llvm/lib/MC/ELFObjectWriter.cpp b/llvm/lib/MC/ELFObjectWriter.cpp
index b8ef2654ed6e3b..005521bad6e014 100644
--- a/llvm/lib/MC/ELFObjectWriter.cpp
+++ b/llvm/lib/MC/ELFObjectWriter.cpp
@@ -725,13 +725,7 @@ void ELFWriter::computeSymbolTable(
HasLargeSectionIndex = true;
}
- // Temporary symbols generated for certain assembler features (.eh_frame,
- // .debug_line) of an empty name may be referenced by relocations due to
- // linker relaxation. Rename them to ".L0 " to match the gas fake label name
- // and allow ld/objcopy --discard-locals to discard such symbols.
StringRef Name = Symbol.getName();
- if (Name.empty())
- Name = ".L0 ";
// Sections have their own string table
if (Symbol.getType() != ELF::STT_SECTION) {
diff --git a/llvm/test/CodeGen/RISCV/fixups-diff.ll b/llvm/test/CodeGen/RISCV/fixups-diff.ll
index 84a7d18ed15068..cc1c87b1fe377f 100644
--- a/llvm/test/CodeGen/RISCV/fixups-diff.ll
+++ b/llvm/test/CodeGen/RISCV/fixups-diff.ll
@@ -27,7 +27,7 @@ entry:
; CHECK: }
; CHECK: Section {{.*}} .rela.eh_frame {
-; CHECK-NEXT: 0x1C R_RISCV_32_PCREL .L0 0x0
+; CHECK-NEXT: 0x1C R_RISCV_32_PCREL <null> 0x0
; CHECK-NEXT: }
!llvm.dbg.cu = !{!0}
diff --git a/llvm/test/DebugInfo/LoongArch/dwarf-loongarch-relocs.ll b/llvm/test/DebugInfo/LoongArch/dwarf-loongarch-relocs.ll
index d28836d560377e..d6a1d8d6e1366f 100644
--- a/llvm/test/DebugInfo/LoongArch/dwarf-loongarch-relocs.ll
+++ b/llvm/test/DebugInfo/LoongArch/dwarf-loongarch-relocs.ll
@@ -18,21 +18,21 @@
; RELOCS-BOTH: Section ({{.*}}) .rela.debug_frame {
; RELOCS-NORL-NEXT: 0x1C R_LARCH_32 .debug_frame 0x0
; RELOCS-NORL-NEXT: 0x20 R_LARCH_64 .text 0x0
-; RELOCS-ENRL-NEXT: 0x1C R_LARCH_32 .L0 0x0
-; RELOCS-ENRL-NEXT: 0x20 R_LARCH_64 .L0 0x0
-; RELOCS-ENRL-NEXT: 0x28 R_LARCH_ADD64 .L0 0x0
-; RELOCS-ENRL-NEXT: 0x28 R_LARCH_SUB64 .L0 0x0
-; RELOCS-ENRL-NEXT: 0x3F R_LARCH_ADD6 .L0 0x0
-; RELOCS-ENRL-NEXT: 0x3F R_LARCH_SUB6 .L0 0x0
+; RELOCS-ENRL-NEXT: 0x1C R_LARCH_32 <null> 0x0
+; RELOCS-ENRL-NEXT: 0x20 R_LARCH_64 <null> 0x0
+; RELOCS-ENRL-NEXT: 0x28 R_LARCH_ADD64 <null> 0x0
+; RELOCS-ENRL-NEXT: 0x28 R_LARCH_SUB64 <null> 0x0
+; RELOCS-ENRL-NEXT: 0x3F R_LARCH_ADD6 <null> 0x0
+; RELOCS-ENRL-NEXT: 0x3F R_LARCH_SUB6 <null> 0x0
; RELOCS-BOTH-NEXT: }
; RELOCS-BOTH: Section ({{.*}}) .rela.debug_line {
; RELOCS-BOTH-NEXT: 0x22 R_LARCH_32 .debug_line_str 0x0
; RELOCS-BOTH-NEXT: 0x31 R_LARCH_32 .debug_line_str 0x2
; RELOCS-BOTH-NEXT: 0x46 R_LARCH_32 .debug_line_str 0x1B
; RELOCS-NORL-NEXT: 0x4F R_LARCH_64 .text 0x0
-; RELOCS-ENRL-NEXT: 0x4F R_LARCH_64 .L0 0x0
-; RELOCS-ENRL-NEXT: 0x5F R_LARCH_ADD16 .L0 0x0
-; RELOCS-ENRL-NEXT: 0x5F R_LARCH_SUB16 .L0 0x0
+; RELOCS-ENRL-NEXT: 0x4F R_LARCH_64 <null> 0x0
+; RELOCS-ENRL-NEXT: 0x5F R_LARCH_ADD16 <null> 0x0
+; RELOCS-ENRL-NEXT: 0x5F R_LARCH_SUB16 <null> 0x0
; RELOCS-BOTH-NEXT: }
; RELOCS-BOTH-NEXT: ]
diff --git a/llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll b/llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
index 99594b5e01e955..e5de1713f4e00d 100644
--- a/llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
+++ b/llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
@@ -6,14 +6,14 @@
; Check that we actually have relocations, otherwise this is kind of pointless.
; READOBJ-RELOCS: Section ({{.*}}) .rela.debug_info {
-; READOBJ-RELOCS: 0x1B R_RISCV_ADD32 .L0 0x0
-; READOBJ-RELOCS-NEXT: 0x1B R_RISCV_SUB32 .L0 0x0
+; READOBJ-RELOCS: 0x1B R_RISCV_ADD32 <null> 0x0
+; READOBJ-RELOCS-NEXT: 0x1B R_RISCV_SUB32 <null> 0x0
; READOBJ-RELOCS: Section ({{.*}}) .rela.debug_frame {
-; READOBJ-RELOCS: 0x20 R_RISCV_ADD32 .L0 0x0
-; READOBJ-RELOCS-NEXT: 0x20 R_RISCV_SUB32 .L0 0x0
+; READOBJ-RELOCS: 0x20 R_RISCV_ADD32 <null> 0x0
+; READOBJ-RELOCS-NEXT: 0x20 R_RISCV_SUB32 <null> 0x0
; READOBJ-RELOCS: Section ({{.*}}) .rela.debug_line {
-; READOBJ-RELOCS: 0x5A R_RISCV_ADD16 .L0 0x0
-; READOBJ-RELOCS-NEXT: 0x5A R_RISCV_SUB16 .L0 0x0
+; READOBJ-RELOCS: 0x5A R_RISCV_ADD16 <null> 0x0
+; READOBJ-RELOCS-NEXT: 0x5A R_RISCV_SUB16 <null> 0x0
; Check that we can print the source, even with relocations.
; OBJDUMP-SOURCE: Disassembly of section .text:
diff --git a/llvm/test/DebugInfo/RISCV/relax-debug-frame.ll b/llvm/test/DebugInfo/RISCV/relax-debug-frame.ll
index ffef0ec2340684..f655a7c0a7ef42 100644
--- a/llvm/test/DebugInfo/RISCV/relax-debug-frame.ll
+++ b/llvm/test/DebugInfo/RISCV/relax-debug-frame.ll
@@ -4,11 +4,11 @@
; RUN: | FileCheck -check-prefix=RELAX-DWARFDUMP %s
;
; RELAX: Section ({{.*}}) .rela.eh_frame {
-; RELAX-NEXT: 0x1C R_RISCV_32_PCREL .L0 0x0
-; RELAX-NEXT: 0x30 R_RISCV_32_PCREL .L0 0x0
-; RELAX-NEXT: 0x44 R_RISCV_32_PCREL .L0 0x0
-; RELAX-NEXT: 0x48 R_RISCV_ADD32 .L0 0x0
-; RELAX-NEXT: 0x48 R_RISCV_SUB32 .L0 0x0
+; RELAX-NEXT: 0x1C R_RISCV_32_PCREL <null> 0x0
+; RELAX-NEXT: 0x30 R_RISCV_32_PCREL <null> 0x0
+; RELAX-NEXT: 0x44 R_RISCV_32_PCREL <null> 0x0
+; RELAX-NEXT: 0x48 R_RISCV_ADD32 <null> 0x0
+; RELAX-NEXT: 0x48 R_RISCV_SUB32 <null> 0x0
; RELAX-NEXT: }
; RELAX-DWARFDUMP-NOT: error: failed to compute relocation
diff --git a/llvm/test/DebugInfo/Symbolize/ELF/riscv-temporary-symbol.s b/llvm/test/DebugInfo/Symbolize/ELF/riscv-empty-name-symbol.s
similarity index 71%
rename from llvm/test/DebugInfo/Symbolize/ELF/riscv-temporary-symbol.s
rename to llvm/test/DebugInfo/Symbolize/ELF/riscv-empty-name-symbol.s
index 0b54f104ab953e..1e0fa8a3061830 100644
--- a/llvm/test/DebugInfo/Symbolize/ELF/riscv-temporary-symbol.s
+++ b/llvm/test/DebugInfo/Symbolize/ELF/riscv-empty-name-symbol.s
@@ -1,11 +1,10 @@
# REQUIRES: riscv-registered-target
-## Ignore .L0 symbols that are generated by LLVM integrated assembler and GNU
-## assembler for .debug_line/.eh_frame related assembler directives.
+## Ignore empty name symbols.
# RUN: llvm-mc -filetype=obj -triple=riscv64 %s -o %t
# RUN: llvm-readelf -s %t | FileCheck %s --check-prefix=SYM
-# SYM: 0000000000000004 0 NOTYPE LOCAL DEFAULT [[#]] .L0 {{$}}
+# SYM: 0000000000000004 0 NOTYPE LOCAL DEFAULT [[#]] {{$}}
# SYM: 0000000000000000 0 NOTYPE GLOBAL DEFAULT [[#]] foo
## Make sure we test at an address larger than or equal to an empty name symbol.
diff --git a/llvm/test/ExecutionEngine/JITLink/RISCV/anonymous_symbol.s b/llvm/test/ExecutionEngine/JITLink/RISCV/anonymous_symbol.s
index e7114e4d643c6f..a5038022dfe0c3 100644
--- a/llvm/test/ExecutionEngine/JITLink/RISCV/anonymous_symbol.s
+++ b/llvm/test/ExecutionEngine/JITLink/RISCV/anonymous_symbol.s
@@ -7,7 +7,7 @@
# the section start and section end. So that by relocating these symbol, the section length
# can be calculated.
#
-# CHECK: Creating defined graph symbol for ELF symbol ".L0 "
+# CHECK: Creating defined graph symbol for ELF symbol ""
# CHECK: Creating defined graph symbol for ELF symbol "main"
.text
.globl main
diff --git a/llvm/test/MC/ELF/RISCV/gen-dwarf.s b/llvm/test/MC/ELF/RISCV/gen-dwarf.s
index 34d02f5da44f29..342ed1cc0e7ef9 100644
--- a/llvm/test/MC/ELF/RISCV/gen-dwarf.s
+++ b/llvm/test/MC/ELF/RISCV/gen-dwarf.s
@@ -40,28 +40,28 @@
# CHECK-NEXT: 0x00000020: [DW_RLE_end_of_list ]
# RELOC: Section ([[#]]) .rela.eh_frame {
-# RELOC-NEXT: 0x1C R_RISCV_32_PCREL .L0 0x0
-# RELOC-NEXT: 0x20 R_RISCV_ADD32 .L0 0x0
-# RELOC-NEXT: 0x20 R_RISCV_SUB32 .L0 0x0
-# RELOC-NEXT: 0x25 R_RISCV_SET6 .L0 0x0
-# RELOC-NEXT: 0x25 R_RISCV_SUB6 .L0 0x0
-# RELOC-NEXT: 0x34 R_RISCV_32_PCREL .L0 0x0
+# RELOC-NEXT: 0x1C R_RISCV_32_PCREL <null> 0x0
+# RELOC-NEXT: 0x20 R_RISCV_ADD32 <null> 0x0
+# RELOC-NEXT: 0x20 R_RISCV_SUB32 <null> 0x0
+# RELOC-NEXT: 0x25 R_RISCV_SET6 <null> 0x0
+# RELOC-NEXT: 0x25 R_RISCV_SUB6 <null> 0x0
+# RELOC-NEXT: 0x34 R_RISCV_32_PCREL <null> 0x0
# RELOC-NEXT: }
# RELOC: Section ([[#]]) .rela.debug_rnglists {
# RELOC-NEXT: 0xD R_RISCV_64 .text.foo 0x0
-# RELOC-NEXT: 0x15 R_RISCV_SET_ULEB128 .L0 0x0
+# RELOC-NEXT: 0x15 R_RISCV_SET_ULEB128 <null> 0x0
# RELOC-NEXT: 0x15 R_RISCV_SUB_ULEB128 .text.foo 0x0
# RELOC-NEXT: 0x17 R_RISCV_64 .text.bar 0x0
# RELOC-NEXT: }
# RELOC: Section ([[#]]) .rela.debug_line {
-# RELOC: R_RISCV_ADD16 .L0 0x0
-# RELOC-NEXT: R_RISCV_SUB16 .L0 0x0
-# RELOC-NEXT: R_RISCV_ADD16 .L0 0x0
-# RELOC-NEXT: R_RISCV_SUB16 .L0 0x0
-# RELOC-NEXT: R_RISCV_ADD16 .L0 0x0
-# RELOC-NEXT: R_RISCV_SUB16 .L0 0x0
+# RELOC: R_RISCV_ADD16 <null> 0x0
+# RELOC-NEXT: R_RISCV_SUB16 <null> 0x0
+# RELOC-NEXT: R_RISCV_ADD16 <null> 0x0
+# RELOC-NEXT: R_RISCV_SUB16 <null> 0x0
+# RELOC-NEXT: R_RISCV_ADD16 <null> 0x0
+# RELOC-NEXT: R_RISCV_SUB16 <null> 0x0
# RELOC: }
# RELOC: Hex dump of section '.eh_frame':
diff --git a/llvm/test/MC/RISCV/cfi-advance.s b/llvm/test/MC/RISCV/cfi-advance.s
index b99af38f553aa0..c4af390be757da 100644
--- a/llvm/test/MC/RISCV/cfi-advance.s
+++ b/llvm/test/MC/RISCV/cfi-advance.s
@@ -1,27 +1,13 @@
# RUN: llvm-mc -filetype=obj -triple riscv32 %s -o %t.o
-# RUN: llvm-readelf -sr %t.o | FileCheck %s
+# RUN: llvm-readobj -r %t.o | FileCheck -check-prefix=CHECK %s
# RUN: llvm-dwarfdump --debug-frame %t.o 2>&1 \
# RUN: | FileCheck -check-prefix=CHECK-DWARFDUMP %s
-
-# CHECK: Relocation section '.rela.text1' at offset {{.*}} contains 1 entries:
-# CHECK-NEXT: Offset Info Type Sym. Value Symbol's Name + Addend
-# CHECK-NEXT: 00000000 00000313 R_RISCV_CALL_PLT 00000004 .L0 + 0
-# CHECK-EMPTY:
-# CHECK-NEXT: Relocation section '.rela.eh_frame' at offset {{.*}} contains 3 entries:
-# CHECK: Offset Info Type Sym. Value Symbol's Name + Addend
-# CHECK-NEXT: 0000001c 00000139 R_RISCV_32_PCREL 00000000 .L0 + 0
-# CHECK-NEXT: 00000035 00000b35 R_RISCV_SET6 00010178 .L0 + 0
-# CHECK-NEXT: 00000035 00000934 R_RISCV_SUB6 0001016e .L0 + 0
-# CHECK-EMPTY:
-# CHECK: Symbol table '.symtab' contains 15 entries:
-# CHECK-NEXT: Num: Value Size Type Bind Vis Ndx Name
-# CHECK-NEXT: 0: 00000000 0 NOTYPE LOCAL DEFAULT UND
-# CHECK-NEXT: 1: 00000000 0 NOTYPE LOCAL DEFAULT 2 .L0 {{$}}
-# CHECK: 3: 00000004 0 NOTYPE LOCAL DEFAULT 2 .L0{{$}}
-# CHECK: 9: 0001016e 0 NOTYPE LOCAL DEFAULT 2 .L0 {{$}}
-# CHECK: 11: 00010178 0 NOTYPE LOCAL DEFAULT 2 .L0 {{$}}
-
+# CHECK: .rela.eh_frame {
+# CHECK-NEXT: 0x1C R_RISCV_32_PCREL <null> 0x0
+# CHECK-NEXT: 0x35 R_RISCV_SET6 <null> 0x0
+# CHECK-NEXT: 0x35 R_RISCV_SUB6 <null> 0x0
+# CHECK-NEXT: }
# CHECK-DWARFDUMP: DW_CFA_advance_loc1: 104
# CHECK-DWARFDUMP-NEXT: DW_CFA_def_cfa_offset: +8
# CHECK-DWARFDUMP-NEXT: DW_CFA_advance_loc2: 259
@@ -37,9 +23,6 @@
test:
.cfi_startproc
nop
-## This looks similar to fake label names ".L0 ". Even if this is ".L0 ",
-## the assembler will not conflate it with fake labels.
-.L0:
.zero 100, 0x90
.cfi_def_cfa_offset 8
nop
@@ -53,6 +36,3 @@ test:
.cfi_def_cfa_offset 8
nop
.cfi_endproc
-
-.section .text1,"ax"
-call .L0
diff --git a/llvm/test/MC/RISCV/fde-reloc.s b/llvm/test/MC/RISCV/fde-reloc.s
index 81ec426c8b6165..1db8929e074703 100644
--- a/llvm/test/MC/RISCV/fde-reloc.s
+++ b/llvm/test/MC/RISCV/fde-reloc.s
@@ -12,7 +12,7 @@ func:
.cfi_endproc
# CHECK: Section (4) .rela.eh_frame {
-# CHECK-NEXT: 0x1C R_RISCV_32_PCREL .L0 0x0
+# CHECK-NEXT: 0x1C R_RISCV_32_PCREL <null> 0x0
# CHECK-NEXT: }
# CHECK: Hex dump of section '.eh_frame':
# CHECK-NEXT: 0x00000000 10000000 00000000 017a5200 017c0101
diff --git a/llvm/test/MC/RISCV/scoped-relaxation.s b/llvm/test/MC/RISCV/scoped-relaxation.s
index 56394fd8053282..0b797ee5aca5eb 100644
--- a/llvm/test/MC/RISCV/scoped-relaxation.s
+++ b/llvm/test/MC/RISCV/scoped-relaxation.s
@@ -9,7 +9,7 @@
.dword function - .
# CHECK: 0x0 R_RISCV_ADD64 function 0x0
-# CHECK-NEXT: 0x0 R_RISCV_SUB64 .L0 0x0
+# CHECK-NEXT: 0x0 R_RISCV_SUB64 <null> 0x0
# Relaxed reference, this will resolve to a pair of `RISCV_ADD64` and
# `RISCV_SUB64` relocation.
@@ -19,7 +19,7 @@
.option pop
# CHECK: 0x8 R_RISCV_ADD64 function 0x0
-# CHECK-NEXT: 0x8 R_RISCV_SUB64 .L0 0x0
+# CHECK-NEXT: 0x8 R_RISCV_SUB64 <null> 0x0
# Unrelaxed reference, this will resolve to a pair of `RISCV_ADD64` and
# `RISCV_SUB64` relocation due to relaxation being sticky to the file.
@@ -29,6 +29,6 @@
.option pop
# CHECK: 0x10 R_RISCV_ADD64 function 0x0
-# CHECK-NEXT: 0x10 R_RISCV_SUB64 .L0 0x0
+# CHECK-NEXT: 0x10 R_RISCV_SUB64 <null> 0x0
# CHECK: }
|
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Reverts #89693
This broke the premerge bot (bolt tests failing)