Add option -spiinfo and -spi4b

lprylli · May 24, 2022 · d6ec6ba · d6ec6ba
1 parent 05b4487
commit d6ec6ba
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Showing 3 changed files with 46 additions and 12 deletions.
diff --git a/ast/ast.go b/ast/ast.go
@@ -271,13 +271,13 @@ var spiReg = `
 
 var spiRegs = ParseRegs(spiReg)
 
-func SpiInfo() {
-	spi := Map("spi", FMC_ADDR, true, 4096)
-	chip, _ := AstInfo()
-	if chip != "2500" {
-		log.Printf("Only accept AST2500, chip=%s\n", chip)
+func (a *AstHandle) SpiInfo() {
+	spi := Map("fmc", FMC_ADDR, true, 4096)
+	if !a.Ast2500 {
+		log.Printf("Only accept AST2500\n")
 		return
 	}
+	//fmt.Printf("spiid = 0x%06x\n", fmc.spiId())
 	fmc0 := spi.Read32(0)
 	fmcA0 := spi.Read32(0xa0)
 	fmt.Printf("spi0=0x%x, writable=%d filter=%d\n", fmc0, bit(fmc0, 16), bit(fmcA0, 0))

diff --git a/ast/spi.go b/ast/spi.go
@@ -8,6 +8,8 @@ import (
 	"github.com/lprylli/hwmisc/pmem"
 )
 
+var Mode4B bool = true
+
 type Fmc struct {
 	mem        *AstMem
 	reg        pmem.Region
@@ -44,10 +46,18 @@ func (fmc *Fmc) spiXfer(out []byte, inSize int64) []byte {
 }
 
 func (fmc *Fmc) spiXferAddr(cmd byte, off uint32, extra []byte, inSize int64) []byte {
-	out := make([]byte, 5+len(extra))
-	out[0] = cmd
-	binary.BigEndian.PutUint32(out[1:], uint32(off))
-	copy(out[5:], extra)
+	var out []byte
+	if Mode4B {
+		out = make([]byte, 5+len(extra))
+		binary.BigEndian.PutUint32(out[1:], uint32(off))
+		out[0] = cmd
+		copy(out[5:], extra)
+	} else {
+		out = make([]byte, 4+len(extra))
+		binary.BigEndian.PutUint32(out[0:], uint32(off))
+		out[0] = cmd
+		copy(out[4:], extra)
+	}
 	return fmc.spiXfer(out, inSize)
 }
 
@@ -75,6 +85,9 @@ func (fmc *Fmc) spiStatus() uint8 {
 func (fmc *Fmc) spi4B() {
 	_ = fmc.spiXfer([]byte{0xB7}, 0)
 }
+func (fmc *Fmc) spi3B() {
+	_ = fmc.spiXfer([]byte{0xE9}, 0)
+}
 
 // Reads SPI-ID
 func (fmc *Fmc) spiId() uint32 {
@@ -138,18 +151,33 @@ func (a *AstHandle) FmcNew() *Fmc {
 		ce0CtlFast: 0x600,
 		Size:       32 * 1024 * 1024,
 	}
-	if id := fmc.spiId(); id != 0xc22019 {
+	id := fmc.spiId()
+	switch id {
+	case 0xc22019:
+	case 0x20ba20:
+		/* nothing */
+	case 0xc2201a:
+		fmc.Size = 64 * 1024 * 1024
+	default:
 		log.Fatalf("SpiId:0x%06x unknown!!\n", id)
 
 	}
-	fmc.reg.Write32(0x04, 0x701)
+	if Mode4B {
+		fmc.reg.Write32(0x04, 0x701)
+	} else {
+		fmc.reg.Write32(0x04, 0x700)
+	}
 	stat := fmc.spiStatus()
 	if stat&^2 != 0 {
 		log.Fatalf("SpiStatus:0x%02x\n", stat)
 	}
 	if stat&2 != 0 {
 		fmc.writeDisable()
 	}
-	fmc.spi4B()
+	if Mode4B {
+		fmc.spi4B()
+	} else {
+		fmc.spi3B()
+	}
 	return fmc
 }
diff --git a/cmds/ast/ast.go b/cmds/ast/ast.go
@@ -256,6 +256,7 @@ func doI2cMon(bus int) {
 func main() {
 	var astReset bool
 	var i2c3Speed, i2c3Disable bool
+	var spiInfo bool
 	var spiRead, spiWrite, spiEnv string
 	var spiOff, spiLen int64
 	var i2cMon int
@@ -267,6 +268,8 @@ func main() {
 	flag.BoolVar(&ast.LpcReset, "lpc", false, "with -reset, also reset LPC")
 	flag.BoolVar(&i2c3Speed, "i2c3", false, "continuously monitor/adjust i2c speed for bus-3")
 	flag.BoolVar(&i2c3Disable, "i2c3dis", false, "continuously monitor/disable i2c bus-3")
+	flag.BoolVar(&spiInfo, "spiinfo", false, "display spi info for bmc")
+	flag.BoolVar(&ast.Mode4B, "spi4b", true, "enable 4B mode for spi (dflt)")
 	flag.StringVar(&spiRead, "spiread", "", "file where to store flash contents")
 	flag.Int64Var(&spiOff, "spioff", 0, "flash offset to read or write")
 	flag.Int64Var(&spiLen, "spilen", -1, "size to read write")
@@ -288,6 +291,9 @@ func main() {
 	if mii {
 		a.MiiInfo()
 	}
+	if spiInfo {
+		a.SpiInfo()
+	}
 	if i2c3Speed {
 		a.AstI2c3Speed()
 	}