Merge updates from master #84
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since this infrastructure is also used in no c++ case(e.g. gcov) Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
1.Remove CXX_INITIALIZE_MACHO and CXX_INITIALIZE_SINIT 2.Merge cxx_initialize_sinit.c and cxx_initialize_macho.c into cxx_initialize.c Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
so the user could just change CONFIG_DEBUG_ASSERTIONS in most case Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Copy&paste error, wrong description field used
fix compile warning: make: arm-nuttx-elf-gcc: Command not found Signed-off-by: chao.an <anchao@xiaomi.com>
and correct the code indent Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
since it can be detected automatically by __STDC_VERSION__ Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Summary: - Use Inner Shareable for TLB maintenance operations - Add config option as CONFIG_ARM_HAVE_MPCORE - This PR is in preparation for smp with kernel build Impact: - armv7-a Testing: - sabre-6quad:smp w/ qemu - sabre-6quad:knsh_smp w/ qemu (WIP) Signed-off-by: Oki Minabe <minabe.oki@gmail.com>
Adds an FDCAN driver for STM32H7 MCUs using the SocketCAN interface
Note that pinmap.h, irq.h, fdcan.h still need to be updated with proper register definitions for the FDCAN3 peripheral present in STM32H7[2|3][3|5] MCUs
Summary: - In case of SMP and ADDRENV, allocate the page table for each cpu - Each cpu holds separated addrenv and MMU setting Impact: - armv7-a Testing: - sabre-6quad:smp w/ qemu - sabre-6quad:knsh w/ qemu - sabre-6quad:knsh_smp w/ qemu (WIP) Signed-off-by: Oki Minabe <minabe.oki@gmail.com>
to generate more information for profile feedback optimization and remove -lgcov from STDLIBS since gcc/clang will automatically add the profile help lirary(triggered by -fprofile-generate). Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
to fix the gcov link error: arm-none-eabi-ld: /home/xiaoxiang/vela/prebuilts/gcc/linux/arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m/nofp/libgcov.a(_gcov.o): in function `gcov_error_exit': libgcov-driver.c:(.text+0x7c): undefined reference to `_impure_ptr' arm-none-eabi-ld: /home/xiaoxiang/vela/prebuilts/gcc/linux/arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m/nofp/libgcov.a(_gcov.o): in function `get_gcov_error_file': libgcov-driver.c:(.text+0x1e0): undefined reference to `_impure_ptr' arm-none-eabi-ld: /home/xiaoxiang/vela/prebuilts/gcc/linux/arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m/nofp/libgcov.a(_gcov.o): in function `gcov_exit_open_gcda_file.isra.0': libgcov-driver.c:(.text+0x660): undefined reference to `_impure_ptr' Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
to improve the ci coverage Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
In particular additions to wm8994.h and filled functionality into wm8994.c. Resolved a few more remarks from review.
…H is true since up_[m|u]delay provide in the common code in this case Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Summary: - In case of SMP and ADDRENV, allocate current group for each cpu - g_pid_current holds pid of the group and uses for addrenv switching - allocate g_group_current for each cpu in stead of g_pid_current - g_group_current is the array that pointed to the current task_group_s struct Impact: - ADDRENV=y and SMP=y Testing: - sabre-6quad:smp w/ qemu - sabre-6quad:knsh w/ qemu - sabre-6quad:knsh_smp w/ qemu (WIP) Signed-off-by: Oki Minabe <minabe.oki@gmail.com>
state (wrong I2C write size). Some improvements of the code.
based on boards/arm/stm32/b-g474e-dpow1 2022-05-01 aeb9c5d
Merge updates from pinedio
Merge updates from master
1. fix typo spilock -> spinlock
2. fix build break
sched/sched_note.c: In function ‘note_spincommon’:
sched/sched_note.c:435:3: error: aggregate value used where an integer was expected
435 | note.nsp_value = (uint8_t)*spinlock;
| ^~~~
Signed-off-by: chao.an <anchao@xiaomi.com>
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
tlsr82: first commit of telink tlsr82xx chip port. - tc32 archtecture context switch; - tc32 backtrace; - timer, uart, pwm, gpio, adc driver; - flash, watchdog driver; - uart txdma/rxdma; - spi console driver; - add board bringup and reset; Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
Merge updates from downstream
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Tested OK with LVGL Test App and LoRaWAN Test App