serwb: revert some changes (was breaking simulation)

m-labs · May 12, 2018 · 6e67e6d · 6e67e6d
1 parent 0a6d4cc
commit 6e67e6d
Showing 1 changed file with 9 additions and 9 deletions.
diff --git a/artiq/gateware/serwb/phy.py b/artiq/gateware/serwb/phy.py
@@ -121,9 +121,9 @@ def __init__(self, serdes, taps, timeout=2**15):
             If((delay_min == 0) |
                (delay_max == (taps - 1)) |
                ((delay_max - delay_min) < taps//16),
-               # switch to next bitslip
-               NextValue(delay, taps - 1),
-               NextState("INC_DELAY_BITSLIP")
+               NextValue(delay_min_found, 0),
+               NextValue(delay_max_found, 0),
+               NextState("WAIT_STABLE")
             ).Else(
                 NextValue(delay, 0),
                 serdes.rx_delay_rst.eq(1),
@@ -238,9 +238,9 @@ def __init__(self, serdes, taps, timeout=2**15):
             If((delay_min == 0) |
                (delay_max == (taps - 1)) |
                ((delay_max - delay_min) < taps//16),
-               # switch to next bitslip
-               NextValue(delay, taps - 1),
-               NextState("INC_DELAY_BITSLIP")
+               NextValue(delay_min_found, 0),
+               NextValue(delay_max_found, 0),
+               NextState("WAIT_STABLE")
             ).Else(
                 NextValue(delay, 0),
                 serdes.rx_delay_rst.eq(1),
@@ -258,9 +258,9 @@ def __init__(self, serdes, taps, timeout=2**15):
             serdes.tx_idle.eq(1)
         )
         fsm.act("SEND_PATTERN",
-            If(~serdes.rx_comma,
-                timer.wait.eq(1),
-                If(timer.done,
+            timer.wait.eq(1),
+            If(timer.done,
+                If(~serdes.rx_comma,
                     NextState("READY")
                 )
             ),