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coredevice: use device endian for kernel and RPC #1588

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merged 1 commit into from Jan 21, 2021

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pca006132
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@pca006132 pca006132 commented Jan 21, 2021

ARTIQ Pull Request

Description of Changes

Use device endian for kernel and RPC protocol.

Note: This breaks the protocol for artiq-zynq, users must update the zynq firmware after this change.

This improves the performance of integer array transfer for zynq. For large integer array transfer, the throughput difference:

Test Prev (MiB/s) Now (MiB/s) Diff
I32 Array (1MB) H2D 44.08 47.47 +7.69%
I32 Array (1MB) D2H 44.72 59.36 +32.7%
Bytes List (1MB) H2D 36.87 34.82 -5.56%
Bytes List (1MB) D2H 45.92 43.03 -6.29%
Bytes (1MB) H2D 54.24 54.03 -0.39%
Bytes (1MB) D2H 61.61 61.21 -0.65%
I32 List (1MB) H2D 33.69 38.78 +15.1%
I32 List (1MB) D2H 35.93 47.79 +33.0%

(I can't get stable result for small transfers from zeus, so comparing them would likely just be noise)
(updated after removing redundant allocation in firmware)

There is no visible effect for or1k as or1k uses big endian, and the bottlenect is the device side for transfer so little overhead in the host side did not reflect on the performance. This PR only affects kernel and RPC protocol, other protocols like coremgmt or analyzer would not be affected as they are not performance critical.

Improvement for or1k device to host integer array transfer is planned, and should be simple.

Related Issue

#1255 (comment)

Type of Changes

Type
🔨 Refactoring

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ARTIQ files that do not contain a license header are copyrighted by M-Labs Limited and are licensed under LGPLv3+.

@dnadlinger dnadlinger merged commit ec72eed into m-labs:master Jan 21, 2021
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Merging without much fanfare, as Zynq isn't widely deployed yet. Is the protocol documented somewhere? (I don't think so, but if it is, we should add a note about endianness.)

@@ -76,15 +76,17 @@ def __init__(self, dmgr, host, ref_period, ref_multiplier=8, target="or1k"):
self.ref_multiplier = ref_multiplier
if target == "or1k":
self.target_cls = OR1KTarget
endian = ">"
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This is redundant. @pca006132 do this instead:

endian = {"e": "<", "E": ">"}[self.target_cls.data_layout[0]]

@sbourdeauducq
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Is the protocol documented somewhere?

No, it is not. Keeping doc in sync with source is difficult...

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3 participants