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Power_Tree.sch: added info for FPGA block
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@adamwang
adamwang committed Jun 22, 2012
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6 changes: 4 additions & 2 deletions r4/Power_Tree.sch
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EESchema Schematic File Version 2 date 2012年06月21日 (週四) 12時14分52秒 EESchema Schematic File Version 2 date 2012年06月22日 (週五) 15時50分58秒
LIBS:js28f256j3f105 LIBS:js28f256j3f105
LIBS:8_10-card LIBS:8_10-card
LIBS:74x1g00_5 LIBS:74x1g00_5
Expand Down Expand Up @@ -58,7 +58,7 @@ $Descr A3 16535 11693
encoding utf-8 encoding utf-8
Sheet 20 20 Sheet 20 20
Title "Milkymist One - Power Tree Sheet" Title "Milkymist One - Power Tree Sheet"
Date "21 jun 2012" Date "22 jun 2012"
Rev "R4" Rev "R4"
Comp "" Comp ""
Comment1 "" Comment1 ""
Expand Down Expand Up @@ -558,4 +558,6 @@ Wire Notes Line
9500 7050 11000 7050 9500 7050 11000 7050
Wire Notes Line Wire Notes Line
11000 7050 11000 6250 11000 7050 11000 6250
Text Notes 8850 7250 0 60 ~ 0
Iin 10mA, Maximum current through pin using PCI I/O standard\nwhen forward biasing the clamp diode.\nIFS 40mA, VFS supply current while in eFUSE Programming Conditions.\n\nFor more information, go Xilinx web to see:\n"Spartan-6 FPGA Data Sheet: DC and Switching Characteristics"\n"Spartan-6 FPGA PCB Design and Pin Planning Guide"
$EndSCHEMATC $EndSCHEMATC

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