vivado: print short timing info after phys_opt_design

m-labs · Mar 29, 2018 · f4180e9 · f4180e9
1 parent c65a2f3
commit f4180e9
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/migen/build/xilinx/vivado.py b/migen/build/xilinx/vivado.py
@@ -119,6 +119,7 @@ def _build_batch(self, platform, sources, build_name):
         tcl.append("report_clock_utilization -file {}_clock_utilization.rpt".format(build_name))
         tcl.append("route_design")
         tcl.append("phys_opt_design")
+        tcl.append("report_timing_summary -no_header -no_detailed_paths")
         tcl.append("write_checkpoint -force {}_route.dcp".format(build_name))
         tcl.append("report_route_status -file {}_route_status.rpt".format(build_name))
         tcl.append("report_drc -file {}_drc.rpt".format(build_name))