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Allow asserting on subsignal widths #129

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whitequark opened this issue Jul 5, 2019 · 0 comments
Closed

Allow asserting on subsignal widths #129

whitequark opened this issue Jul 5, 2019 · 0 comments

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@whitequark
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whitequark commented Jul 5, 2019

This doesn't seem very useful on its own, but it's a feature that helps with abstraction, because, for example, this buggy code:

        Resource("ddr3", 0,
            Subsignal("rst",     PinsN("N4", dir="o")),
            Subsignal("clk",     DiffPairs("M4", "N5", dir="o"), Attrs(IO_TYPE="LVDS")),
            Subsignal("clk_en",  Pins("N2", dir="o")),
            Subsignal("cs",      PinsN("K1", dir="o")),
            Subsignal("we",      PinsN("M1", dir="o")),
            Subsignal("ras",     PinsN("P1", dir="o")),
            Subsignal("cas",     PinsN("L1", dir="o")),
            Subsignal("a",       Pins("P2 C4 E5 F5 B3 F4 B5 E4 C5 E3 D5 B4 C3", dir="o")),
            Subsignal("ba",      Pins("P5 N3 M3", dir="o")),
            Subsignal("dqs",     DiffPairs("K2 H4", "J1 G5", dir="io"), Attrs(IO_TYPE="LVDS")),
            Subsignal("dq",      Pins("L5 F1 K4 G1 L4 G2 J3 D1 C1 E2 C2 F3 A2 E1 B1",
                                      dir="io")),
            Subsignal("dm",      Pins("J4 H5", dir="o")),
            Subsignal("odt",     Pins("L2", dir="o")),
            Attrs(IO_TYPE="LVCMOS15")
        )

will not currently be caught at all. (Can you spot the bug?)

Ideally there would be some syntax, e.g.:

Subsignal("cs",      PinsN("K1", dir="o"), assert_width=1),

that would cause an assertion failure if someone passes "K1 K2" as "cs". It should support iterables and ranges among other things, because it's perfectly valid to have e.g. multiple CS# pins with an SPI interface.

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