/
namcos11.cpp
1871 lines (1561 loc) · 99.5 KB
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namcos11.cpp
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// license:BSD-3-Clause
// copyright-holders:smf,Ryan Holtz,R. Belmont
/***************************************************************************
Namco System 11 - Arcade PSX Hardware
=====================================
Driver by smf & Ryan Holtz
Board notes by The Guru
Sound and MCU hookup by R. Belmont
Thanks to the original Zinc Team.
Issues:
- Random draw list corruption in soul edge v2 & dunkmania.
- soul edge, dunk mania & prime goal ex try to access joypads/memory cards.
It is unknown what they would do if they found one.
- pocketrc locks up if you try to exit testmode (note: it is not related to
unimplemented C76 internal watchdog timer or software reset)
Update: now it always locks up in test mode, regression?
- pocketrc long samples and drum loops go out of sync, it sounds better when
the C352 is underclocked to match the one in namcos22. It's possibly a BTANB,
since current C352 frequency is the same as Tekken/Tekken 2 real PCB.
Known Dumps
-----------
Game Description CPU board Mother board Daughter board Keycus ROM0L
--------------------------------------------------------------------------------------------------------------------------------------
tekken Tekken (TE2/VER.C) COH-100 SYSTEM11 MOTHER PCB SYSTEM11 ROM8 PCB none 5
tekkenac Tekken (TE4/VER.C) COH-100 " " " "
tekkenb Tekken (TE2/VER.B) COH-100 " " " "
tekkenjb Tekken (TE1/VER.B) COH-100 " " " "
tekken2 Tekken 2 Ver.B (TES3/VER.D) COH-110 SYSTEM11 MOTHER PCB SYSTEM11 ROM8 PCB C406 6
tekken2ub Tekken 2 Ver.B (TES3/VER.B) COH-100 SYSTEM11 MOTHER PCB SYSTEM11 ROM8 PCB C406 6
tekken2b Tekken 2 Ver.B (TES2/VER.B) COH-100 " " " "
tekken2jc Tekken 2 Ver.B (TES1/VER.C) COH-100 " " " "
tekken2a Tekken 2 (TES2/VER.A) COH-100 " " " "
souledge Soul Edge Ver. II (SO4/VER.C) COH-100 / COH-110 SYSTEM11 MOTHER PCB SYSTEM11 ROM8 PCB C409 6
souledgeuc Soul Edge Ver. II (SO3/VER.C) COH-100 / COH-110 " " " "
souledgeua Soul Edge (SO3/VER.A) COH-100 / COH-110 " " " "
souledgea Soul Edge (SO2/VER.A) COH-100 / COH-110 " " " "
souledgeja Soul Edge (SO1/VER.A) COH-100 / COH-110 " " " "
dunkmnia Dunk Mania (DM2/VER.C) COH-100 / COH-110 SYSTEM11 MOTHER PCB SYSTEM11 ROM8 PCB C410 5
dunkmniajc Dunk Mania (DM1/VER.C) COH-100 / COH-110 SYSTEM11 MOTHER PCB SYSTEM11 ROM8 PCB C410 5
xevi3dg Xevious 3D/G (XV32/VER.B) COH-100 / COH-110 SYSTEM11 MOTHER PCB SYSTEM11 ROM8 PCB C430 5
xevi3dga Xevious 3D/G (XV32/VER.A) COH-100 / COH-110 SYSTEM11 MOTHER PCB SYSTEM11 ROM8 PCB C430 5
xevi3dgj Xevious 3D/G (XV31/VER.A) COH-100 / COH-110 SYSTEM11 MOTHER PCB SYSTEM11 ROM8 PCB C430 5
primglex Prime Goal EX (PG1/VER.A) COH-100 / COH-110 SYSTEM11 MOTHER PCB SYSTEM11 ROM8 PCB C411 6
danceyes Dancing Eyes (DC2/VER.B) COH-100 / COH-110 SYSTEM11 MOTHER PCB SYSTEM11 ROM8 PCB C431 5
danceyesu Dancing Eyes (DC3/VER.C) COH-100 / COH-110 SYSTEM11 MOTHER PCB SYSTEM11 ROM8 PCB C431 5
danceyesj Dancing Eyes (DC1/VER.A) COH-100 / COH-110 SYSTEM11 MOTHER PCB SYSTEM11 ROM8 PCB C431 5
pocketrc Pocket Racer (PKR1/VER.B) COH-110 SYSTEM11 MOTHER PCB SYSTEM11 ROM8 PCB C432 5
starswep Star Sweep (STP2/VER.A) COH-100 / COH-110 SYSTEM11 MOTHER(B) PCB C442 -
starswepj Star Sweep (STP1/VER.A) COH-100 / COH-110 SYSTEM11 MOTHER(B) PCB C442 -
myangel3 Kosodate Quiz My Angel 3 (KQT1/VER.A) COH-110 SYSTEM11 MOTHER(B) PCB SYSTEM11 ROM8(64) PCB C443 2
ptblank2a Point Blank 2 (GNB2/VER.A) COH-100 / COH-110 SYSTEM11 MOTHER PCB SK990722 C443 4
ptblank2b Point Blank 2 (GNB2/VER.A alt) COH-100 / COH-110 SYSTEM11 MOTHER(B) PCB SK990722 C443 4
ptblank2ua Point Blank 2 (GNB3/VER.A) COH-100 / COH-110 SYSTEM11 MOTHER PCB SYSTEM11 ROM8(64) PCB C443 2
gunbarla Gun Barl (GNB1/VER.A) COH-100 / COH-110 SYSTEM11 MOTHER PCB SYSTEM11 ROM8(64) PCB C443 2
Not Dumped Yet (they possibly don't exist)
--------------
Point Blank 3 (C) Namco, 2001
Dancing Eyes (DC2/VER.C) (C) Namco, 1996
Soul Edge Ver. III (C) Namco, 1996
Tekken Ver.C (C) Namco, 1995
Tekken II Ver.C (C) Namco, 1995
Kosodate Quiz My Angel 3 (KQT1/VER.B) (C) Namco, 1998
The Namco System 11 system comprises 3 PCB's....
MOTHER PCB- This is the main PCB. It holds all sound circuitry, sound ROMs, program ROMs, shared RAM, bank-switching logic,
controller/input logic (including sound CPU).
There are two known revisions of this PCB. The differences are not known, though they're probably almost identical except
for some minor component shuffling. The 2nd revision is used only by Kosodate Quiz My Angel 3 and Star Sweep.
CPU PCB - There are two known revisions of this PCB. Any game can use either PCB. Contains main CPU/RAM and GPU/Video RAM
The differences are only in the RAM type, one uses 4x 16MBit chips compared to the other that uses 2x 32MBit chips.
ROM PCB - There are two known revisions of this PCB. They're mostly identical except one uses all 32MBit SOP44 mask ROMs and the other
uses 64MBit SOP44 mask ROMs. The 64MBit ROM board also has space for a PAL and a KEYCUS.
Each game has a multi-letter code assigned to it which is printed on a small sticker and placed on the bottom side of the MOTHER PCB.
This code is then proceeded by a number (1, 2, 3 & 4 seen so far), then 'Ver.' then A/B/C/D/E which denotes the software
revision, and in some cases a sub-revision such as 1 or 2 (usually only listed in the test mode).
The first 1 denotes a Japanese version, other numbers denote a World version.
For World versions, only the main program changes (and sometimes only some of the program ROMs change), the rest of the (graphics) ROMs
use the Japanese version ROMs.
See the Main PCB and ROM Daughterboard PCB texts below for more details.
1st Revision
SYSTEM11 MOTHER PCB 8645960103 (8645970103)
|----------------------------------------|
| LA4705 |----| (CONN1) |
|-| |C384| KEYCUS S11MOT3A |
| VOL 4558 |----| AT28C16 |
| LC78815 S11MOT2A |
| |
|J PRG.2L |
|A WAVE.8K |-----| 2061ASC-1 PRG.2K |
|M |C352 | PRG.2J |
|M | | PRG.2F |
|A |-----| |
| |
| |-------| |
|-| |-----| | | |
| | C76 | SPROG.6D | C195 | 61C256 |
|-| | | | | 61C256 |
|4 |-----| S11MOT1A |-------| |
|8 |
|W DSW(2) |
|A |
|Y (CONN2) |
|-| PQ30RV21 |
|----------------------------------------|
Notes:
C76 - Sound CPU with 16k internal BIOS, a Namco-badged custom, actually a Mitsubishi M37702 MCU (QFP80)
C195 - Namco custom (QFP160)
C384 - Namco custom (QFP48)
C352 - Namco custom C352 PCM sound chip (QFP100)
AT28C16 - 2k x8 EEPROM (DIP28)
61C256 - 32k x8 SRAM (x2, SOJ28)
2061ASC-1- IC Designs 2061ASC-1 programmable clock generator (SOIC16)
* Pin 8 MCLKOUT - 20.0132MHz tied to C352
* Pin 9 VCLKOUT - 40.0264MHz (==2x MCLKOUT). Tied to C195
* Pin 7 XTALOUT - 16.93426MHz. This is tied to the clock input of the C76
S11MOT* - Standard System 11 PALs (DIP20)
WAVE.8K - Sound samples, 42 pin DIP mask ROM, either 16MBit or 32MBit. If 32MBit, it is programmed in Byte Mode.
SPROG.6D - Sound program, Intel PA28F200BX 2MBit Flash ROM (SOP44)
PRG.2* - Main program, Intel E28F008SA 8MBit Flash ROM (TSOP40)
CONN1 - for connection of the ROM Board
CONN2 - for connection of the CPU board
KEYCUS - DIP28 protection chip (see table below, DIP32)
PQ3RV21 - Sharp PQ30RV21 5V to 3.3V Voltage Regulator
LC78815 - Sanyo LM78815 2-Channel 16-Bit D/A Converter (SOIC20)
4558 - Op Amp (SOIC8)
LA4705 - Sanyo LA4705 15W 2-Channel Power Amplifier (SIP18)
48WAY - Namco 48 way edge connector used for extra controls and to output the 2nd speaker when set to stereo mode.
There is a REV B Motherboard 'SYSTEM11 MOTHER(B) PCB 8645960301 (8645970301)'
which uses 2x Intel E28F016SA TSOP56 flash ROMs for the main program at locations 1L
and 1J. The C76 SOP44 ROM is present on the PCB at location 6D and as an option, at 90
degrees there are unused SMD pads to accept 1x Intel E28F200 TSOP56 flash ROM at location 7E.
The remaining components and locations are identical to the standard 'SYSTEM 11 MOTHER PCB'
Game Code
Game Sticker KEYCUS
---------------------------------------------
Dancing Eyes DC C431
Dunk Mania DM C410
Kosodate Quiz My Angel 3 KQT C443
Prime Goal EX PG C411
Pocket Racer PKR C432
Point Blank 2 GNB C443
Point Blank 3
Soul Edge SO C409
Soul Edge Ver. II SO C409
Soul Edge Ver. III
Star Sweep STP C442
Tekken TE none
Tekken Ver.B TE none
Tekken Ver.C
Tekken II TES C406
Tekken II Ver.B TES C406
Tekken II Ver.C
Xevious 3D/G XV3 C430
ROM Boards
----------
SYSTEM11 ROM8 PCB 8645960202 (8645970202)
|----------------------------------------|
| (CONN1) |
|ROM3L.9 74F139 ROM3U.1 |
| |
|ROM1L.8 ROM0L.6 ROM2U.4 |
| ROM2L.7 ROM0U.5 ROM1U.3|
| |
|----------------------------------------|
Notes:
This ROM board is wired to accept a maximum of 8x 8Bit 32MBit SOP44 mask ROMs.
SYSTEM11 ROM8(64) PCB 8645960500 (8645970500)
|----------------------------------------|
|KEYCUS.7 (CONN1) PAL16V8H.1 |
| |
| *PRG3U.IC10 |
|PRG2U.8 PRG0U.5 PRG1L.3 |
| PRG1U.6 PRG2L.4 PRG0L.2|
| *PRG3L.IC9 |
|----------------------------------------|
Notes:
This ROM board is wired to accept a maximum of 8x 8Bit 64MBit SOP44 mask ROMs.
There is room for a PLCC44 KEYCUS IC (usually a CPLD, but not populated) and a PLCC20
IC type PAL16V8H (populated and labelled 'ROM8 DEC0')
* - These ROMs are on the other side of the PCB.
CPU Board
---------
Revision 1
GP-11 COH-100 1-655-543-12
|-------------------------------------|
| |---------| KM48V514BJ-6 |
| |SONY | KM48V514BJ-6 |
| |CXD8530AQ| KM48V514BJ-6 |
| | | KM48V514BJ-6 |
| |---------| KM48V514BJ-6 |
| 67.737MHz KM48V514BJ-6 |
| |---------| KM48V514BJ-6 |
|(CONN2) |SONY | KM48V514BJ-6 |
| |CXD8538Q | |
| | | |
| |---------| 53.69MHz |
| D482445LGW-A70|
| SONY D482445LGW-A70 |
| CXD2923AR D482445LGW-A70|
| D482445LGW-A70 |
|-------------------------------------|
Notes:
CXD8530AQ - Sony CXD8530AQ Main CPU (QFP208)
CXD8530BQ may be used instead of CXD8530AQ
CXD8538Q - Sony CXD8538Q GPU (QFP208)
CXD2923AR - Sony CXD2923AR SPU (QFP80)
Revision 2
GP-13 COH-110 S-XMB 1-660-276-11
|-------------------------------------|
| |---------| KM48V514BJ-6 |
| |SONY | KM48V514BJ-6 |
| |CXD8530CQ| KM48V514BJ-6 |
| | | KM48V514BJ-6 |
| |---------| KM48V514BJ-6 |
| 67.737MHz KM48V514BJ-6 |
| |---------| KM48V514BJ-6 |
|(CONN2) |SONY | KM48V514BJ-6 |
| |CXD8561Q | |
| | | |
| |---------| 53.69MHz |
| |
| KM4132G271Q-12 |
| KM4132G271Q-12 XC44200FUB |
| |
|-------------------------------------|
Notes:
The 2nd revision CPU board (GP-13 COH-110) uses 2x 32MBit RAMs instead of
the 4x D482445LGW-A70 RAMs and the 2 main SONY IC's are updated revisions,
though the functionality of them is identical. The 2 types of CPU boards can be
used with any System 11 motherboard, and any System 11 game except Tekken which
requires the Revision 1 CPU board otherwise there are big graphical glitches
Gun Board (Used only with Point Blank 2 so far)
---------
System11 GUN I/F PCB 8645960701 (8645970701)
|-------------------------------------------|
| |-------| |-------| |-------| |
| |S11GUN3| |S11GUN2| |S11GUN1| |
| | | | | | | |
| | | | | | | |
| |-------| |-------| |-------| |
| |
| |
| |
| SLA4060 |
|J3 |---------| |
| | S11GUN0 | |
| | | |
| | | |
| | | AV9170 |
| |---------| |
| |
| J2 |
| |
| J1 |
|-------------------------------------------|
Notes:
SLA4060 - Sanken Electric Co. NPN Darlington Transistor Array (SIP12)
J1 - 96 pin connector joining to the mother board (connector below the PCB)
J2 - 96 pin connector joining to the CPU board (connector above the PCB)
J3 - 10 pin connector joining to the gun via a 24V solenoid driver board (for the gun opto/recoil)
S11GUN0 - PLCC84 FPGA (not populated)
S11GUN1 - Altera Max EPM7128STC100-10 EPLD (QFP100, not populated)
S11GUN2 - Altera Max EPM7128STC100-10 EPLD (QFP100, labelled 'S11GUN2)
S11GUN3 - Altera Max EPM7128STC100-10 EPLD (QFP100, not populated)
AV9170 - Integrated Circuit Systems Inc. AV9170 Clock Synchronizer and Multiplier, Voltage Controlled Oscillator (SOIC8)
To connect a normal (i.e. HAPP) light gun only 4 wires are needed.
Those are +5V, GND, trigger and gun optical sensor using pins 5 & 9 of J3 and pins 1, 3 & 22 (both solder and parts side)
of the JAMMA connector. A Namco gun can also be connected the same way, with or without the kickback solenoid.
J3 connector:
Pin 1 - Not Used
Pin 2 - Not Used
Pin 3 - Gun 1 Solenoid
Pin 4 - Player 1 Start Button Lamp
Pin 5 - Gun 1 Sensor
Pin 6 - GND
Pin 7 - Gun 2 Solenoid
Pin 8 - Player 2 Start Button Lamp
Pin 9 - Gun 2 Sensor
Pin 10- Not Used
JAMMA Harness:
Pin 1 Parts Side - GND
Pin 3 Parts Side - +5V
Pin 22 Parts Side - Gun 1 Trigger
Pin 22 Solder Side - Gun 2 Trigger
***************************************************************************/
#include "emu.h"
#include "cpu/psx/psx.h"
#include "machine/at28c16.h"
#include "namcomcu.h"
#include "ns11prot.h"
#include "machine/ram.h"
#include "machine/timer.h"
#include "sound/c352.h"
#include "video/psx.h"
#include "screen.h"
#include "speaker.h"
#include <cstdarg>
namespace {
#define C76_SPEEDUP ( 1 ) /* sound cpu idle skipping */
#define VERBOSE_LEVEL ( 0 )
class namcos11_state : public driver_device
{
public:
namcos11_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_sharedram(*this, "sharedram")
, m_maincpu(*this, "maincpu")
, m_mcu(*this, "c76")
, m_bankedroms(*this, "bankedroms")
, m_bank(*this, "bank%u", 1)
, m_lightgun_io(*this, {"GUN1X", "GUN1Y", "GUN2X", "GUN2Y"})
{
}
void coh110(machine_config &config);
void coh100(machine_config &config);
void myangel3(machine_config &config);
void xevi3dg(machine_config &config);
void dunkmnia(machine_config &config);
void pocketrc(machine_config &config);
void ptblank2ua(machine_config &config);
void tekken2o(machine_config &config);
void danceyes(machine_config &config);
void starswep(machine_config &config);
void primglex(machine_config &config);
void souledge(machine_config &config);
void tekken(machine_config &config);
void tekken2(machine_config &config);
private:
void rom8_w(offs_t offset, uint16_t data);
void rom8_64_upper_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void rom8_64_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void lightgun_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint16_t lightgun_r(offs_t offset, uint16_t mem_mask = ~0);
uint16_t c76_shared_r(offs_t offset);
void c76_shared_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint16_t c76_speedup_r();
void c76_speedup_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
TIMER_DEVICE_CALLBACK_MEMBER(mcu_irq0_cb);
TIMER_DEVICE_CALLBACK_MEMBER(mcu_irq2_cb);
void c76_map(address_map &map);
void namcos11_map(address_map &map);
void ptblank2ua_map(address_map &map);
void rom8_64_map(address_map &map);
void rom8_map(address_map &map);
virtual void driver_start() override;
required_shared_ptr<uint16_t> m_sharedram;
required_device<cpu_device> m_maincpu;
required_device<m37710_cpu_device> m_mcu;
optional_memory_region m_bankedroms;
optional_memory_bank_array<8> m_bank;
optional_ioport_array<4> m_lightgun_io;
uint32_t m_n_bankoffset;
uint8_t m_su_83;
inline void ATTR_PRINTF(3,4) verboselog( int n_level, const char *s_fmt, ... );
};
inline void ATTR_PRINTF(3,4) namcos11_state::verboselog( int n_level, const char *s_fmt, ... )
{
if( VERBOSE_LEVEL >= n_level )
{
va_list v;
char buf[ 32768 ];
va_start( v, s_fmt );
vsprintf( buf, s_fmt, v );
va_end( v );
logerror( "%s: %s", machine().describe_context(), buf );
}
}
void namcos11_state::rom8_w(offs_t offset, uint16_t data)
{
m_bank[ offset ]->set_entry( ( ( data & 0xc0 ) >> 4 ) + ( data & 0x03 ) );
}
void namcos11_state::rom8_64_upper_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
verboselog(2, "rom8_64_upper_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
m_n_bankoffset = offset * 16;
}
void namcos11_state::rom8_64_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
verboselog(2, "rom8_64_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
// TODO: verify behaviour
m_bank[ offset ]->set_entry( ( ( ( ( data & 0xc0 ) >> 3 ) + ( data & 0x07 ) ) ^ m_n_bankoffset ) );
}
void namcos11_state::lightgun_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
switch( offset )
{
case 0:
output().set_value( "led0", !( data & 0x08 ) );
output().set_value( "led1", !( data & 0x04 ) );
output().set_value( "recoil0", !( data & 0x02 ) );
output().set_value( "recoil1", !( data & 0x01 ) );
verboselog(1, "lightgun_w: outputs (%08x %08x)\n", data, mem_mask );
break;
case 1:
verboselog(2, "lightgun_w: start reading (%08x %08x)\n", data, mem_mask );
break;
}
}
uint16_t namcos11_state::lightgun_r(offs_t offset, uint16_t mem_mask)
{
uint16_t data = 0;
switch( offset )
{
case 0:
data = m_lightgun_io[0]->read();
break;
case 2:
data = m_lightgun_io[1]->read();
break;
case 3:
data = m_lightgun_io[1]->read() + 1;
break;
case 4:
data = m_lightgun_io[2]->read();
break;
case 6:
data = m_lightgun_io[3]->read();
break;
case 7:
data = m_lightgun_io[3]->read() + 1;
break;
}
verboselog(2, "lightgun_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
return data;
}
uint16_t namcos11_state::c76_shared_r(offs_t offset)
{
return m_sharedram.target()[ offset ];
}
void namcos11_state::c76_shared_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA( &m_sharedram.target()[ offset ] );
}
void namcos11_state::namcos11_map(address_map &map)
{
map(0x1fa04000, 0x1fa0ffff).rw(FUNC(namcos11_state::c76_shared_r), FUNC(namcos11_state::c76_shared_w)); /* shared RAM with C76 */
map(0x1fa20000, 0x1fa2001f).rw("keycus", FUNC(ns11_keycus_device::read), FUNC(ns11_keycus_device::write));
map(0x1fa30000, 0x1fa30fff).rw("at28c16", FUNC(at28c16_device::read), FUNC(at28c16_device::write)).umask32(0x00ff00ff); /* EEPROM */
map(0x1fb00000, 0x1fb00003).nopw(); /* ?? */
map(0x1fbf6000, 0x1fbf6003).nopw(); /* ?? */
}
void namcos11_state::rom8_map(address_map &map)
{
namcos11_map(map);
map(0x1f000000, 0x1f0fffff).bankr("bank1");
map(0x1f100000, 0x1f1fffff).bankr("bank2");
map(0x1f200000, 0x1f2fffff).bankr("bank3");
map(0x1f300000, 0x1f3fffff).bankr("bank4");
map(0x1f400000, 0x1f4fffff).bankr("bank5");
map(0x1f500000, 0x1f5fffff).bankr("bank6");
map(0x1f600000, 0x1f6fffff).bankr("bank7");
map(0x1f700000, 0x1f7fffff).bankr("bank8");
map(0x1fa10020, 0x1fa1002f).w(FUNC(namcos11_state::rom8_w));
}
void namcos11_state::rom8_64_map(address_map &map)
{
namcos11_map(map);
map(0x1f000000, 0x1f0fffff).bankr("bank1");
map(0x1f100000, 0x1f1fffff).bankr("bank2");
map(0x1f200000, 0x1f2fffff).bankr("bank3");
map(0x1f300000, 0x1f3fffff).bankr("bank4");
map(0x1f400000, 0x1f4fffff).bankr("bank5");
map(0x1f500000, 0x1f5fffff).bankr("bank6");
map(0x1f600000, 0x1f6fffff).bankr("bank7");
map(0x1f700000, 0x1f7fffff).bankr("bank8");
map(0x1f080000, 0x1f080003).w(FUNC(namcos11_state::rom8_64_upper_w));
map(0x1fa10020, 0x1fa1002f).nopr().w(FUNC(namcos11_state::rom8_64_w));
}
void namcos11_state::ptblank2ua_map(address_map &map)
{
rom8_64_map(map);
map(0x1f780000, 0x1f78000f).r(FUNC(namcos11_state::lightgun_r));
map(0x1f788000, 0x1f788003).w(FUNC(namcos11_state::lightgun_w));
}
void namcos11_state::c76_map(address_map &map)
{
map(0x002000, 0x002fff).rw("c352", FUNC(c352_device::read), FUNC(c352_device::write));
map(0x001000, 0x001001).portr("PLAYER4");
map(0x001002, 0x001003).portr("SWITCH");
map(0x001004, 0x001005).portr("PLAYER1");
map(0x001006, 0x001007).portr("PLAYER2");
map(0x004000, 0x00bfff).ram().share("sharedram");
map(0x080000, 0x0fffff).rom().region("c76", 0);
map(0x200000, 0x27ffff).rom().region("c76", 0);
map(0x280000, 0x2fffff).rom().region("c76", 0);
map(0x300000, 0x300001).nopw();
map(0x301000, 0x301001).nopw();
}
uint16_t namcos11_state::c76_speedup_r()
{
if ((m_mcu->pc() == 0xc153) && (!(m_su_83 & 0xff00)))
{
m_mcu->spin_until_interrupt();
}
return m_su_83;
}
void namcos11_state::c76_speedup_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_su_83);
}
void namcos11_state::driver_start()
{
// C76 idle skipping, large speedboost
if (C76_SPEEDUP)
{
m_su_83 = 0;
save_item( NAME(m_su_83) );
m_mcu->space(AS_PROGRAM).install_read_handler(0x82, 0x83, read16smo_delegate(*this, FUNC(namcos11_state::c76_speedup_r)));
m_mcu->space(AS_PROGRAM).install_write_handler(0x82, 0x83, write16s_delegate(*this, FUNC(namcos11_state::c76_speedup_w)));
}
if( m_bankedroms != nullptr )
{
uint8_t *base = m_bankedroms->base();
int entries = m_bankedroms->bytes() / ( 1024 * 1024 );
for( int bank = 0; bank < 8; bank++ )
{
if( m_bank[ bank ] != nullptr )
{
m_bank[ bank ]->configure_entries( 0, entries, base, 1024 * 1024 );
m_bank[ bank ]->set_entry( 0 );
}
}
// TODO: this should only be for rom8_64 games
m_n_bankoffset = 0;
save_item( NAME(m_n_bankoffset) );
}
}
TIMER_DEVICE_CALLBACK_MEMBER(namcos11_state::mcu_irq0_cb)
{
m_mcu->set_input_line(M37710_LINE_IRQ0, HOLD_LINE);
}
TIMER_DEVICE_CALLBACK_MEMBER(namcos11_state::mcu_irq2_cb)
{
m_mcu->set_input_line(M37710_LINE_IRQ2, HOLD_LINE);
}
void namcos11_state::coh110(machine_config &config)
{
CXD8530CQ(config, m_maincpu, XTAL(67'737'600));
m_maincpu->set_addrmap(AS_PROGRAM, &namcos11_state::namcos11_map);
m_maincpu->subdevice<ram_device>("ram")->set_default_size("4M");
/* basic machine hardware */
NAMCO_C76(config, m_mcu, 16934400);
m_mcu->set_addrmap(AS_PROGRAM, &namcos11_state::c76_map);
m_mcu->an0_cb().set_ioport("ADC0");
m_mcu->an1_cb().set_ioport("ADC1");
m_mcu->an2_cb().set_ioport("ADC2");
m_mcu->an3_cb().set_ioport("ADC3");
m_mcu->an4_cb().set_ioport("ADC4");
m_mcu->an5_cb().set_ioport("ADC5");
m_mcu->an6_cb().set_ioport("ADC6");
m_mcu->an7_cb().set_ioport("ADC7");
/* TODO: irq generation for these */
TIMER(config, "mcu_irq0").configure_periodic(FUNC(namcos11_state::mcu_irq0_cb), attotime::from_hz(60));
TIMER(config, "mcu_irq2").configure_periodic(FUNC(namcos11_state::mcu_irq2_cb), attotime::from_hz(60));
CXD8561Q(config, "gpu", XTAL(53'693'175), 0x200000, subdevice<psxcpu_device>("maincpu")).set_screen("screen");
SCREEN(config, "screen", SCREEN_TYPE_RASTER);
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
c352_device &c352(C352(config, "c352", 25401600, 288));
c352.add_route(0, "lspeaker", 1.00);
c352.add_route(1, "rspeaker", 1.00);
//c352.add_route(2, "lspeaker", 1.00); // Second DAC not present.
//c352.add_route(3, "rspeaker", 1.00);
AT28C16(config, "at28c16", 0);
}
void namcos11_state::coh100(machine_config &config)
{
coh110(config);
CXD8530AQ(config.replace(), m_maincpu, XTAL(67'737'600));
m_maincpu->set_addrmap(AS_PROGRAM, &namcos11_state::namcos11_map);
m_maincpu->subdevice<ram_device>("ram")->set_default_size("4M");
CXD8538Q(config.replace(), "gpu", XTAL(53'693'175), 0x200000, subdevice<psxcpu_device>("maincpu")).set_screen("screen");
}
void namcos11_state::tekken(machine_config &config)
{
coh100(config);
m_maincpu->set_addrmap(AS_PROGRAM, &namcos11_state::rom8_map);
// TODO: either allow optional devices in memory maps, add another memory map without keycus or add a dummy keycus for tekken
KEYCUS_C406(config, "keycus", 0);
}
void namcos11_state::tekken2o(machine_config &config)
{
coh100(config);
m_maincpu->set_addrmap(AS_PROGRAM, &namcos11_state::rom8_map);
KEYCUS_C406(config, "keycus", 0);
}
void namcos11_state::tekken2(machine_config &config)
{
coh110(config);
m_maincpu->set_addrmap(AS_PROGRAM, &namcos11_state::rom8_map);
KEYCUS_C406(config, "keycus", 0);
}
void namcos11_state::souledge(machine_config &config)
{
coh110(config);
m_maincpu->set_addrmap(AS_PROGRAM, &namcos11_state::rom8_map);
KEYCUS_C409(config, "keycus", 0);
}
void namcos11_state::dunkmnia(machine_config &config)
{
coh110(config);
m_maincpu->set_addrmap(AS_PROGRAM, &namcos11_state::rom8_map);
KEYCUS_C410(config, "keycus", 0);
}
void namcos11_state::primglex(machine_config &config)
{
coh110(config);
m_maincpu->set_addrmap(AS_PROGRAM, &namcos11_state::rom8_map);
KEYCUS_C411(config, "keycus", 0);
}
void namcos11_state::xevi3dg(machine_config &config)
{
coh110(config);
m_maincpu->set_addrmap(AS_PROGRAM, &namcos11_state::rom8_map);
KEYCUS_C430(config, "keycus", 0);
}
void namcos11_state::danceyes(machine_config &config)
{
coh110(config);
m_maincpu->set_addrmap(AS_PROGRAM, &namcos11_state::rom8_map);
KEYCUS_C431(config, "keycus", 0);
}
void namcos11_state::pocketrc(machine_config &config)
{
coh110(config);
m_maincpu->set_addrmap(AS_PROGRAM, &namcos11_state::rom8_map);
KEYCUS_C432(config, "keycus", 0);
}
void namcos11_state::starswep(machine_config &config)
{
coh110(config);
KEYCUS_C442(config, "keycus", 0);
}
void namcos11_state::myangel3(machine_config &config)
{
coh110(config);
m_maincpu->set_addrmap(AS_PROGRAM, &namcos11_state::rom8_64_map);
KEYCUS_C443(config, "keycus", 0);
}
void namcos11_state::ptblank2ua(machine_config &config)
{
coh110(config);
m_maincpu->set_addrmap(AS_PROGRAM, &namcos11_state::ptblank2ua_map);
KEYCUS_C443(config, "keycus", 0);
}
static INPUT_PORTS_START( namcos11 )
PORT_START( "SWITCH" )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_SERVICE( 0x40, IP_ACTIVE_LOW )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN3 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN4 )
PORT_DIPNAME( 0x02, 0x02, "DIP1 (Test)" ) PORT_DIPLOCATION( "DIP SW2:1" )
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x01, 0x01, "DIP2 (Freeze)" ) PORT_DIPLOCATION( "DIP SW2:2" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START( "PLAYER1" )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
PORT_START( "PLAYER2" )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER( 2 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER( 2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER( 2 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER( 2 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER( 2 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER( 2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER( 2 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
PORT_START( "ADC0" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER( 3 )
PORT_START( "ADC1" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER( 3 )
PORT_START( "ADC2" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER( 3 )
PORT_START( "ADC3" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER( 3 )
PORT_START( "ADC4" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER( 3 )
PORT_START( "ADC5" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER( 3 )
PORT_START( "ADC6" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER( 3 )
PORT_START( "ADC7" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_START3 )
PORT_START( "PLAYER4" )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER( 4 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER( 4 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER( 4 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER( 4 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER( 4 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER( 4 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER( 4 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START4 )
INPUT_PORTS_END
static INPUT_PORTS_START( tekken )
PORT_INCLUDE( namcos11 )
PORT_MODIFY( "SWITCH" )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "PLAYER1" )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "PLAYER2" )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC0" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC1" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_BUTTON4 )
PORT_MODIFY( "ADC2" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_BUTTON3 )
PORT_MODIFY( "ADC3" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC4" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC5" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC6" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC7" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "PLAYER4" )
PORT_BIT( 0xcf, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER( 2 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER( 2 )
INPUT_PORTS_END
static INPUT_PORTS_START( souledge )
PORT_INCLUDE( namcos11 )
PORT_MODIFY( "SWITCH" )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC0" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC1" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC2" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_BUTTON4 )
PORT_MODIFY( "ADC3" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC4" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC5" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC6" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC7" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "PLAYER4" )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER( 2 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
INPUT_PORTS_END
static INPUT_PORTS_START( myangel3 )
PORT_INCLUDE( namcos11 )
PORT_MODIFY( "SWITCH" )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "PLAYER1" )
PORT_BIT( 0x70, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_MODIFY( "PLAYER2" )
PORT_BIT( 0x70, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_MODIFY( "ADC0" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC1" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC2" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC3" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC4" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC5" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC6" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC7" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "PLAYER4" )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
INPUT_PORTS_END
static INPUT_PORTS_START( ptblank2ua )
PORT_INCLUDE( namcos11 )
PORT_MODIFY( "PLAYER1" )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "PLAYER2" )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC0" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC1" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC2" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC3" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC4" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC5" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC6" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "ADC7" )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY( "PLAYER4" )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )