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ymf262.cpp
2803 lines (2336 loc) · 76.6 KB
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ymf262.cpp
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// license:GPL-2.0+
// copyright-holders:Jarek Burczynski
/*
**
** File: ymf262.c - software implementation of YMF262
** FM sound generator type OPL3
**
** Copyright Jarek Burczynski
**
** Version 0.2
**
Revision History:
03-03-2003: initial release
- thanks to Olivier Galibert and Chris Hardy for YMF262 and YAC512 chips
- thanks to Stiletto for the datasheets
Features as listed in 4MF262A6 data sheet:
1. Registers are compatible with YM3812 (OPL2) FM sound source.
2. Up to six sounds can be used as four-operator melody sounds for variety.
3. 18 simultaneous melody sounds, or 15 melody sounds with 5 rhythm sounds (with two operators).
4. 6 four-operator melody sounds and 6 two-operator melody sounds, or 6 four-operator melody
sounds, 3 two-operator melody sounds and 5 rhythm sounds (with four operators).
5. 8 selectable waveforms.
6. 4-channel sound output.
7. YMF262 compabile DAC (YAC512) is available.
8. LFO for vibrato and tremolo effedts.
9. 2 programable timers.
10. Shorter register access time compared with YM3812.
11. 5V single supply silicon gate CMOS process.
12. 24 Pin SOP Package (YMF262-M), 48 Pin SQFP Package (YMF262-S).
differences between OPL2 and OPL3 not documented in Yamaha datahasheets:
- sinus table is a little different: the negative part is off by one...
- in order to enable selection of four different waveforms on OPL2
one must set bit 5 in register 0x01(test).
on OPL3 this bit is ignored and 4-waveform select works *always*.
(Don't confuse this with OPL3's 8-waveform select.)
- Envelope Generator: all 15 x rates take zero time on OPL3
(on OPL2 15 0 and 15 1 rates take some time while 15 2 and 15 3 rates
take zero time)
- channel calculations: output of operator 1 is in perfect sync with
output of operator 2 on OPL3; on OPL and OPL2 output of operator 1
is always delayed by one sample compared to output of operator 2
differences between OPL2 and OPL3 shown in datasheets:
- YMF262 does not support CSM mode
*/
#include "emu.h"
#include "ymf262.h"
/* output final shift */
#if (OPL3_SAMPLE_BITS==16)
#define FINAL_SH (0)
#define MAXOUT (+32767)
#define MINOUT (-32768)
#else
#define FINAL_SH (8)
#define MAXOUT (+127)
#define MINOUT (-128)
#endif
#define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
#define EG_SH 16 /* 16.16 fixed point (EG timing) */
#define LFO_SH 24 /* 8.24 fixed point (LFO calculations) */
#define TIMER_SH 16 /* 16.16 fixed point (timers calculations) */
#define FREQ_MASK ((1<<FREQ_SH)-1)
/* envelope output entries */
#define ENV_BITS 10
#define ENV_LEN (1<<ENV_BITS)
#define ENV_STEP (128.0/ENV_LEN)
#define MAX_ATT_INDEX ((1<<(ENV_BITS-1))-1) /*511*/
#define MIN_ATT_INDEX (0)
/* sinwave entries */
#define SIN_BITS 10
#define SIN_LEN (1<<SIN_BITS)
#define SIN_MASK (SIN_LEN-1)
#define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
/* register number to channel number , slot offset */
#define SLOT1 0
#define SLOT2 1
/* Envelope Generator phases */
#define EG_ATT 4
#define EG_DEC 3
#define EG_SUS 2
#define EG_REL 1
#define EG_OFF 0
/* Routing connections between slots */
#define CONN_NULL 0
#define CONN_CHAN0 1
#define CONN_PHASEMOD 19
#define CONN_PHASEMOD2 20
namespace {
/* save output as raw 16-bit sample */
/*#define SAVE_SAMPLE*/
#ifdef SAVE_SAMPLE
static FILE *sample[1];
#if 1 /*save to MONO file */
#define SAVE_ALL_CHANNELS \
{ signed int pom = a; \
fputc((unsigned short)pom&0xff,sample[0]); \
fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
}
#else /*save to STEREO file */
#define SAVE_ALL_CHANNELS \
{ signed int pom = a; \
fputc((unsigned short)pom&0xff,sample[0]); \
fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
pom = b; \
fputc((unsigned short)pom&0xff,sample[0]); \
fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
}
#endif
#endif
#define OPL3_TYPE_YMF262 (0) /* 36 operators, 8 waveforms */
struct OPL3_SLOT
{
uint32_t ar; /* attack rate: AR<<2 */
uint32_t dr; /* decay rate: DR<<2 */
uint32_t rr; /* release rate:RR<<2 */
uint8_t KSR; /* key scale rate */
uint8_t ksl; /* keyscale level */
uint8_t ksr; /* key scale rate: kcode>>KSR */
uint8_t mul; /* multiple: mul_tab[ML] */
/* Phase Generator */
uint32_t Cnt; /* frequency counter */
uint32_t Incr; /* frequency counter step */
uint8_t FB; /* feedback shift value */
uint8_t conn_enum; /* slot output route */
int32_t *connect; /* slot output pointer */
int32_t op1_out[2]; /* slot1 output for feedback */
uint8_t CON; /* connection (algorithm) type */
/* Envelope Generator */
uint8_t eg_type; /* percussive/non-percussive mode */
uint8_t state; /* phase type */
uint32_t TL; /* total level: TL << 2 */
int32_t TLL; /* adjusted now TL */
int32_t volume; /* envelope counter */
uint32_t sl; /* sustain level: sl_tab[SL] */
uint32_t eg_m_ar; /* (attack state) */
uint8_t eg_sh_ar; /* (attack state) */
uint8_t eg_sel_ar; /* (attack state) */
uint32_t eg_m_dr; /* (decay state) */
uint8_t eg_sh_dr; /* (decay state) */
uint8_t eg_sel_dr; /* (decay state) */
uint32_t eg_m_rr; /* (release state) */
uint8_t eg_sh_rr; /* (release state) */
uint8_t eg_sel_rr; /* (release state) */
uint32_t key; /* 0 = KEY OFF, >0 = KEY ON */
/* LFO */
uint32_t AMmask; /* LFO Amplitude Modulation enable mask */
uint8_t vib; /* LFO Phase Modulation enable flag (active high)*/
/* waveform select */
uint8_t waveform_number;
unsigned int wavetable;
//unsigned char reserved[128-84];//speedup: pump up the struct size to power of 2
unsigned char reserved[128-100];//speedup: pump up the struct size to power of 2
};
struct OPL3_CH
{
OPL3_SLOT SLOT[2];
uint32_t block_fnum; /* block+fnum */
uint32_t fc; /* Freq. Increment base */
uint32_t ksl_base; /* KeyScaleLevel Base step */
uint8_t kcode; /* key code (for key scaling) */
/*
there are 12 2-operator channels which can be combined in pairs
to form six 4-operator channel, they are:
0 and 3,
1 and 4,
2 and 5,
9 and 12,
10 and 13,
11 and 14
*/
uint8_t extended; /* set to 1 if this channel forms up a 4op channel with another channel(only used by first of pair of channels, ie 0,1,2 and 9,10,11) */
unsigned char reserved[512-272];//speedup:pump up the struct size to power of 2
};
/* OPL3 state */
struct OPL3
{
OPL3_CH P_CH[18]; /* OPL3 chips have 18 channels */
uint32_t pan[18*4]; /* channels output masks (0xffffffff = enable); 4 masks per one channel */
uint32_t pan_ctrl_value[18]; /* output control values 1 per one channel (1 value contains 4 masks) */
signed int chanout[18];
signed int phase_modulation; /* phase modulation input (SLOT 2) */
signed int phase_modulation2; /* phase modulation input (SLOT 3 in 4 operator channels) */
uint32_t eg_cnt; /* global envelope generator counter */
uint32_t eg_timer; /* global envelope generator counter works at frequency = chipclock/divider */
uint32_t eg_timer_add; /* step of eg_timer */
uint32_t eg_timer_overflow; /* envelope generator timer overflows every 1 sample (on real chip) */
uint32_t fn_tab[1024]; /* fnumber->increment counter */
/* LFO */
uint32_t LFO_AM;
int32_t LFO_PM;
uint8_t lfo_am_depth;
uint8_t lfo_pm_depth_range;
uint32_t lfo_am_cnt;
uint32_t lfo_am_inc;
uint32_t lfo_pm_cnt;
uint32_t lfo_pm_inc;
uint32_t noise_rng; /* 23 bit noise shift register */
uint32_t noise_p; /* current noise 'phase' */
uint32_t noise_f; /* current noise period */
uint8_t OPL3_mode; /* OPL3 extension enable flag */
uint8_t rhythm; /* Rhythm mode */
int T[2]; /* timer counters */
uint8_t st[2]; /* timer enable */
uint32_t address; /* address register */
uint8_t status; /* status flag */
uint8_t statusmask; /* status mask */
uint8_t nts; /* NTS (note select) */
/* external event callback handlers */
OPL3_TIMERHANDLER timer_handler;
device_t *TimerParam;
OPL3_IRQHANDLER IRQHandler;
device_t *IRQParam;
OPL3_UPDATEHANDLER UpdateHandler;
device_t *UpdateParam;
uint8_t type; /* chip type */
int clock; /* master clock (Hz) */
int rate; /* sampling rate (Hz) */
int divider; /* clock divider */
double freqbase; /* frequency base */
attotime TimerBase; /* Timer base time (==sampling time)*/
device_t *device;
/* Optional handlers */
void SetTimerHandler(OPL3_TIMERHANDLER handler, device_t *device)
{
timer_handler = handler;
TimerParam = device;
}
void SetIRQHandler(OPL3_IRQHANDLER handler, device_t *device)
{
IRQHandler = handler;
IRQParam = device;
}
void SetUpdateHandler(OPL3_UPDATEHANDLER handler, device_t *device)
{
UpdateHandler = handler;
UpdateParam = device;
}
};
} // anonymous namespace
/* mapping of register number (offset) to slot number used by the emulator */
static const int slot_array[32]=
{
0, 2, 4, 1, 3, 5,-1,-1,
6, 8,10, 7, 9,11,-1,-1,
12,14,16,13,15,17,-1,-1,
-1,-1,-1,-1,-1,-1,-1,-1
};
/* key scale level */
/* table is 3dB/octave , DV converts this into 6dB/octave */
/* 0.1875 is bit 0 weight of the envelope counter (volume) expressed in the 'decibel' scale */
#define DV (0.1875/2.0)
static const double ksl_tab[8*16]=
{
/* OCT 0 */
0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
/* OCT 1 */
0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV,
1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV,
/* OCT 2 */
0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV,
3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV,
4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV,
/* OCT 3 */
0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV,
3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV,
6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV,
7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV,
/* OCT 4 */
0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV,
6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV,
9.000/DV, 9.750/DV,10.125/DV,10.500/DV,
10.875/DV,11.250/DV,11.625/DV,12.000/DV,
/* OCT 5 */
0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV,
9.000/DV,10.125/DV,10.875/DV,11.625/DV,
12.000/DV,12.750/DV,13.125/DV,13.500/DV,
13.875/DV,14.250/DV,14.625/DV,15.000/DV,
/* OCT 6 */
0.000/DV, 6.000/DV, 9.000/DV,10.875/DV,
12.000/DV,13.125/DV,13.875/DV,14.625/DV,
15.000/DV,15.750/DV,16.125/DV,16.500/DV,
16.875/DV,17.250/DV,17.625/DV,18.000/DV,
/* OCT 7 */
0.000/DV, 9.000/DV,12.000/DV,13.875/DV,
15.000/DV,16.125/DV,16.875/DV,17.625/DV,
18.000/DV,18.750/DV,19.125/DV,19.500/DV,
19.875/DV,20.250/DV,20.625/DV,21.000/DV
};
#undef DV
/* 0 / 3.0 / 1.5 / 6.0 dB/OCT */
static const uint32_t ksl_shift[4] = { 31, 1, 2, 0 };
/* sustain level table (3dB per step) */
/* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/
#define SC(db) (uint32_t) ( db * (2.0/ENV_STEP) )
static const uint32_t sl_tab[16]={
SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
};
#undef SC
#define RATE_STEPS (8)
static const unsigned char eg_inc[15*RATE_STEPS]={
/*cycle:0 1 2 3 4 5 6 7*/
/* 0 */ 0,1, 0,1, 0,1, 0,1, /* rates 00..12 0 (increment by 0 or 1) */
/* 1 */ 0,1, 0,1, 1,1, 0,1, /* rates 00..12 1 */
/* 2 */ 0,1, 1,1, 0,1, 1,1, /* rates 00..12 2 */
/* 3 */ 0,1, 1,1, 1,1, 1,1, /* rates 00..12 3 */
/* 4 */ 1,1, 1,1, 1,1, 1,1, /* rate 13 0 (increment by 1) */
/* 5 */ 1,1, 1,2, 1,1, 1,2, /* rate 13 1 */
/* 6 */ 1,2, 1,2, 1,2, 1,2, /* rate 13 2 */
/* 7 */ 1,2, 2,2, 1,2, 2,2, /* rate 13 3 */
/* 8 */ 2,2, 2,2, 2,2, 2,2, /* rate 14 0 (increment by 2) */
/* 9 */ 2,2, 2,4, 2,2, 2,4, /* rate 14 1 */
/*10 */ 2,4, 2,4, 2,4, 2,4, /* rate 14 2 */
/*11 */ 2,4, 4,4, 2,4, 4,4, /* rate 14 3 */
/*12 */ 4,4, 4,4, 4,4, 4,4, /* rates 15 0, 15 1, 15 2, 15 3 for decay */
/*13 */ 8,8, 8,8, 8,8, 8,8, /* rates 15 0, 15 1, 15 2, 15 3 for attack (zero time) */
/*14 */ 0,0, 0,0, 0,0, 0,0, /* infinity rates for attack and decay(s) */
};
#define O(a) (a*RATE_STEPS)
/* note that there is no O(13) in this table - it's directly in the code */
static const unsigned char eg_rate_select[16+64+16]={ /* Envelope Generator rates (16 + 64 rates + 16 RKS) */
/* 16 infinite time rates */
O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
/* rates 00-12 */
O( 0),O( 1),O( 2),O( 3),
O( 0),O( 1),O( 2),O( 3),
O( 0),O( 1),O( 2),O( 3),
O( 0),O( 1),O( 2),O( 3),
O( 0),O( 1),O( 2),O( 3),
O( 0),O( 1),O( 2),O( 3),
O( 0),O( 1),O( 2),O( 3),
O( 0),O( 1),O( 2),O( 3),
O( 0),O( 1),O( 2),O( 3),
O( 0),O( 1),O( 2),O( 3),
O( 0),O( 1),O( 2),O( 3),
O( 0),O( 1),O( 2),O( 3),
O( 0),O( 1),O( 2),O( 3),
/* rate 13 */
O( 4),O( 5),O( 6),O( 7),
/* rate 14 */
O( 8),O( 9),O(10),O(11),
/* rate 15 */
O(12),O(12),O(12),O(12),
/* 16 dummy rates (same as 15 3) */
O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12),
O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12),
};
#undef O
/*rate 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 */
/*shift 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0, 0 */
/*mask 4095, 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0, 0 */
#define O(a) (a*1)
static const unsigned char eg_rate_shift[16+64+16]={ /* Envelope Generator counter shifts (16 + 64 rates + 16 RKS) */
/* 16 infinite time rates */
O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
/* rates 00-12 */
O(12),O(12),O(12),O(12),
O(11),O(11),O(11),O(11),
O(10),O(10),O(10),O(10),
O( 9),O( 9),O( 9),O( 9),
O( 8),O( 8),O( 8),O( 8),
O( 7),O( 7),O( 7),O( 7),
O( 6),O( 6),O( 6),O( 6),
O( 5),O( 5),O( 5),O( 5),
O( 4),O( 4),O( 4),O( 4),
O( 3),O( 3),O( 3),O( 3),
O( 2),O( 2),O( 2),O( 2),
O( 1),O( 1),O( 1),O( 1),
O( 0),O( 0),O( 0),O( 0),
/* rate 13 */
O( 0),O( 0),O( 0),O( 0),
/* rate 14 */
O( 0),O( 0),O( 0),O( 0),
/* rate 15 */
O( 0),O( 0),O( 0),O( 0),
/* 16 dummy rates (same as 15 3) */
O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
};
#undef O
/* multiple table */
#define ML 2
static const uint8_t mul_tab[16]= {
/* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,10,12,12,15,15 */
ML/2, 1*ML, 2*ML, 3*ML, 4*ML, 5*ML, 6*ML, 7*ML,
8*ML, 9*ML,10*ML,10*ML,12*ML,12*ML,15*ML,15*ML
};
#undef ML
/* TL_TAB_LEN is calculated as:
* (12+1)=13 - sinus amplitude bits (Y axis)
* additional 1: to compensate for calculations of negative part of waveform
* (if we don't add it then the greatest possible _negative_ value would be -2
* and we really need -1 for waveform #7)
* 2 - sinus sign bit (Y axis)
* TL_RES_LEN - sinus resolution (X axis)
*/
#define TL_TAB_LEN (13*2*TL_RES_LEN)
static signed int tl_tab[TL_TAB_LEN];
#define ENV_QUIET (TL_TAB_LEN>>4)
/* sin waveform table in 'decibel' scale */
/* there are eight waveforms on OPL3 chips */
static unsigned int sin_tab[SIN_LEN * 8];
/* LFO Amplitude Modulation table (verified on real YM3812)
27 output levels (triangle waveform); 1 level takes one of: 192, 256 or 448 samples
Length: 210 elements.
Each of the elements has to be repeated
exactly 64 times (on 64 consecutive samples).
The whole table takes: 64 * 210 = 13440 samples.
When AM = 1 data is used directly
When AM = 0 data is divided by 4 before being used (losing precision is important)
*/
#define LFO_AM_TAB_ELEMENTS 210
static const uint8_t lfo_am_table[LFO_AM_TAB_ELEMENTS] = {
0,0,0,0,0,0,0,
1,1,1,1,
2,2,2,2,
3,3,3,3,
4,4,4,4,
5,5,5,5,
6,6,6,6,
7,7,7,7,
8,8,8,8,
9,9,9,9,
10,10,10,10,
11,11,11,11,
12,12,12,12,
13,13,13,13,
14,14,14,14,
15,15,15,15,
16,16,16,16,
17,17,17,17,
18,18,18,18,
19,19,19,19,
20,20,20,20,
21,21,21,21,
22,22,22,22,
23,23,23,23,
24,24,24,24,
25,25,25,25,
26,26,26,
25,25,25,25,
24,24,24,24,
23,23,23,23,
22,22,22,22,
21,21,21,21,
20,20,20,20,
19,19,19,19,
18,18,18,18,
17,17,17,17,
16,16,16,16,
15,15,15,15,
14,14,14,14,
13,13,13,13,
12,12,12,12,
11,11,11,11,
10,10,10,10,
9,9,9,9,
8,8,8,8,
7,7,7,7,
6,6,6,6,
5,5,5,5,
4,4,4,4,
3,3,3,3,
2,2,2,2,
1,1,1,1
};
/* LFO Phase Modulation table (verified on real YM3812) */
static const int8_t lfo_pm_table[8*8*2] = {
/* FNUM2/FNUM = 00 0xxxxxxx (0x0000) */
0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/
0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 00 1xxxxxxx (0x0080) */
0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/
1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 01 0xxxxxxx (0x0100) */
1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/
2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 01 1xxxxxxx (0x0180) */
1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/
3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 10 0xxxxxxx (0x0200) */
2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/
4, 2, 0,-2,-4,-2, 0, 2, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 10 1xxxxxxx (0x0280) */
2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/
5, 2, 0,-2,-5,-2, 0, 2, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 11 0xxxxxxx (0x0300) */
3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/
6, 3, 0,-3,-6,-3, 0, 3, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 11 1xxxxxxx (0x0380) */
3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/
7, 3, 0,-3,-7,-3, 0, 3 /*LFO PM depth = 1*/
};
/* lock level of common table */
static int num_lock = 0;
/* work table */
#define SLOT7_1 (&chip->P_CH[7].SLOT[SLOT1])
#define SLOT7_2 (&chip->P_CH[7].SLOT[SLOT2])
#define SLOT8_1 (&chip->P_CH[8].SLOT[SLOT1])
#define SLOT8_2 (&chip->P_CH[8].SLOT[SLOT2])
static inline void OPL3_SLOT_CONNECT(OPL3 *chip, OPL3_SLOT *slot) {
if (slot->conn_enum == CONN_NULL) {
slot->connect = nullptr;
} else if (slot->conn_enum >= CONN_CHAN0 && slot->conn_enum < CONN_PHASEMOD) {
slot->connect = &chip->chanout[slot->conn_enum - CONN_CHAN0];
} else if (slot->conn_enum == CONN_PHASEMOD) {
slot->connect = &chip->phase_modulation;
} else if (slot->conn_enum == CONN_PHASEMOD2) {
slot->connect = &chip->phase_modulation2;
}
}
#if 0
static inline int limit( int val, int max, int min ) {
if ( val > max )
val = max;
else if ( val < min )
val = min;
return val;
}
#endif
/* status set and IRQ handling */
static inline void OPL3_STATUS_SET(OPL3 *chip,int flag)
{
/* set status flag masking out disabled IRQs */
chip->status |= (flag & chip->statusmask);
if(!(chip->status & 0x80))
{
if(chip->status & 0x7f)
{ /* IRQ on */
chip->status |= 0x80;
/* callback user interrupt handler (IRQ is OFF to ON) */
if(chip->IRQHandler) (chip->IRQHandler)(chip->IRQParam,1);
}
}
}
/* status reset and IRQ handling */
static inline void OPL3_STATUS_RESET(OPL3 *chip,int flag)
{
/* reset status flag */
chip->status &= ~flag;
if(chip->status & 0x80)
{
if (!(chip->status & 0x7f))
{
chip->status &= 0x7f;
/* callback user interrupt handler (IRQ is ON to OFF) */
if(chip->IRQHandler) (chip->IRQHandler)(chip->IRQParam,0);
}
}
}
/* IRQ mask set */
static inline void OPL3_STATUSMASK_SET(OPL3 *chip,int flag)
{
chip->statusmask = flag;
/* IRQ handling check */
OPL3_STATUS_SET(chip,0);
OPL3_STATUS_RESET(chip,0);
}
/* advance LFO to next sample */
static inline void advance_lfo(OPL3 *chip)
{
uint8_t tmp;
/* LFO */
chip->lfo_am_cnt += chip->lfo_am_inc;
if (chip->lfo_am_cnt >= ((uint32_t)LFO_AM_TAB_ELEMENTS<<LFO_SH) ) /* lfo_am_table is 210 elements long */
chip->lfo_am_cnt -= ((uint32_t)LFO_AM_TAB_ELEMENTS<<LFO_SH);
tmp = lfo_am_table[ chip->lfo_am_cnt >> LFO_SH ];
if (chip->lfo_am_depth)
chip->LFO_AM = tmp;
else
chip->LFO_AM = tmp>>2;
chip->lfo_pm_cnt += chip->lfo_pm_inc;
chip->LFO_PM = ((chip->lfo_pm_cnt>>LFO_SH) & 7) | chip->lfo_pm_depth_range;
}
/* advance to next sample */
static inline void advance(OPL3 *chip)
{
OPL3_CH *CH;
OPL3_SLOT *op;
int i;
chip->eg_timer += chip->eg_timer_add;
while (chip->eg_timer >= chip->eg_timer_overflow)
{
chip->eg_timer -= chip->eg_timer_overflow;
chip->eg_cnt++;
for (i=0; i<9*2*2; i++)
{
CH = &chip->P_CH[i/2];
op = &CH->SLOT[i&1];
#if 1
/* Envelope Generator */
switch(op->state)
{
case EG_ATT: /* attack phase */
// if ( !(chip->eg_cnt & ((1<<op->eg_sh_ar)-1) ) )
if ( !(chip->eg_cnt & op->eg_m_ar) )
{
op->volume += (~op->volume *
(eg_inc[op->eg_sel_ar + ((chip->eg_cnt>>op->eg_sh_ar)&7)])
) >>3;
if (op->volume <= MIN_ATT_INDEX)
{
op->volume = MIN_ATT_INDEX;
op->state = EG_DEC;
}
}
break;
case EG_DEC: /* decay phase */
// if ( !(chip->eg_cnt & ((1<<op->eg_sh_dr)-1) ) )
if ( !(chip->eg_cnt & op->eg_m_dr) )
{
op->volume += eg_inc[op->eg_sel_dr + ((chip->eg_cnt>>op->eg_sh_dr)&7)];
if ( op->volume >= op->sl )
op->state = EG_SUS;
}
break;
case EG_SUS: /* sustain phase */
/* this is important behaviour:
one can change percusive/non-percussive modes on the fly and
the chip will remain in sustain phase - verified on real YM3812 */
if(op->eg_type) /* non-percussive mode */
{
/* do nothing */
}
else /* percussive mode */
{
/* during sustain phase chip adds Release Rate (in percussive mode) */
// if ( !(chip->eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
if ( !(chip->eg_cnt & op->eg_m_rr) )
{
op->volume += eg_inc[op->eg_sel_rr + ((chip->eg_cnt>>op->eg_sh_rr)&7)];
if ( op->volume >= MAX_ATT_INDEX )
op->volume = MAX_ATT_INDEX;
}
/* else do nothing in sustain phase */
}
break;
case EG_REL: /* release phase */
// if ( !(chip->eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
if ( !(chip->eg_cnt & op->eg_m_rr) )
{
op->volume += eg_inc[op->eg_sel_rr + ((chip->eg_cnt>>op->eg_sh_rr)&7)];
if ( op->volume >= MAX_ATT_INDEX )
{
op->volume = MAX_ATT_INDEX;
op->state = EG_OFF;
}
}
break;
default:
break;
}
#endif
}
}
for (i=0; i<9*2*2; i++)
{
CH = &chip->P_CH[i/2];
op = &CH->SLOT[i&1];
/* Phase Generator */
if(op->vib)
{
uint8_t block;
unsigned int block_fnum = CH->block_fnum;
unsigned int fnum_lfo = (block_fnum&0x0380) >> 7;
signed int lfo_fn_table_index_offset = lfo_pm_table[chip->LFO_PM + 16*fnum_lfo ];
if (lfo_fn_table_index_offset) /* LFO phase modulation active */
{
block_fnum += lfo_fn_table_index_offset;
block = (block_fnum&0x1c00) >> 10;
op->Cnt += (chip->fn_tab[block_fnum&0x03ff] >> (7-block)) * op->mul;
}
else /* LFO phase modulation = zero */
{
op->Cnt += op->Incr;
}
}
else /* LFO phase modulation disabled for this operator */
{
op->Cnt += op->Incr;
}
}
/* The Noise Generator of the YM3812 is 23-bit shift register.
* Period is equal to 2^23-2 samples.
* Register works at sampling frequency of the chip, so output
* can change on every sample.
*
* Output of the register and input to the bit 22 is:
* bit0 XOR bit14 XOR bit15 XOR bit22
*
* Simply use bit 22 as the noise output.
*/
chip->noise_p += chip->noise_f;
i = chip->noise_p >> FREQ_SH; /* number of events (shifts of the shift register) */
chip->noise_p &= FREQ_MASK;
while (i)
{
/*
uint32_t j;
j = ( (chip->noise_rng) ^ (chip->noise_rng>>14) ^ (chip->noise_rng>>15) ^ (chip->noise_rng>>22) ) & 1;
chip->noise_rng = (j<<22) | (chip->noise_rng>>1);
*/
/*
Instead of doing all the logic operations above, we
use a trick here (and use bit 0 as the noise output).
The difference is only that the noise bit changes one
step ahead. This doesn't matter since we don't know
what is real state of the noise_rng after the reset.
*/
if (chip->noise_rng & 1) chip->noise_rng ^= 0x800302;
chip->noise_rng >>= 1;
i--;
}
}
static inline signed int op_calc(uint32_t phase, unsigned int env, signed int pm, unsigned int wave_tab)
{
uint32_t p;
p = (env<<4) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + (pm<<16))) >> FREQ_SH ) & SIN_MASK) ];
if (p >= TL_TAB_LEN)
return 0;
return tl_tab[p];
}
static inline signed int op_calc1(uint32_t phase, unsigned int env, signed int pm, unsigned int wave_tab)
{
uint32_t p;
p = (env<<4) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + pm))>>FREQ_SH) & SIN_MASK)];
if (p >= TL_TAB_LEN)
return 0;
return tl_tab[p];
}
#define volume_calc(OP) ((OP)->TLL + ((uint32_t)(OP)->volume) + (chip->LFO_AM & (OP)->AMmask))
/* calculate output of a standard 2 operator channel
(or 1st part of a 4-op channel) */
static inline void chan_calc( OPL3 *chip, OPL3_CH *CH )
{
OPL3_SLOT *SLOT;
unsigned int env;
signed int out;
chip->phase_modulation = 0;
chip->phase_modulation2= 0;
/* SLOT 1 */
SLOT = &CH->SLOT[SLOT1];
env = volume_calc(SLOT);
out = SLOT->op1_out[0] + SLOT->op1_out[1];
SLOT->op1_out[0] = SLOT->op1_out[1];
SLOT->op1_out[1] = 0;
if (env < ENV_QUIET)
{
if (!SLOT->FB)
out = 0;
SLOT->op1_out[1] = op_calc1(SLOT->Cnt, env, (out<<SLOT->FB), SLOT->wavetable );
}
if (SLOT->connect) {
*SLOT->connect += SLOT->op1_out[1];
}
//logerror("out0=%5i vol0=%4i ", SLOT->op1_out[1], env );
/* SLOT 2 */
SLOT++;
env = volume_calc(SLOT);
if ((env < ENV_QUIET) && SLOT->connect)
*SLOT->connect += op_calc(SLOT->Cnt, env, chip->phase_modulation, SLOT->wavetable);
//logerror("out1=%5i vol1=%4i\n", op_calc(SLOT->Cnt, env, chip->phase_modulation, SLOT->wavetable), env );
}
/* calculate output of a 2nd part of 4-op channel */
static inline void chan_calc_ext( OPL3 *chip, OPL3_CH *CH )
{
OPL3_SLOT *SLOT;
unsigned int env;
chip->phase_modulation = 0;
/* SLOT 1 */
SLOT = &CH->SLOT[SLOT1];
env = volume_calc(SLOT);
if (env < ENV_QUIET && SLOT->connect)
*SLOT->connect += op_calc(SLOT->Cnt, env, chip->phase_modulation2, SLOT->wavetable );
/* SLOT 2 */
SLOT++;
env = volume_calc(SLOT);
if (env < ENV_QUIET && SLOT->connect)
*SLOT->connect += op_calc(SLOT->Cnt, env, chip->phase_modulation, SLOT->wavetable);
}
/*
operators used in the rhythm sounds generation process:
Envelope Generator:
channel operator register number Bass High Snare Tom Top
/ slot number TL ARDR SLRR Wave Drum Hat Drum Tom Cymbal
6 / 0 12 50 70 90 f0 +
6 / 1 15 53 73 93 f3 +
7 / 0 13 51 71 91 f1 +
7 / 1 16 54 74 94 f4 +
8 / 0 14 52 72 92 f2 +
8 / 1 17 55 75 95 f5 +
Phase Generator:
channel operator register number Bass High Snare Tom Top
/ slot number MULTIPLE Drum Hat Drum Tom Cymbal
6 / 0 12 30 +
6 / 1 15 33 +
7 / 0 13 31 + + +
7 / 1 16 34 ----- n o t u s e d -----
8 / 0 14 32 +
8 / 1 17 35 + +
channel operator register number Bass High Snare Tom Top
number number BLK/FNUM2 FNUM Drum Hat Drum Tom Cymbal
6 12,15 B6 A6 +
7 13,16 B7 A7 + + +